Commit Graph

1153 Commits

Author SHA1 Message Date
Laurent Pinchart
62783b714f sh-pfc: r8a7790: Add DU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-14 22:49:22 +02:00
Laurent Pinchart
f06812095e sh-pfc: r8a7790: Rename DU1_DOTCLKIN to DU_DOTCLKIN1
Name the DU clock input 1 consistently with clock inputs 0 and 2.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-14 22:49:22 +02:00
Linus Walleij
1c8e794432 pinctrl: improve warning messages
Print out the affected group name on activation of pin mux
settings, and warn if you cannot free a pin that should have
been part of a certain setting.

ChangeLog v1->v2:
- Also print the pin name in the error messages.

Cc: Sonic Zhang <sonic.zhang@analog.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-14 22:49:14 +02:00
Laxman Dewangan
0a8d3e2412 pinctrl: palmas: add pincontrol driver
TI Palmas series Power Management IC have multiple pins which can be
configured for different functionality. This pins can be configured
for different function. Also their properties like pull up/down,
open drain enable/disable are configurable.

Add support for pincontrol driver Palmas series device like TPS65913,
TPS80036. The driver supports to be register from DT only.

Changes from V1:
- Add generic property for pins and functions in pinconf-generic.
- Add APIs to map the DT and subnode.
- Move common utils APIs to the pinctrl-utils from this file.
- Update the binding document accordingly.
Changes from V2:
- Add ack by Lee.
- Correct the binding docs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-14 21:00:42 +02:00
Laxman Dewangan
e81c8f18af pinctrl: pinconf-generic: add generic APIs for mapping pinctrl node
Add generic APIs to map the DT node and its sub node in pinconf generic
driver. These APIs can be used from driver to parse the DT node who
uses the pinconf generic APIs for defining their nodes.

Changes from V1:
- Add generic property for pins and functions in pinconf-generic.
- Add APIs to map the DT and subnode.
- Move common utils APIs to the pinctrl-utils from this file.
- Update the binding document accordingly.
Changes from V2:
- Rebased the pinctrl binding doc on top of Stephen's cleanup.
- Rename properties "pinctrl-pins" and "pinctrl-function" to
  "pins" and "function".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-14 21:00:41 +02:00
Laxman Dewangan
1eb207a9ec pinctrl: add utility functions for add map/configs
Some of pincontrol driver needs the utility function to create map
list. The utility function needed for adding mux, configs etc.

In place of duplicating this in each driver, add the common utility
function in common file and use from device specific driver. This will
reduce the duplicating of code across drivers.

Changes from V1:
- Add this files in this patch and add common utility APIs to here.

Changes from V2:
- Nothing in code.
- Added Reviewed by Stephen.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-14 21:00:41 +02:00
Sonic Zhang
744f0a9adb pinctrl: pinmux: Don't free pins requested by other devices in pinmux_disable_setting.
One peripheral may share part of its pins with the 2nd
peripheral and the other pins with the 3rd. If it requests all pins
when part of them has already be requested and owned by the 2nd
peripheral, this request fails and pinmux_disable_setting() is called.
The pinmux_disable_setting() frees all pins of the first peripheral
without checking if the pin is owned by itself or the 2nd, which
results in the malfunction of the 2nd peripheral driver.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-14 17:52:18 +02:00
Linus Walleij
bf4dae5ce1 pinctrl: nomadik: delete ancient pin control API
The pin control subsystem was created to do away with custom pin
control APIs such as this one. It was kept for backward-compatibility
but is completely unused in the current kernel, so let's delete
it.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07 22:30:58 +02:00
Jingoo Han
2c9fdcf17e pinctrl: sirf: add missing __iomem annotation
Added missing __iomem annotation in order to fix the following
sparse warnings:

drivers/pinctrl/sirf/pinctrl-sirf.c:846:14: warning: incorrect type in assignment (different address spaces)
drivers/pinctrl/sirf/pinctrl-sirf.c:846:14:    expected void *regs
drivers/pinctrl/sirf/pinctrl-sirf.c:846:14:    got void [noderef] <asn:2>*
drivers/pinctrl/sirf/pinctrl-sirf.c:869:33: warning: incorrect type in assignment (different address spaces)
drivers/pinctrl/sirf/pinctrl-sirf.c:869:33:    expected void [noderef] <asn:2>*regs
drivers/pinctrl/sirf/pinctrl-sirf.c:869:33:    got void *regs
drivers/pinctrl/sirf/pinctrl-sirf.c:909:17: warning: incorrect type in argument 1 (different address spaces)
drivers/pinctrl/sirf/pinctrl-sirf.c:909:17:    expected void volatile [noderef] <asn:2>*addr
drivers/pinctrl/sirf/pinctrl-sirf.c:909:17:    got void *regs

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07 22:30:40 +02:00
Jingoo Han
9b6803542e pinctrl: pinconf: fix comparison of different types
Fix the following sparse warning:

drivers/pinctrl/pinconf.c:521:20: error: incompatible types in comparison expression (different type sizes)

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07 22:30:32 +02:00
Boris BREZILLON
99fce0295e pinctrl: at91: choose appropriate handler for level interrupts
The current implementation handle both edge and level interrupts with the
'handle_simple_irq' handler.

Level interrupts are active as long as the pin stays at the configured
level (low or high). In this case we have to use 'handle_level_irq' which
mask the interrupt until the handle has treated it.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Tested-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07 22:30:16 +02:00
Sachin Kamat
ef75bfd5d1 pinctrl: st: Staticize local symbols
Symbols used only in this file are made static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07 22:30:06 +02:00
Sachin Kamat
656445f3e2 pinctrl: st: Convert to use devm_ioremap_resource
devm_request_and_ioremap is deprecated. Use devm_ioremap_resource
instead.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07 22:29:57 +02:00
Shawn Guo
94176faf27 pinctrl: imx: work around select input quirk
The select input for some pin may not be implemented using the regular
select input register but the general purpose register.  A real example
is that imx6q designers found the select input for USB OTG ID pin is
missing at the very late stage, and can not add a new select input
register but have to use a general purpose register bit to implement it.

The patch adds a workaround for such select input quirk by interpreting
the input_val cell of pin function ID in a different way, so that all
the info that needed for setting up select input bits in general purpose
register could be decoded from there.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07 22:29:48 +02:00
Sachin Kamat
3efa921d5b pinctrl: sunxi: Fix incorrect NULL check
*map should be tested for NULL instead of map as kmalloc pointer
is assigned to it. This also fixes a potential null pointer dereference
bug later in the code.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07 22:29:39 +02:00
Russell King - ARM Linux
8a9dcc3ffe pinctrl: shut up a couple of pinctrl warnings
So, I notice that we get a couple of warnings from the pinctrl code:

drivers/pinctrl/pinconf.c: In function 'pinconf_dbg_config_print':
drivers/pinctrl/pinconf.c:433:36: warning: 'configs' may be used uninitialized in this function
drivers/pinctrl/pinconf.c: In function 'pinconf_dbg_config_write':
drivers/pinctrl/pinconf.c:511:36: warning: 'configs' may be used uninitialized in this function

While the compiler might not be able to work out that "configs" is
safe, the code doesn't lend itself very well to identifying that
fact when reading it either.  This can be trivially solved by a slight
restructuring of the code - which also reduces the LOC.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07 22:29:30 +02:00
Wolfram Sang
cdaf0645db drivers/pinctrl: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07 22:29:21 +02:00
Heiko Stübner
7e865abb52 pinctrl: rockchip: include correct clk header
The correct header to include for clock handling is clk.h .
clk-provider.h should not be used in simple clock consumers.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07 22:29:09 +02:00
Maxime Ripard
1bee963db9 pinctrl: sunxi: Add spinlocks
The current code use no locking at all, which is obviously not that
great and can lead to concurrency issues, especially with the newer SMP
SoCs from Allwinner.

Add some locking where it's needed.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2013-08-07 21:57:17 +02:00
Maxime Ripard
df7b34f4c3 pinctrl: sunxi: Fix gpio_set behaviour
The current gpio_set function is ignoring the previous value set in the
GPIO value register, which leads in erasing the values already set for
the other GPIOs in the same bank when setting the value of a given GPIO.

Add the usual read/mask/write pattern to fix this brown paper bag bug.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2013-08-07 21:57:13 +02:00
Maxime Ripard
2aaaddff8d pinctrl: sunxi: Read register before writing to it in irq_set_type
The current irq_set_type code doesn't read the current register value
before writing to it, leading to the older programmed values being
overwritten and everything but the latest value being reset.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2013-08-07 20:39:25 +02:00
Linus Walleij
f7a3427f3e Merge branch 'pinmux/next/fixes' of git://linuxtv.org/pinchartl/fbdev into devel
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-29 16:33:57 +02:00
Linus Walleij
da52faa571 Merge branch 'pinmux/next/pin-no-gpio' of git://linuxtv.org/pinchartl/fbdev into devel
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-29 16:30:55 +02:00
Shinobu Uehara
e120cacfaa sh-pfc: r8a7790: Add VIN pin groups and functions
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:14 +02:00
Shinobu Uehara
dac896e221 sh-pfc: r8a7790: Add USB pin groups and functions
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:14 +02:00
Laurent Pinchart
2dbe7f2cc9 sh-pfc: r8a7790: Add SCIF2 pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:13 +02:00
Kunihito Higashiyama
4f47cc5e30 sh-pfc: r8a7790: Add MSIOF pin groups and functions
Signed-off-by: Kunihito Higashiyama <kunihito.higashiyama.ur@renesas.com>
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:12 +02:00
Laurent Pinchart
457c11d3e8 sh-pfc: r8a7790: Sort pin groups and functions alphabetically
Navigating through the source code is hard enough without having to
manually search for groups and functions.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:12 +02:00
Shinya Kuribayashi
0a664e3d79 sh-pfc: r8a7790: Fix miscellaneous pinmux configuration tables mistakes
Fix erroneous entries in the pinmux configuration tables that affect
HSCIF, I2C, LBSC, SCIF, SSI and VIN operation.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:11 +02:00
Shinya Kuribayashi
1ddb66cd6f sh-pfc: r8a7790: Add SCIF2 pins configuration support
Update the pinmux configuration tables to support the SCIF2 pins
(TX2/TX2_B, RX2/RX2_B, SCK2).

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:10 +02:00
Shinya Kuribayashi
05bcb07bc8 sh-pfc: r8a7790: Add TCLK1 pin configuration support
Update the pinmux configuration tables to support the TCLK1 pin.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:10 +02:00
Shinya Kuribayashi
5de880dd95 sh-pfc: r8a7790: Swap SCIFA2_RXD_B and HRX0_C configurations
The SCIFA2 RXD_B and HRX0_C pins have their pinmux configuration data
swapped, fix it.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:09 +02:00
Shinya Kuribayashi
7d2b2854c6 sh-pfc: r8a7790: Remove deprecated SPV_EVEN pin
The pins have been removed from the datasheet, remove them here as well.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:08 +02:00
Shinya Kuribayashi
14da999bd6 sh-pfc: r8a7790: Remove deprecated RDS pins
The pins have been removed from the datasheet, remove them here as well.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:08 +02:00
Shinya Kuribayashi
9f2edd4113 sh-pfc: r8a7790: Remove deprecated Ethernet MII/RMII pins
The pins have been removed from the datasheet, remove them here as well.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:07 +02:00
Shinya Kuribayashi
bcec7475d8 sh-pfc: r8a7790: Remove trailing '_TANS' string from RTS/CTS pins
The RTS/CTS pins have been renamed in the datasheet, rename them here as
well.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:06 +02:00
Shinya Kuribayashi
c4721249dd sh-pfc: r8a7790: Rename I2C SDA/SCL pins
The I2C pins have been renamed in the datasheet, rename them here as
well.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:06 +02:00
Phil Edworthy
528e947739 sh-pfc: r8a7779: Add I2C pin groups
Add all I2C pin groups to R8A7779 PFC driver.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:52:05 +02:00
Laurent Pinchart
deeb6d3f1f sh-pfc: sh73a0: Remove EXT_IRQ16L and EXT_IRQ16H macros
The macros expand to irq_pin() calls and where most probably introduced
from a copy&paste of the sh7372 PFC data. Replace them with irq_pin().

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
2013-07-29 15:52:04 +02:00
Laurent Pinchart
f3dcc9ffad sh-pfc: sh7372: Replace <mach/irqs.h> with <linux/sh_intc.h>
The mach/irqs.h header is included only to get the evt2irq macro
definition. The macro is defined in linux/sh_intc.h, include it directly
instead of the mach-specific header.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
2013-07-29 15:52:03 +02:00
Laurent Pinchart
e700444090 sh-pfc: Remove unneeded mach/<soc>.h includes
The SoC-specific mach/<soc>.h headers are included needlesly. Don't
include them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
2013-07-29 15:52:03 +02:00
Laurent Pinchart
4f82e3ee72 sh-pfc: Support pins not associated with a GPIO port
Pins with selectable functions but without a GPIO port can't be named
PORT_# or GP_#_#. Add a SH_PFC_PIN_NAMED macro to declare such pins in
the pinmux pins array, naming them with the PIN_ prefix followed by the
pin physical position.

In order to make sure not to register those pins as GPIOs, add a
SH_PFC_PIN_CFG_NO_GPIO pin flag to denote pins without a GPIO port.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:49 +02:00
Laurent Pinchart
acac8ed5e2 sh-pfc: Compute pin ranges automatically
Remove the manually specified ranges from PFC SoC data and compute the
ranges automatically. This prevents ranges from being out-of-sync with
pins definitions.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:48 +02:00
Laurent Pinchart
28818fa5da sh-pfc: Rename struct sh_pfc nr_pins field to nr_gpio_pins
The field contains the number of pins with an associated GPIO port. This
is currently equal to the total number of pins but will be modified when
adding support for pins without a GPIO port. Rename the field
accordingly.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:47 +02:00
Laurent Pinchart
9689896cb1 sh-pfc: Add pin number to struct sh_pfc_pin
The pin number is usually equal to the GPIO number but can differ when
GPIO numbering is sparse.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:47 +02:00
Laurent Pinchart
3ce0d7eba0 sh-pfc: Pass the pin number down to the port function macro
The PORT_1 macro invokes a macro passed as a parameter. Pass the pin
number down to that macro at the bottom of the call stack. This will be
used to compute the pin ranges automatically.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:46 +02:00
Laurent Pinchart
16b915e438 sh-pfc: Add port numbers to the CPU_ALL_PORT macro
Pass down the port number down to the PORT_1 macro. The port number will
be used to compute the pin ranges automatically.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:45 +02:00
Laurent Pinchart
7cbb0e55e2 sh-pfc: Don't duplicate argument to PINMUX_GPIO macro
The PINMUX_GPIO macro takes a port name and a data mark, respectively of
the form GPIO_name and name_DATA. Modify the macro to take the name as a
single argument and derive the port name and data mark from it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:45 +02:00
Laurent Pinchart
18dcc58341 sh-pfc: shx3: Remove shx3_ prefix from static symbols
Unlike all other PFC SoC data, the shx3 data prefix all static symbols
with shx3_. Remove the prefix to be consistent with the other source
files.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:17:44 +02:00
Laurent Pinchart
8157b96429 sh-pfc: sh7734: Use the common GP port style macros
The SoC has a bank-style PFC. Replace the custom-defined macros with
common macros from sh-pfc.h.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:17:44 +02:00
Laurent Pinchart
df020272ab sh-pfc: Consolidate pin definition macros
Move the pin definition macros to a common header file.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:43 +02:00
Laurent Pinchart
e3d93b4671 sh-pfc: Consolidate PFC SoC data macros
Move macros defined in several SoC data files to a common location and
document them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:42 +02:00
Laurent Pinchart
757b055a65 sh-pfc: Rename gpio arguments to be consistent with the rest of the code
The gpio_get_data_reg() and gpio_setup_data_reg() functions both take an
argument named gpio. The argument contains a GPIO offset for the first
function and a pin index for the second one. Rename them to offset and
idx respectively to match the rest of the code.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:42 +02:00
Laurent Pinchart
533743dccb sh-pfc: Replace pinmux_enum_id typedef with u16
The typedef only conceals the real variable type without bringing any
additional value (see Documentation/CodingStyle, section 5.b). Moreover,
it polutes the pinmux namespace. Replace it with the integer type it
used to hide.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:41 +02:00
Laurent Pinchart
a1a3580cb3 sh-pfc: Don't overallocate memory for the GPIO chip pins array
The GPIO driver uses an array of sh_pfc_gpio_pin structures to store
per-GPIO pin data. The array size is miscomputed at allocation time by
using the number of the last pin instead of the number of pins. When the
pin space contains holes this leads to memory overallocation. Fix it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:41 +02:00
Laurent Pinchart
08d3868ec7 sh-pfc: Remove unused GPIO_PORT_ALL macro
The macro isn't used, remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:40 +02:00
Laurent Pinchart
94e7460138 sh-pfc: Remove unneeded const keywords
Two integer field structures are needlesly defined as const. Remove the
const keyword.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:39 +02:00
Laurent Pinchart
487bca0390 sh-pfc: Remove unused macro and enum entries
The SH_PFC_MARK_INVALID macro and the PINMUX_FLAG_TYPE, GPIO_CFG_REQ and
GPIO_CFG_FREE enum entries are used, remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:39 +02:00
Laurent Pinchart
b7e760e0b8 sh-pfc: Remove unused PORT_DATA_* macros
Most of the PORT_DATA_* macros are not used, remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:38 +02:00
Laurent Pinchart
7590643156 sh-pfc: Remove unused input_pd and input_pu ranges
The ranges are not used anymore, remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
2013-07-29 15:17:37 +02:00
Laurent Pinchart
4e5ca4a1e6 sh-pfc: shx3: Remove unused input_pu range
The PFC SHX3 SoC data contains a input_pu range used to configure
pull-up resistors using the legacy non-pinconf API. That API has been
removed from the driver, the range is thus not used anymore. Remove it.

If required, configuring pull-up resistors for the SHX3 can be
implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
and R-Car platforms.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:17:37 +02:00
Laurent Pinchart
082ab8ff33 sh-pfc: sh7786: Remove unused input_pu range
The PFC SH7786 SoC data contains a input_pu range used to configure
pull-up resistors using the legacy non-pinconf API. That API has been
removed from the driver, the range is thus not used anymore. Remove it.

If required, configuring pull-up resistors for the SH7786 can be
implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
and R-Car platforms.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:17:36 +02:00
Laurent Pinchart
2afb968126 sh-pfc: sh7785: Remove unused input_pu range
The PFC SH7785 SoC data contains a input_pu range used to configure
pull-up resistors using the legacy non-pinconf API. That API has been
removed from the driver, the range is thus not used anymore. Remove it.

If required, configuring pull-up resistors for the SH7785 can be
implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
and R-Car platforms.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:17:35 +02:00
Laurent Pinchart
5f86072afb sh-pfc: sh7757: Remove unused input_pu range
The PFC SH7757 SoC data contains a input_pu range used to configure
pull-up resistors using the legacy non-pinconf API. That API has been
removed from the driver, the range is thus not used anymore. Remove it.

If required, configuring pull-up resistors for the SH7757 can be
implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
and R-Car platforms.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:17:35 +02:00
Laurent Pinchart
c5361517bb sh-pfc: sh7724: Remove unused input_pu range
The PFC SH7724 SoC data contains a input_pu range used to configure
pull-up resistors using the legacy non-pinconf API. That API has been
removed from the driver, the range is thus not used anymore. Remove it.

If required, configuring pull-up resistors for the SH7724 can be
implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
and R-Car platforms.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:17:34 +02:00
Laurent Pinchart
52331350b4 sh-pfc: sh7723: Remove unused input_pu range
The PFC SH7723 SoC data contains a input_pu range used to configure
pull-up resistors using the legacy non-pinconf API. That API has been
removed from the driver, the range is thus not used anymore. Remove it.

If required, configuring pull-up resistors for the SH7723 can be
implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
and R-Car platforms.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:17:34 +02:00
Laurent Pinchart
48b888b17f sh-pfc: sh7722: Remove unused input_pd and input_pu ranges
The PFC SH7722 SoC data contains input_pd and input_pu ranges used to
configure pull-down and pull-up resistors using the legacy non-pinconf
API. That API has been removed from the driver, the ranges are thus not
used anymore. Remove them.

If required, configuring pull-down and pull-up resistors for the SH7722
can be implemented using the pinconf API, as done for the SH-Mobile,
R-Mobile and R-Car platforms.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:17:33 +02:00
Laurent Pinchart
7f975b3f1e sh-pfc: sh7720: Remove unused input_pu range
The PFC SH7720 SoC data contains a input_pu range used to configure
pull-up resistors using the legacy non-pinconf API. That API has been
removed from the driver, the range is thus not used anymore. Remove it.

If required, configuring pull-up resistors for the SH7720 can be
implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
and R-Car platforms.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-07-29 15:17:33 +02:00
Linus Walleij
db6c2c69c2 pinctrl: fix a memleak when freeing maps
We forgot to free the node itself when free:ing a map.

Reported-by: xulinuxkernel <xulinuxkernel@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-25 17:18:36 +02:00
Fabio Estevam
f29bdca0db pinctrl: pinctrl-imx: Remove unneeded check for platform_get_resource()
As devm_ioremap_resource() is used on probe, there is no need to explicitly
check the return value from platform_get_resource(), as this is something that
devm_ioremap_resource() takes care by itself.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23 01:23:28 +02:00
Tony Lindgren
f33334978a pinctrl: Remove duplicate code in pinctrl_pm_select_state functions
There's no need to duplicate essentially the same functions. Let's
introduce static int pinctrl_pm_select_state() and make the other
related functions call that.

This allows us to add support later on for multiple active states,
and more optimized dynamic remuxing.

Note that we still need to export the various pinctrl_pm_select
functions as we want to keep struct pinctrl_state private to the
pinctrl code, and cannot replace those with inline functions.

Cc: Felipe Balbi <balbi@ti.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23 01:23:27 +02:00
Andy Shevchenko
496940c102 pinctrl-baytrail: fix to avoid sparse warnings
There are couple of sparse warnings we could avoid if we use a bit verbose
version of the code in byt_gpio_direction_output().

drivers/pinctrl/pinctrl-baytrail.c:266:45: warning: dubious: x | !y
drivers/pinctrl/pinctrl-baytrail.c:267:36: warning: dubious: x | !y

Additionally simplify a bit the code in byt_gpio_direction_input().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23 01:23:27 +02:00
Andy Shevchenko
17e5246429 pinctrl-baytrail: introduce to_byt_gpio() macro
The introduced macro helps to convert struct gpio_chip to struct byt_gpio.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23 01:23:26 +02:00
Andy Shevchenko
9c5b655795 pinctrl-baytrail: remove redundant ptr variable
There is no need to have an additional variable in byt_gpio_reg().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23 01:23:26 +02:00
Andy Shevchenko
1583449ef7 pinctrl-baytrail: change lvl to level
Additionally remove trailing whitespace when print triggering type.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23 01:23:26 +02:00
Andy Shevchenko
ec243320e0 pinctrl-baytrail: fix indentations
There are two minor issues with indentation in the code. This patch fixes them.
No functional changes.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23 01:23:25 +02:00
Barry Song
f6b178851c pinctrl: sirf: add freeze and restore entries for hibernation support
this patch adds hibernation entries so that the sirf platform can
support suspend-to-disk.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23 01:23:25 +02:00
Rongjun Ying
9c956909ed pinctrl: sirf: fix the checkpatch issue about indentation
Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23 01:23:24 +02:00
Jean-Francois Moine
8cb440ab70 pinctrl: pinctrl-single: fix compile warning when no CONFIG_PM
This warning has been introduced by the commit
 0f9bc4bcdf pinctrl: single: adopt pinctrl sleep mode management

Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-22 23:00:55 +02:00
Guennadi Liakhovetski
74b8435129 pinctrl: sh-pfc: fix SDHI0 VccQ regulator on sh73a0 with DT
The PFC pinctrl driver on sh73a0 is also regiatering a VccQ regulator for
SDHI0. However, its consumers list only included the platform-data based
SDHI device name. When booted with DT SDHI0 couldn't enable VccQ and
therefore was unusable. Fix this by adding a consumer with DT-based name.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-22 21:09:03 +02:00
Qipan Li
d58e9a02e1 pinctrl: sirf: add usp0_uart_nostreamctrl pin group for usp-uart without flowctrl
this patch adds the lost pin group which supports to let USP0 to simulate
a UART without hardware flow control.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-22 00:52:19 +02:00
Qipan Li
42a708c932 pinctrl: sirf: fix the pin number and mux bit for usp0
we missed a pin and related mux bit for usp pin group, this
patch fixes it.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-22 00:49:36 +02:00
Rusty Russell
5795c6ac7c pinctrl: don't use PTR_RET().
We've already tested that it's an error.

Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2013-07-15 11:25:03 +09:30
Linus Torvalds
3dbde57ad9 Pin control changes for the v3.11 kernel cycle:
- A large slew of improvements of the Genric pin configuration
   support, and deployment in four different platforms:
   Rockchip, Super-H PFC, ABx500 and TZ1090. Support BIAS_BUS_HOLD,
   get device tree parsing and debugfs support into shape.
 
 - We also have device tree support with generic naming conventions
   for the generic pin configuration.
 
 - Delete the unused and confusing direct pinconf API. Now state
   transitions is *the* way to control pins and multiplexing.
 
 - New drivers for Rockchip, TZ1090, and TZ1090 PDC.
 
 - Two pin control states related to power management are now
   handled in the device core: "sleep" and "idle", removing a lot
   of boilerplate code in drivers. We do not yet know if this is
   the final word for pin PM, but it already make things a lot
   easier to handle.
 
 - Handle sparse GPIO ranges passing a list of disparate pins, and
   utilize these in the new BayTrail (x86 Atom SoC) driver.
 
 - Make the sunxi (AllWinner) driver handle external interrupts.
 
 - Make it possible for pinctrl-single to handle the case where
   several pins are managed by a single register, and augment it to
   handle sleep modes.
 
 - Cleanups and improvements for the abx500 drivers.
 
 - Move Sirf pin control drivers to their own directory, support
   save/restore of context and add support for the SiRFatlas6 SoC.
 
 - PMU muxing for the Dove pinctrl driver.
 
 - Finalization and support for VF610 in the i.MX6 pinctrl driver.
 
 - Smoothen out various Exynos rough edges.
 
 - Generic cleanups of various kinds.
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Merge tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control changes from Linus Walleij:

 - A large slew of improvements of the Genric pin configuration support,
   and deployment in four different platforms: Rockchip, Super-H PFC,
   ABx500 and TZ1090.  Support BIAS_BUS_HOLD, get device tree parsing
   and debugfs support into shape.

 - We also have device tree support with generic naming conventions for
   the generic pin configuration.

 - Delete the unused and confusing direct pinconf API.  Now state
   transitions is *the* way to control pins and multiplexing.

 - New drivers for Rockchip, TZ1090, and TZ1090 PDC.

 - Two pin control states related to power management are now handled in
   the device core: "sleep" and "idle", removing a lot of boilerplate
   code in drivers.  We do not yet know if this is the final word for
   pin PM, but it already make things a lot easier to handle.

 - Handle sparse GPIO ranges passing a list of disparate pins, and
   utilize these in the new BayTrail (x86 Atom SoC) driver.

 - Make the sunxi (AllWinner) driver handle external interrupts.

 - Make it possible for pinctrl-single to handle the case where several
   pins are managed by a single register, and augment it to handle sleep
   modes.

 - Cleanups and improvements for the abx500 drivers.

 - Move Sirf pin control drivers to their own directory, support
   save/restore of context and add support for the SiRFatlas6 SoC.

 - PMU muxing for the Dove pinctrl driver.

 - Finalization and support for VF610 in the i.MX6 pinctrl driver.

 - Smoothen out various Exynos rough edges.

 - Generic cleanups of various kinds.

* tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits)
  pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe()
  pinctrl: remove bindings for pinconf options needing more thought
  pinctrl: remove slew-rate parameter from tz1090
  pinctrl: set unit for debounce time pinconfig to usec
  pinctrl: more clarifications for generic pull configs
  pinctrl: rip out the direct pinconf API
  pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver
  pinctrl-tz1090: add TZ1090 pinctrl driver
  pinctrl: samsung: Staticize drvdata_list
  pinctrl: rockchip: Add missing irq_gc_unlock() call before return error
  pinctrl: abx500: rework error path
  pinctrl: abx500: suppress hardcoded value
  pinctrl: abx500: factorize code
  pinctrl: abx500: fix abx500_gpio_get()
  pinctrl: abx500: fix abx500_pin_config_set()
  pinctrl: abx500: Add device tree support
  sh-pfc: Guard DT parsing with #ifdef CONFIG_OF
  pinctrl: add Intel BayTrail GPIO/pinctrl support
  pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc
  pinctrl: Staticize local symbols
  ...

Conflicts:
	drivers/net/ethernet/ti/davinci_mdio.c
	drivers/pinctrl/Makefile
2013-07-03 11:48:03 -07:00
Linus Torvalds
a6e6d863cf regmap: Updates for v3.11
A small but useful set of regmap updates this time around:
 
 - An abstraction for bitfields within a register map contributed by
   Srinivas Kandagatla, allowing drivers to cope more easily when
   hardware designers randomly move things about (mainly when talking
   to things like system controllers).
 
 - Changes from Lars-Peter Clausen to allow the MMIO regmap to be used from
   hard IRQ context.
 
 - Small improvements to the cache infrastructure and performance,
   including a default cache sync operation so now all regmaps can sync
   easily.
 
 There's also a pinctrl driver making use of the new bitfield API, merged
 here for dependency reasons.  There will be a simple add/add conflict
 with the pinctrl tree as a result.
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Merge tag 'regmap-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap

Pull regmap updates from Mark Brown:
 "A small but useful set of regmap updates this time around:

   - An abstraction for bitfields within a register map contributed by
     Srinivas Kandagatla, allowing drivers to cope more easily when
     hardware designers randomly move things about (mainly when talking
     to things like system controllers).

   - Changes from Lars-Peter Clausen to allow the MMIO regmap to be used
     from hard IRQ context.

   - Small improvements to the cache infrastructure and performance,
     including a default cache sync operation so now all regmaps can
     sync easily.

  There's also a pinctrl driver making use of the new bitfield API,
  merged here for dependency reasons.  There will be a simple add/add
  conflict with the pinctrl tree as a result."

* tag 'regmap-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap:
  pinctrl: st: Remove unnecessary use of of_match_ptr macro
  pinctrl: st: fix return value check
  pinctrl: st: Add pinctrl and pinconf support.
  regmap: debugfs: Suppress cache for partial register files
  regmap: Add regmap_field APIs
  regmap: core: Cache all registers by default when cache is enabled
  regmap: Implemented default cache sync operation
  regmap: Make regmap-mmio usable from atomic contexts
  regmap: regcache: Fixup locking for custom lock callbacks
  regmap: debugfs: Fix return from regmap_debugfs_get_dump_start
  regmap: debugfs: Don't mark lockdep as broken due to debugfs write
  regmap: rbtree: Use range information to allocate nodes
  regmap: rbtree: Factor out node allocation
  regmap: Make regmap_check_range_table() a public API
  regmap: Add support for discarding parts of the register cache
2013-07-03 11:40:58 -07:00
Linus Torvalds
42daabf62b ARM SoC late changes
These are changes that arrived a little late before the merge
 window or that have multiple dependencies on previous branches
 so they did not fit into one of the earlier ones. There
 are 10 branches merged here, a total of 39 non-merge commits.
 Contents are a mixed bag for the above reasons:
 
 * Two new SoC platforms: ST microelectronics stixxxx and
   the TI 'Nspire' graphing calculator. These should have
   been in the 'soc' branch but were a little late
 * Support for the Exynos 5420 variant in mach-exynos,
   which is based on the other exynos branches to avoid
   conflicts.
 * Various small changes for sh-mobile, ux500 and davinci
 * Common clk support for MSM
 
 Conflicts:
 * In Kconfig.debug, various additions trivially conflict,
   the list should be kept in alphabetical order when
   resolving.
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Merge tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late changes from Arnd Bergmann:
 "These are changes that arrived a little late before the merge window
  or that have multiple dependencies on previous branches so they did
  not fit into one of the earlier ones.  There are 10 branches merged
  here, a total of 39 non-merge commits.  Contents are a mixed bag for
  the above reasons:

   * Two new SoC platforms: ST microelectronics stixxxx and the TI
     'Nspire' graphing calculator.  These should have been in the 'soc'
     branch but were a little late
   * Support for the Exynos 5420 variant in mach-exynos, which is based
     on the other exynos branches to avoid conflicts.
   * Various small changes for sh-mobile, ux500 and davinci
   * Common clk support for MSM"

* tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits)
  ARM: ux500: bail out on alien cpus
  ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple pins
  serial: sh-sci: Initialise variables before access in sci_set_termios()
  ARM: stih41x: Add B2020 board support
  ARM: stih41x: Add B2000 board support
  ARM: sti: Add DEBUG_LL console support
  ARM: sti: Add STiH416 SOC support
  ARM: sti: Add STiH415 SOC support
  ARM: msm: Migrate to common clock framework
  ARM: msm: Make proc_comm clock control into a platform driver
  ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver
  ARM: msm: Remove clock-7x30.h include file
  ARM: msm: Remove custom clk_set_{max,min}_rate() API
  ARM: msm: Remove custom clk_set_flags() API
  msm: iommu: Use clk_set_rate() instead of clk_set_min_rate()
  msm: iommu: Convert to clk_prepare/unprepare
  msm_sdcc: Convert to clk_prepare/unprepare
  usb: otg: msm: Convert to clk_prepare/unprepare
  msm_serial: Use devm_clk_get() and properly return errors
  msm_serial: Convert to clk_prepare/unprepare
  ...
2013-07-02 14:42:51 -07:00
Linus Torvalds
0bf6a210a4 ARM SoC driver specific changes
These changes are all driver specific and cross over between arm-soc
 contents and some other subsystem, in these cases cpufreq, crypto,
 dma, pinctrl, mailbox and usb, and the subsystem owners agreed to
 have these changes merged through arm-soc. As we proceed to untangle
 the dependencies between platform code and driver code, the amount of
 changes in this category is fortunately shrinking, for 3.11 we have
 16 branches here and 101 non-merge changesets, the majority of which
 are for the stedma40 dma engine driver used in the ux500 platform.
 Cleaning up that code touches multiple subsystems, but gets rid
 of the dependency in the end.
 
 The mailbox code moved out from mach-omap2 to drivers/mailbox
 is an intermediate step and is still omap specific at the moment.
 Patches exist to generalize the subsystem and add other drivers
 with the same API, but those did not make it for 3.11.
 
 Conflicts:
 * In cpu-db8500.c results from the removal of the u8500_of_init_devices
   function in combination with the split of u8500_auxdata_lookup.
 
 * In arch/arm/mach-omap2/devices.c, the includes got reshuffled.
   we need to keep linux/wl12xx.h and linux/platform_data/mailbox-omap.h.
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Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver specific changes from Arnd Bergmann:
 "These changes are all driver specific and cross over between arm-soc
  contents and some other subsystem, in these cases cpufreq, crypto,
  dma, pinctrl, mailbox and usb, and the subsystem owners agreed to have
  these changes merged through arm-soc.

  As we proceed to untangle the dependencies between platform code and
  driver code, the amount of changes in this category is fortunately
  shrinking, for 3.11 we have 16 branches here and 101 non-merge
  changesets, the majority of which are for the stedma40 dma engine
  driver used in the ux500 platform.  Cleaning up that code touches
  multiple subsystems, but gets rid of the dependency in the end.

  The mailbox code moved out from mach-omap2 to drivers/mailbox is an
  intermediate step and is still omap specific at the moment.  Patches
  exist to generalize the subsystem and add other drivers with the same
  API, but those did not make it for 3.11."

* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (101 commits)
  crypto: ux500: use dmaengine_submit API
  crypto: ux500: use dmaengine_prep_slave_sg API
  crypto: ux500: use dmaengine_device_control API
  crypto: ux500/crypt: add missing __iomem qualifiers
  crypto: ux500/hash: add missing static qualifiers
  crypto: ux500/hash: use readl on iomem addresses
  dmaengine: ste_dma40: Declare memcpy config as static
  ARM: ux500: Remove mop500_snowball_ethernet_clock_enable()
  ARM: ux500: Correct the EN_3v3 regulator's on/off GPIO
  ARM: ux500: Provide a AB8500 GPIO Device Tree node
  gpio: rcar: fix gpio_rcar_of_table
  gpio-rcar: Remove #ifdef CONFIG_OF around OF-specific sections
  gpio-rcar: Reference core gpio documentation in the DT bindings
  clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2
  ARM: dts: Update Samsung I2S documentation
  ARM: dts: add clock provider information for i2s controllers in Exynos5250
  ARM: dts: add Exynos audio subsystem clock controller node
  clk: samsung: register audio subsystem clocks using common clock framework
  ARM: dts: use #include for all device trees for Samsung
  pinctrl: s3c24xx: use correct header for chained_irq functions
  ...
2013-07-02 14:33:21 -07:00
Linus Torvalds
ee1a8d402e ARM SoC device tree changes
These changes from 30 individual branches for the most part update device
 tree files, but there are also a few source code changes that have crept
 in this time, usually in order to atomically move over a driver from
 using hardcoded data to DT probing.
 
 A number of platforms change their DT files to use the C preprocessor,
 which is causing a bit of churn, but that is hopefully only this once.
 
 There are a few conflicts with the other branches unfortunately:
 
 * in exynos5440.dtsi and kirkwood-6281.dtsi, device nodes are added
   from multiple branches. Need to be careful to have the right
   set of closing braces as git gets this one wrong.
 
 * In kirkwood.dtsi, one 'ranges' line got split into two lines, while
   another line got added. Order of the lines does not matter.
 
 * in sama5d3.dtsi, some cleanup was merged the wrong way, causing
   a bogus conflict. We want the 'dmas' and 'dma-names' properties
   to get added here.
 
 * Two lines got removed independently in arch/arm/mach-mxs/mach-mxs.c
 
 * Contents get added independently in arch/arm/mach-omap2/cclock33xx_data.c
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Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device tree changes from Arnd Bergmann:
 "These changes from 30 individual branches for the most part update
  device tree files, but there are also a few source code changes that
  have crept in this time, usually in order to atomically move over a
  driver from using hardcoded data to DT probing.

  A number of platforms change their DT files to use the C preprocessor,
  which is causing a bit of churn, but that is hopefully only this once"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (372 commits)
  ARM: at91: dt: rm9200ek: add spi support
  ARM: at91: dt: rm9200: add spi support
  ARM: at91/DT: at91sam9n12: add SPI DMA client infos
  ARM: at91/DT: sama5d3: add SPI DMA client infos
  ARM: at91/DT: fix SPI compatibility string
  ARM: Kirkwood: Fix the internal register ranges translation
  ARM: dts: bcm281xx: change comment to C89 style
  ARM: mmc: bcm281xx SDHCI driver (dt mods)
  ARM: nomadik: add the new clocks to the device tree
  clk: nomadik: implement the Nomadik clocks properly
  ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency
  ARM: dts: omap4-panda: Fix DVI EDID reads
  ARM: dts: omap4-panda: Add USB Host support
  arm: mvebu: enable mini-PCIe connectors on Armada 370 RD
  ARM: shmobile: irqpin: add a DT property to enable masking on parent
  ARM: dts: AM43x EPOS EVM support
  ARM: dts: OMAP5: Add bandgap DT entry
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone
  ...
2013-07-02 14:23:01 -07:00
Axel Lin
539fde59eb pinctrl: st: Remove unnecessary use of of_match_ptr macro
This is a DT only driver and st_pctl_of_match is always compiled
in. Hence of_match_ptr is unnecessary.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
2013-06-30 12:39:33 +01:00
Wei Yongjun
5c75acdcae pinctrl: st: fix return value check
In case of error, the function pinctrl_register() returns
NULL not ERR_PTR(). The IS_ERR() test in the return value
check should be replaced with NULL test.
The function syscon_regmap_lookup_by_phandle() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check
should be replaced with IS_ERR().

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2013-06-28 15:01:49 +01:00
Wei Yongjun
2207a4e1ca pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe()
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-27 11:51:51 +02:00
Olof Johansson
cbe461f654 based on tags/soc-exynos5420-1
- add pinctrl support for exynos5420
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Merge tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late

From Kukjin Kim, this adds pinctrl support for Exynos 5420.

* tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  pinctrl: exynos: add exynos5420 SoC specific data
  ARM: dts: add pinctrl support to EXYNOS5420

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 08:50:18 -07:00
Srinivas KANDAGATLA
701016c0cb pinctrl: st: Add pinctrl and pinconf support.
This patch add pinctrl support to ST SoCs.

About hardware:
ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle
pin configurations.

Each multi-function pin is controlled, driven and routed through the PIO
multiplexing block. Each pin supports GPIO functionality (ALT0) and
multiple alternate functions(ALT1 - ALTx) that directly connect the pin
to different hardware blocks. When a pin is in GPIO mode, Output Enable
(OE), Open Drain(OD), and Pull Up (PU) are driven by the related PIO
block. Otherwise the PIO multiplexing block configures these parameters
and retiming the signal.

About driver:
This pinctrl driver manages both PIO and PIO-mux block using pinctrl,
pinconf, pinmux, gpio subsystems. All the pinctrl related config
information can only come from device trees.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
2013-06-25 16:22:19 +01:00
Heiko Stübner
5b81d55c4c pinctrl: remove bindings for pinconf options needing more thought
Some options currently take arguments in unspecified driver-specific units.
As pointed out by Stephen Warren, driver specific values should not be part
of generic devicetree bindings describing the hardware.

Therefore remove the critical bindings again, before they become part of
an official release.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-25 15:34:55 +02:00
Heiko Stübner
a7b3bf55e7 pinctrl: remove slew-rate parameter from tz1090
As the binding for slew-rate is under discussion and seems to need
more tought it will get removed for now, so it doesn't get an offical
release.

Therefore remove it again from the only current user, tz1090.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-25 15:34:49 +02:00
Heiko Stübner
256aeb6487 pinctrl: set unit for debounce time pinconfig to usec
Currently the debounce time pinconfig option uses an unspecified
"time units" unit. As pinconfig options should use SI units and a
real unit is also necessary for generic dt bindings, change it
to usec. Currently no driver is using the generic pinconfig option
for this, so the unit change is safe to do.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-25 15:34:44 +02:00
Linus Walleij
ad42fc6c84 pinctrl: rip out the direct pinconf API
From the inception ot the pin config API there has been the
possibility to get a handle at a pin directly and configure
its electrical characteristics. For this reason we had:

int pin_config_get(const char *dev_name, const char *name,
               unsigned long *config);
int pin_config_set(const char *dev_name, const char *name,
               unsigned long config);
int pin_config_group_get(const char *dev_name,
               const char *pin_group,
               unsigned long *config);
int pin_config_group_set(const char *dev_name,
               const char *pin_group,
               unsigned long config);

After the introduction of the pin control states that will
control pins associated with devices, and its subsequent
introduction to the device core, as well as the
introduction of pin control hogs that can set up states on
boot and optionally also at sleep, this direct pin control
API is a thing of the past.

As could be expected, it has zero in-kernel users.
Let's delete this API and make our world simpler.

Reported-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-25 12:54:56 +02:00
James Hogan
b58f0273f0 pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver
Add a pin control driver for the TZ1090's low power pins via the
powerdown controller SOC_GPIO_CONTROL registers.

These pins have individually controlled pull-up, and group controlled
schmitt, slew-rate, drive-strength, and power-on-start (pos).

The pdc_gpio0 and pdc_gpio1 pins can also be muxed onto the
ir_mod_stable_out and ir_mod_power_out functions respectively. If no
function is set they remain in GPIO mode. These muxes can be overridden
by requesting them as GPIOs.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-doc@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 17:21:38 +02:00
James Hogan
d5025f9f53 pinctrl-tz1090: add TZ1090 pinctrl driver
Add a pin control driver for the main pins on the TZ1090 SoC. This
doesn't include the low-power pins as they're controlled separately via
the Powerdown Controller (PDC) registers.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-doc@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 17:21:38 +02:00
Sachin Kamat
b94089751a pinctrl: samsung: Staticize drvdata_list
'drvdata_list' is used only in this file. Make it static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 15:20:33 +02:00
Axel Lin
7cc5f97008 pinctrl: rockchip: Add missing irq_gc_unlock() call before return error
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 15:20:32 +02:00
Patrice Chotard
9be580afe4 pinctrl: abx500: rework error path
At several places, return value was not tested
and error output was missing.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 15:20:32 +02:00
Patrice Chotard
acd260b0aa pinctrl: abx500: suppress hardcoded value
Replace hardcoded value by corresponding #define's.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 15:20:28 +02:00
Patrice Chotard
8b5abd18e2 pinctrl: abx500: factorize code
Factorize code by adding abx500_pullud_supported()
which improve code readability.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 13:33:21 +02:00
Patrice Chotard
d8d4f7f875 pinctrl: abx500: fix abx500_gpio_get()
- allow to get output GPIO value
- as there is no GPIO0 on ABX500, use correct offset with
  abx500_gpio_get_bit()

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 13:31:00 +02:00
Patrice Chotard
61ce135679 pinctrl: abx500: fix abx500_pin_config_set()
- Update abx500_pin_config_set() in order to take in
account PIN_CONFIG_BIAS_DISABLE state to disable
pull up or pull down.

- Rework error path.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 13:29:59 +02:00
Patrice Chotard
64a45c9863 pinctrl: abx500: Add device tree support
We use the same way to define pin muxing and pin configuration
than for nomadik. So pickup code from pinctrl_nomadik.c to be
able to implement pin multiplexing and pin configuration using
the device tree. Pin configuration uses generic parsing code.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 13:16:45 +02:00
Laurent Pinchart
3a8d63d4b4 sh-pfc: Guard DT parsing with #ifdef CONFIG_OF
Fix a compilation error caused by pinconf_generic_parse_dt_config() not
being defined on !CONFIG_OF platforms by guarding the whole DT node
parsing code with #ifdef CONFIG_OF.

Defining a pinconf_generic_parse_dt_config() on !CONFIG_OF would have
been possible as well, but would have resulted in a larger code size on
!CONFIG_OF platforms (such as arch/sh).

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-24 11:34:11 +02:00
Arnd Bergmann
d405534dcd Second Round of Renesas ARM based SoC pinmux and GPIO update for v3.11
tidyup MMC_D1 pin for r8a7778 SoC
 fix two pin numbers and add HSCIF pin groups to r8a7790 SoC
 add pinmux data for MMCIF and SDHI interfaces for r8a73a4 SoC
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Merge tag 'renesas-pinmux2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

From Simon Horman:

Second Round of Renesas ARM based SoC pinmux and GPIO update for v3.11

tidyup MMC_D1 pin for r8a7778 SoC
fix two pin numbers and add HSCIF pin groups to r8a7790 SoC
add pinmux data for MMCIF and SDHI interfaces for r8a73a4 SoC

* tag 'renesas-pinmux2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  sh-pfc: r8a7778: tidyup MMC_D1 pin
  pinctrl: r8a7790: fix two pin numbers
  sh-pfc: r8a7790: add HSCIF pin groups
  pinctrl: r8a73a4: add pinmux data for MMCIF and SDHI interfaces

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-21 15:14:10 +02:00
Arnd Bergmann
704b1005d1 Renesas ARM based SoC cleanups for v3.11
__initdata annotations for the r8a7790 SoC by Morimoto-san.
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Merge tag 'renesas-cleanup-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late

From Simon Horman:

Renesas ARM based SoC cleanups for v3.11

__initdata annotations for the r8a7790 SoC by Morimoto-san.

* tag 'renesas-cleanup-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (158 commits)
  ARM: shmobile: r8a7790: add __initdata on resource and device data

Based on 'renesas-pinmux-for-v3.11' and 'renesas-soc-for-v3.11

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-21 14:54:09 +02:00
Arnd Bergmann
86727c62c8 based on s3c24xx-pinctrl
- use correct header for chained_irq functions for s3c24xx-pinctrl
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Merge tag 's3c24xx-pinctrl-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers

From Kukjin Kim:

based on s3c24xx-pinctrl
- use correct header for chained_irq functions for s3c24xx-pinctrl

* tag 's3c24xx-pinctrl-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  pinctrl: s3c24xx: use correct header for chained_irq functions

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20 22:29:08 +02:00
Arnd Bergmann
402bf90df5 arch/arm/mach-exynos update
- enable XHCI on exynos5
 - enable Pinctrl on exynos4 and exynos5
 - calling scu_enable() is only available on Cortex-A9
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Merge tag 'exynos-arch-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc

From Kukjin Kim:

arch/arm/mach-exynos update
- enable XHCI on exynos5
- enable Pinctrl on exynos4 and exynos5
- calling scu_enable() is only available on Cortex-A9

* tag 'exynos-arch-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: call scu_enable() only in case of cortex-A9 processor
  ARM: EXYNOS: Select PINCTRL_EXYNOS for exynos4/5 at chip level
  ARM: EXYNOS: Enable XHCI support on exynos5

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20 21:50:51 +02:00
Arnd Bergmann
15f4b11b0f Nomadik DT and clock work:
- Lee Jones' pinctrl compat ontology patches
 - A real clock driver for the Nomadik, 100% DT-based
 - Device tree changes for the Nomadik clocks
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Merge tag 'nomadik-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt

From Linus Walleij:

Nomadik DT and clock work:
- Lee Jones' pinctrl compat ontology patches
- A real clock driver for the Nomadik, 100% DT-based
- Device tree changes for the Nomadik clocks

* tag 'nomadik-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: nomadik: add the new clocks to the device tree
  clk: nomadik: implement the Nomadik clocks properly
  pinctrl/nomadik: Standardise Pinctrl compat string for Nomadik based platforms
  ARM: nomadik: Standardise Nomadik STN8815 based Pinctrl compat string in the DTS

Conflicts:
	arch/arm/boot/dts/ste-nomadik-s8815.dts

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20 16:13:10 +02:00
Arnd Bergmann
c3b693d1d6 Device Tree and Multiplatform support for U300:
- Add devicetree support to timer, pinctrl (probe), I2C block,
   watchdog, DMA controller and clocks.
 - Piecewise add a device tree containing all peripherals.
 - Delete the ATAG boot path.
 - Delete redundant platform data and board files.
 - Convert to multiplatform.
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Merge tag 'u300-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc

From Linus Walleij:

Device Tree and Multiplatform support for U300:
- Add devicetree support to timer, pinctrl (probe), I2C block,
  watchdog, DMA controller and clocks.
- Piecewise add a device tree containing all peripherals.
- Delete the ATAG boot path.
- Delete redundant platform data and board files.
- Convert to multiplatform.

* tag 'u300-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (40 commits)
  ARM: u300: switch to using syscon regmap for board
  ARM: u300: Update MMC configs for u300 defconfig
  spi: pl022: use DMA by default when probing from DT
  pinctrl: get rid of all platform data for coh901
  ARM: u300: convert MMC/SD clock to device tree
  ARM: u300: move the gated system controller clocks to DT
  i2c: stu300: do not request a specific clock name
  clk: move the U300 fixed and fixed-factor to DT
  ARM: u300: remove register definition file
  ARM: u300: add syscon node
  ARM: u300 use module_spi_driver to register driver
  ARM: u300: delete remnant machine headers
  ARM: u300: convert to multiplatform
  ARM: u300: localize <mach/u300-regs.h>
  ARM: u300: delete <mach/irqs.h>
  ARM: u300: delete <mach/hardware.h>
  ARM: u300: push down syscon registers
  ARM: u300: remove deps from debug macro
  ARM: u300: move debugmacro to debug includes
  ARM: u300: delete all static board data
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-20 01:51:18 +02:00
Leela Krishna Amudala
983dbeb35f pinctrl: exynos: add exynos5420 SoC specific data
Add Samsung EXYNOS5420 SoC specific data to enable pinctrl
support for all platforms based on EXYNOS5420.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by : Sunil Joshi <joshi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-19 22:19:08 +09:00
Doug Anderson
83978253d0 ARM: EXYNOS: Select PINCTRL_EXYNOS for exynos4/5 at chip level
Previously if you had MACH_EXYNOS5_DT but not MACH_EXYNOS4_DT you'd be
missing the pincontrol definitions.  Move PINCTRL selects to the arch
level since we should be enabling the code for all exynos variants.

Update the PINCTRL descriptions to indicate that PINCTRL_EXYNOS is not
for exynos5440.  Also add basic dependencies for the PINCTRL_EXYNOS
kernel config.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-19 03:41:37 +09:00
Heiko Stuebner
c2c70a7905 pinctrl: s3c24xx: use correct header for chained_irq functions
chained_irq_enter and chained_irq_exit moved to a real header
under linux/pinctrl instead of asm/.

Update the pinctrl driver to use the correct header and fix the
build error.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>`
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-19 02:41:20 +09:00
Mathias Nyman
a5d811bbf1 pinctrl: add Intel BayTrail GPIO/pinctrl support
Add support for gpio on Intel BayTrail platforms. BayTrail supports 3 banks
of gpios called SCORE, NCORE ans SUS with 102, 28 and 44 gpio pins.
Supports gpio interrupts and ACPI gpio events

Pins may be muxed to alternate function instead of gpio by firmware.
This driver does not touch the pin muxing and expect firmare
to set pin muxing and pullup/down properties properly.

Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 17:23:40 +02:00
Sachin Kamat
843aec9653 pinctrl: Staticize local symbols
Symbols referenced only in this file are made static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 16:54:45 +02:00
Sachin Kamat
a59f0e2181 pinctrl: spear/plgpio: Staticize spear310_o2p
'spear310_o2p' is referenced only in this file.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 16:52:37 +02:00
Sachin Kamat
2230a36e31 pinctrl: nomadik: Staticize local symbols
Some symbols referenced only in this file are made static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 16:51:37 +02:00
Sachin Kamat
e8ed912e6e pinctrl: bcm2835: Staticize bcm2835_gpio_pins
'bcm2835_gpio_pins' is used only in this file.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 16:50:27 +02:00
Laurent Pinchart
12f3ad8df7 sh-pfc: Add pinconf support to DT bindings
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 10:57:59 +02:00
Laurent Pinchart
fe1c9a822c sh-pfc: Add DT support
Support device instantiation through the device tree. The compatible
property is used to select the SoC pinmux information.

Set the gpio_chip device field to the PFC device to enable automatic
GPIO OF support.

Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 10:57:51 +02:00
Laurent Pinchart
3a7f520e63 sh-pfc: Remove support for platform data
Platform data isn't used, support can thus be removed.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 10:57:27 +02:00
Wei Yongjun
c8f50e8657 pinctrl: core: fix missing unlock on error in pinctrl_find_gpio_range_from_pin()
Add the missing unlock before return from function pinctrl_find_gpio_range_from_pin()
in the error handling case.

Introduced by commit 2ff3477efd7086544b9e298fc63afab0645921b4.
(pinctrl: add pin list based GPIO ranges)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-18 09:41:15 +02:00
Kuninori Morimoto
cd622017eb sh-pfc: r8a7778: tidyup MMC_D1 pin
MMC_D1 is RCAR_GP_PIN(1, 8), not RCAR_GP_PIN(2, 8)

Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-18 16:13:28 +09:00
Doug Anderson
5a68e7a748 pinctrl: exynos: ack level-triggered interrupts before unmasking
A level-triggered interrupt should be acked after the interrupt line
becomes inactive and before it is unmasked, or else another interrupt
will be immediately triggered.  Acking before or after calling the
handler is not enough.

Signed-off-by: Luigi Semenzato <semenzato@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:58:16 +02:00
Arnd Bergmann
f472deadd5 pinctrl: export pinctrl_pm_select_*_state
The three functions pinctrl_pm_select_default_state,
pinctrl_pm_select_sleep_state, and pinctrl_pm_select_idle_state
are used in drivers that can be loadable modules, and should
be exported.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:29:32 +02:00
Heiko Stübner
44b6d93043 pinctrl: rockchip: correctly handle arguments of pinconf options
Change the rockchip pinctrl driver to handle the arguments to the pull
pinconfig options correctly. So only accept non-0 values for the
pull options as the rockchip pin-controller can only turn pulls on and
off (this via BIAS_DISABLE).

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:34 +02:00
Hebbar Gururaja
0f9bc4bcdf pinctrl: single: adopt pinctrl sleep mode management
Make pinctrl-single able to handle suspend/resume events and change
hogged pins states accordingly.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:34 +02:00
Maxime Ripard
ac68936652 pinctrl: sunxi: Add Allwinner A10s pins
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:33 +02:00
Maxime Ripard
44abb933f7 pinctrl: sunxi: Move the pins definitions to a separate header
It will allow us to have a cleaner separation between the data needed by
the driver to work, and the core logic of the driver in itself, and will
allow having too much noise in the core driver in the future.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:32 +02:00
Heiko Stübner
6abab2d4be pinctrl: dynamically alloc temp array when parsing dt pinconf options
Allocating the temorary array in pinconf_generic_parse_dt_config on stack
might cause problems later on, when the number of options grows over time.
Therefore also allocate this array dynamically to be on the safe side.

Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:31 +02:00
Heiko Stübner
e4a8844c04 pinctrl: handle zero found dt pinconfig properties better
This adds a shortcut when no valid pinconf properties are found
in the parsed dt node, to set the values immediately and return.

Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:31 +02:00
Heiko Stübner
9ee1f7d266 pinctrl: clarify some dt pinconfig options
The bias-pull-* options use values > 0 to indicate that the pull should
be activated and optionally also indicate the strength of the pull.
Therefore use an default value of 1 for these options.

Split the low-power-mode option into low-power-enable and -disable.

Update the documentation to describe the param arguments better.

Reported-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:30 +02:00
Christian Ruppert
c8587eeef8 pinctrl: add pin list based GPIO ranges
Traditionally, GPIO ranges are based on consecutive ranges of both GPIO
and pin numbers. This patch allows for GPIO ranges with arbitrary lists
of pin numbers.

Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 18:18:28 +02:00
Linus Walleij
b263e9b887 pinctrl: get rid of all platform data for coh901
This deletes the dependency on any platform data for
the COH901 pin controller. There is only one user in the
kernel, and if we at some point want to support more
variants, they shall provide their variant info through
the device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-17 13:54:38 +02:00
Guennadi Liakhovetski
0a6ea54ff0 pinctrl: r8a7790: fix two pin numbers
Fix two erroneous MMCIF1 pin numbers on r8a7790.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17 11:20:52 +09:00
Doug Anderson
5ace03fb6a pinctrl: exynos: reorder xyz_irq_unmask() so future patch can ack
This patch does nothing but reorder the functions to improve the
readability of a future patch.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 12:01:55 +02:00
Doug Anderson
5ae8cf7980 pinctrl: exynos: Add spinlocks to irq_mask and irq_unmask
The patch:
  1984695 pinctrl: samsung: Protect bank registers with a spinlock

...added spinlocks to protect many accesses.  However, the irq_mask
and irq_unmask functions still do an unprotected read/modify/write.
Add the spinlock there.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 12:01:54 +02:00
Patrice Chotard
ce06f40740 pinctrl: abx500: fix build warning
pinctrl-abx500.c: In function 'abx500_gpio_dbg_show_one':
pinctrl-abx500.c:534:14: warning: 'pud' may be used
uninitialized in this function [-Wuninitialized]

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:57:33 +02:00
Heiko Stübner
d3e5116119 pinctrl: add pinctrl driver for Rockchip SoCs
This driver adds support the Cortex-A9 based SoCs from Rockchip,
so at least the RK2928, RK3066 (a and b) and RK3188.
Earlier Rockchip SoCs seem to use similar mechanics for gpio
handling so should be supportable with relative small changes.
Pull handling on the rk3188 is currently a stub, due to it being
a bit different to the earlier SoCs.

Pinmuxing as well as gpio (and interrupt-) handling tested on
a rk3066a based machine.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:57:32 +02:00
Heiko Stübner
7db9af4b6e pinctrl: add function to parse generic pinconfig properties from a dt node
pinconf_generic_parse_dt_config() takes a node as input and generates an
array of generic pinconfig values from the properties of this node.

As I couldn't find a mechanism to count the number of properties of a node
the function uses internally an array to accept one of parameter and copies
the real present options to a smaller variable at its end.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:57:32 +02:00
Maxime Ripard
7f884b6483 pinctrl: sunxi: Add external interrupt functions
The A10 and A13 has a few pins that can be muxed into a particular
function that can be used as an interrupt source. Add the available
pins for such functions to the A10 and A13 description array.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:57:32 +02:00
Maxime Ripard
60242db1a7 pinctrl: sunxi: Add external interrupts support
The port controller IP found in the Allwinner A10 and A13 can use few of
the pins it manage as an interrupt source, called external interrupts in
the datasheet.

The number of these external interrupts are SoCs specific, but the
current upper limit is 32. In order to work, the external interrupts'
pins have to be muxed to a specific function to generate an interrupt.

This patch adds the irqchip and the needed logic to use the PIO
controller as an interrupt controller.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:57:31 +02:00
Maxime Ripard
814d4f2e15 pinctrl: sunxi: Search the description array by pin id
Avoid to use expensive string manipulation functions and search by pin
id when possible.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:53 +02:00
Thomas Abraham
79bae27ff9 pinctrl: exynos5440: fix issues reported by prevent tool
This patch fixes issues reported by prevent tool.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
[Drop hunk already in-tree from a patch by Wei Yongjun]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:52 +02:00
Manjunathappa, Prakash
6f924b0b7c pinctrl: pinctrl-single: pin names for pinctrl-single.bits
Take care to name pin names as
register-offset.bit-pos-of-pin-in-register in case configuring multiple
pins in register.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:52 +02:00
Manjunathappa, Prakash
4e7e8017a8 pinctrl: pinctrl-single: enhance to configure multiple pins of different modules
Add support to configure multiple pins in each register, existing
implementation added by [1] does not support full fledge multiple pin
configuration in single register, reports a pin clash when different
modules configure different bits of same register. The issue reported
and discussed here
http://www.spinics.net/lists/arm-kernel/msg235213.html

With pinctrl-single,bits-per-mux property specified, use function-mask
property to find out number pins to configure. Allocate and register
pin control functions based sub mask.

Tested on da850/omap-l138 EVM.
does not support variable submask for pins.
does not support pinconf.

[1] "pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux"
(9e605cb68a),

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Reported-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Tested-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:52 +02:00
Linus Walleij
14005ee270 drivers: pinctrl sleep and idle states in the core
If a device have sleep and idle states in addition to the
default state, look up these in the core and stash them in
the pinctrl state container.

Add accessor functions for pinctrl consumers to put the pins
into "default", "sleep" and "idle" states passing nothing but
the struct device * affected.

Solution suggested by Kevin Hilman, Mark Brown and Dmitry
Torokhov in response to a patch series from Hebbar
Gururaja.

Cc: Hebbar Gururaja <gururaja.hebbar@ti.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:52 +02:00
Heiko Stübner
7970cb770d pinctrl: add pinconf-generic define for a pin-default pull
There exist controllers that don't support to set the pull to up or down
separately but instead automatically set the pull direction based on
embedded knowledge inside the controller, for example depending on the
selected mux function of the pin.

Therefore this patch adds another config option to use this default
pull-state for a pin where it is not possible to know or decide if the
pin will be pulled up or down.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:51 +02:00
Jingchang Lu
78bafc6618 pinctrl: add VF610 pinctrl driver
Adds Freescale Vybrid VF610 pin controller
driver to IMX common pinctrl driver framework.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:51 +02:00
Jingchang Lu
bf5a530971 pinctrl: imx: add VF610 support to imx pinctrl framework
On some platforms such as VF610, offset of mux and pad ctrl register
may be zero, and the mux_mode and config_val are in one 32-bit register.
This patch adds support to imx core pinctrl framework to handle these
cases.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:51 +02:00
Patrice Chotard
d2752ae54d pinctrl: abx500: fix abx500_gpio_dbg_show_one() to show pull up/down
- rework abx500_gpio_dbg_show_one() to take in account pull up/down
  feature available on AB8540 only.
- add abx500_get_pull_updown() needed by abx500_gpio_dbg_show_one()
- rename abx500_config_pull_updown() to abx500_set_pull_updown()

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:51 +02:00
Patrice Chotard
9ed3cd3338 pinctrl: abx500: allow to set pull up
On ABx500 chip family, all pins support only pull down except for
AB8540 which supports pull up/down on some pins.
Rework abx500_pin_config_set to be able to set pull up on
pins which support this feature.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:51 +02:00
Patrice Chotard
10a8be5414 pinctrl: abx500: fix abx500_config_pull_updown
Fix abx500_config_pull_updown() to set correct bit in
AB8540_GPIO_PULL_UPDOWN_REG.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
James Hogan
a2df4269ca pinconf-generic: add BIAS_BUS_HOLD pinconf
Add a new PIN_CONFIG_BIAS_BUS_HOLD pin configuration for a bus holder
pin mode (also known as bus keeper, or repeater). This is a weak latch
which drives the last value on a tristate bus. Another device on the bus
can drive the bus high or low before going tristate to change the value
driven by the pin.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
James Hogan
73ae368cd3 pinconf-generic: add drive strength to debugfs output
Add the drive strength pinconf to debugfs output (with the unit "mA").

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
Patrice Chotard
b0bb6426e4 pinctrl: abx500: suppress unused mutex
Suppress a mutex which was initialized on probe
and destroyed on remove but never used.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
Barry Song
bc8d25a405 pinctrl: sirf: save the status in suspend and restore after resuming
this patch saves the status of pinctrl registers and restore them while
resuming. this makes all drivers have coherent status for pinmux after
suspending and resuming.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
Linus Walleij
44d5f7bbea pinctrl: sink pinctrldev_list_mutex
The pinctrldev_list_mutex is sinked into the functions that
actually traverse the list and lock it there. The code makes
much more sense in this way. All the callers are in
non-performance critical paths and the code is way more
readable this way.

Also refactor the function get_pinctrl_dev_from_devname() to
follow the design pattern of get_pinctrl_dev_from_of_node()
which is slightly simpler.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:50 +02:00
Barry Song
3370dc916c pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC
atlas6 is a SoC very similar with primaII, the register layput of
pinctrl is same, but the pads, groups and functions of atlas6 have
different layout with prima2, this patch
1. pull the definition of pads, groups and functions out of the
pinctrl-sirf driver,and put them into soc-specific files
2. add pads, groups and functions tables for atlas6
3. let pads, groups and functions tables become the config data of
   the related dt compatible node, so the pinctrl-sirf can support
   all SiRF SoCs with the config data as private data.

In this patch,we create a sirf dir, and let
the old drivers/pinctrl/pinctrl-sirf.c =
        drivers/pinctrl/sirf/pinctrl-prima2.c +
        drivers/pinctrl/sirf/pinctrl-sirf.c

drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the
pin layout of atlas6.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Laurent Navet
76cda6ec39 drivers: pinctrl: vt8500: use devm_ioremap_resource()
Replace a call to deprecated devm_request_and_ioremap by devm_ioremap_resource.

Found with coccicheck and this semantic patch:
 scripts/coccinelle/api/devm_ioremap_resource.cocci

Signed-off-by: Laurent Navet <laurent.navet@gmail.com>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Sebastian Hesselbarth
bbd7b275db pinctrl: dove: add PMU functions to pinctrl
Dove power management unit can mux some special functions to mpp0-15.
This patch adds support to set/get the current PMU function mapped
to the corresponding mpp pins. The device tree documentation is also
updated accordingly.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Wolfram Sang
8ec136d0f3 drivers/pinctrl/spear: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Shawn Guo
4fdf774fc9 pinctrl: enable build of pinctrl-imx6sl driver
The pinctrl-imx6sl is in place.  Enable the build of it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Wolfram Sang
f50b9e12db drivers/pinctrl: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:49 +02:00
Jingoo Han
dbf850c687 pinctrl: u300: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:48 +02:00
Jingoo Han
3e6eeafc9c pinctrl: sirf: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:48 +02:00
Jingoo Han
59eb14dcc6 pinctrl: mxs: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:48 +02:00
Jingoo Han
c87feeeb1e pinctrl: coh901: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:56:48 +02:00
Olof Johansson
38d77ff90a Renesas ARM based SoC GPIO R-Car updates for v3.11
DT support to GPIO R-Car driver by Laurent Pinchart.
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Merge tag 'renesas-gpio-rcar-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

From Simon Horman:
Renesas ARM based SoC GPIO R-Car updates for v3.11

DT support to GPIO R-Car driver by Laurent Pinchart.

* tag 'renesas-gpio-rcar-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (131 commits)
  gpio-rcar: Add DT support
2013-06-14 17:45:39 -07:00
Olof Johansson
9440bd2342 Device tree patches for ux500, basically trees and auxdata:
- Fix for the thermal node to be contained in the PRCMU node
 - Add the DTS and auxdata needed to boot the U8540 platform
 - Various regulators added and renamed
 - Rename base SoC node
 - A bunch of DMA patches adding channels for DT boots
 - A bunch of crypto+hash patches adding config for DT boots
 - A bunch of patches fixing the ALSA SoC support to work
 - Register the LP5521 LEDs
 - Fix a number of typos and naming errors
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Merge tag 'ux500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt

From Linus Walleij:
Device tree patches for ux500, basically trees and auxdata:
- Fix for the thermal node to be contained in the PRCMU node
- Add the DTS and auxdata needed to boot the U8540 platform
- Various regulators added and renamed
- Rename base SoC node
- A bunch of DMA patches adding channels for DT boots
- A bunch of crypto+hash patches adding config for DT boots
- A bunch of patches fixing the ALSA SoC support to work
- Register the LP5521 LEDs
- Fix a number of typos and naming errors

* tag 'ux500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (39 commits)
  ARM: ux500: drop any 0x prefix from I2C DT devices
  ARM: ux500: Allocate correct amount of memory for the u8540 in DT
  ARM: ux500: Provide auxdata to ux500 ASoC driver
  ARM: ux500: Add DT regulators for ab8500-codec
  ARM: ux500: Correct anamic2 typo in DT files
  ARM: ux500: Fix trivial typo in v-anamic1 comment
  ARM: ux500: Reduce PRCMU reg-names to shorter form for u8540 DT
  ARM: ux500: Add an auxdata entry for MUSB for clock-name look-up
  ARM: ux500: cut chip-select GPIOs from SSP device
  ARM: ux500: use symbolic names for interrupt flags
  ARM: ux500: use #include syntax to include *.dtsi.
  ARM: ux500: bump MMC/SD max frequency for DT boots
  ARM: ux500: Apply other compatible name to the u8540 DTS file
  pinctrl/nomadik: Standardise Pinctrl compat string for DBx5x based platforms
  ARM: ux500: Standardise Pinctrl compatible string for DBx5x based platforms
  ARM: ux500: Standardise DBx5x0 based Pinctrl compat string in the DTS
  crypto: ux500/hash - Enable DT probing of the driver
  crypto: ux500/cryp - Enable DT probing of the driver
  ARM: ux500: enable the crypto and hash on all dbx500
  ARM: ux500: Provide an AUXDATA entry for ux500-hash
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-14 16:54:27 -07:00
Ulrich Hecht
fbd0ca3de1 sh-pfc: r8a7790: add HSCIF pin groups
Adds HSCIF data/clk/ctrl groups to R8A7790 PFC driver.

Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-12 17:40:26 +09:00
Guennadi Liakhovetski
6e8d1d41bb pinctrl: r8a73a4: add pinmux data for MMCIF and SDHI interfaces
This patch adds pinmux groups and functions for the two MMCIF and three
SDHI interfaces on r8a73a4 (APE6).

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-12 17:39:34 +09:00
Olof Johansson
ea36b02269 Merge branch 'clps711x/soc' into next/soc
From Alexander Shiyan, this is a series of cleanups of clps711x, movig it
closer to multiplatform and cleans up a bunch of old code.

* clps711x/soc:
  ARM: clps711x: Update defconfig
  ARM: clps711x: Add support for SYSCON driver
  ARM: clps711x: edb7211: Control LCD backlight via PWM
  ARM: clps711x: edb7211: Add support for I2C
  ARM: clps711x: Optimize interrupt handling
  ARM: clps711x: Add clocksource framework
  ARM: clps711x: Replace "arch_initcall" in common code with ".init_early"
  ARM: clps711x: Move specific definitions from hardware.h to boards files
  ARM: clps711x: p720t: Define PLD registers as GPIOs
  ARM: clps711x: autcpu12: Move remaining specific definitions to board file
  ARM: clps711x: autcpu12: Special driver for handling memory is removed
  ARM: clps711x: autcpu12: Add support for NOR flash
  ARM: clps711x: autcpu12: Move LCD DPOT definitions to board file
  ARM: clps711x: Set PLL clock to zero if we work from 13 mHz source
  ARM: clps711x: Remove NEED_MACH_MEMORY_H dependency
  ARM: clps711x: Re-add GPIO support
  GPIO: clps711x: Add DT support
  GPIO: clps711x: Rewrite driver for using generic GPIO code
  + Linux 3.10-rc4

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-11 15:57:51 -07:00
Kukjin Kim
0e81a3529e Merge branch 'v3.11-next/driver-pinctrl' into v3.11-next/s3c24xx-driver 2013-06-12 05:24:16 +09:00
Olof Johansson
fb565ff7c8 Renesas ARM based SoC fixes for v3.10
* Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
   This avoids conflicts when the USB_OVCn pins are used by another function.
   This has been observed to be a problem in v3.10-rc1.
 
 * Update CMT clock rating for sh73a0 SoC to resolve boot failure
   on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.
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Merge tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

From Simon Horman, Renesas ARM based SoC fixes for v3.10:
- Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
  This avoids conflicts when the USB_OVCn pins are used by another function.
  This has been observed to be a problem in v3.10-rc1.
- Update CMT clock rating for sh73a0 SoC to resolve boot failure
  on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.

* tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
  sh-pfc: r8a7779: Don't group USB OVC and PENC pins

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-07 18:11:02 -07:00
Phil Edworthy
b9ffcc2b12 pinctrl: sh-pfc: r8a7779: Fix missing MOD_SEL2 entry
The list of functions selected by the MOD_SEL2 register was missing
an entry. This caused all entries after this to modify the MOD_SEL2
register incorrectly.

This bug showed up when selecting i2c2_c pins on the Renesas Hurricane board.

This bug has been present since pinmux support was added for the
r8a7779 SoC by 881023d28b ("sh-pfc: Add
r8a7779 pinmux support") in v3.8-rc4.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:21 +09:00
Guennadi Liakhovetski
066f0d6eb7 pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfaces
This patch adds pinmux groups and functions for the two MMCIF and four
SDHI interfaces on r8a73a4 (APE6).

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:20 +09:00
Kuninori Morimoto
3ef2a776d1 sh-pfc: r8a7778: add MMCIF pin groups
Add MMCIF CLK/CMD/DATA groups to R8A7778 PFC driver.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:20 +09:00
Kuninori Morimoto
09cc76a958 sh-pfc: r8a7778: add HSPI pin groups
Add HSPI CLK/CS/RX/TX pin groups to R8A7778 PFC driver.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:19 +09:00
Kuninori Morimoto
0dcbc69e2b sh-pfc: r8a7778: add I2C pin groups
Add I2C SDA/SCL pin groups to R8A7778 PFC driver.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:19 +09:00
Guennadi Liakhovetski
7f35184b3d pinctrl: sh-pfc: fix a typo in pfc-r8a7790
Fix multiple occurrences of the "RESEVED" typo.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:18:13 +09:00
Guennadi Liakhovetski
17babad61d pinctrl: sh-pfc: fix r8a7790 Function Select register tables
Fix several errors in Peripheral Function Select register tables for
r8a7790, which prevent various function pins from being correctly
configured.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:20 +09:00
Kuninori Morimoto
d64d00504a sh-pfc: r8a7778: fixup IRQ1A settings
IP2[31] func2 is IRQ1A, not IRQ3A

Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:20 +09:00
Sergei Shtylyov
eca4e3b3cc sh-pfc: r8a7779: add Ether pin groups
Add Ether RMII/LINK/MAGIC pin groups to R8A7779 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:19 +09:00
Sergei Shtylyov
3c5886d145 sh-pfc: r8a7778: add Ether pin groups
Add Ether RMII/LINK/MAGIC pin groups to R8A7778 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:19 +09:00
Vladimir Barinov
2d7cd39870 sh-pfc: r8a7778: add VIN pin groups
Add VIN DATA[0:8]/CLK/HSYNC/VSYNC pin groups to R8A7778 PFC driver.
While at it, add SH_PFC_MUX8() macro for 8-bit data busses.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
[Sergei: updated the copyrights, added SH_PFC_MUX8() macro for 8-bit data bus,
made use of SH_PFC_*() macros to define the pin groups.]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:19 +09:00
Laurent Pinchart
a27c5cd1a0 sh-pfc: sh73a0: Remove function GPIOs
No sh73a0 platform use the function GPIOs API. Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:18 +09:00
Laurent Pinchart
682e05a14f sh-pfc: r8a7790: Add TPU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:18 +09:00
Laurent Pinchart
c2ad27e63d sh-pfc: r8a7740: Add TPU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:17 +09:00
Laurent Pinchart
5da4eb049d sh-pfc: sh73a0: Add TPU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:17 +09:00
Sergei Shtylyov
5cee53b6fc sh-pfc: r8a7778: add USB pin groups
Add USB0/1 PENC/USB_OVC pin groups to R8A7778 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:16 +09:00
Laurent Pinchart
ea770ad2ec sh-pfc: sh73a0: Add VCCQ MC0 regulator
The sh73a0 has an internal power gate on the VCCQ power supply for the
SDHI0 device that is controlled (for some strange reason) by a bit in a
PFC register. This feature should be exposed as a regulator.

As the same register is also used for pin control purposes there is no
way to achieve atomic read/write sequences with a separate regulator
driver. We thus need to implement the regulator here.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:14 +09:00
Laurent Pinchart
0c151062f3 sh-pfc: Add support for SoC-specific initialization
Add two optional init and exit SoC operations and call them from the
core at probe and remove time.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:13 +09:00
Kuninori Morimoto
0290df2d24 sh-pfc: r8a7778: tidyup SDHI naming suffixes and sort it alphabetically
SDHI 1/2 are the target

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:11 +09:00
Laurent Pinchart
0eef12d732 sh-pfc: r8a7778: Fix outdated GPIO_FN comments
Function GPIOs have been removed, remove comments that refer to them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:11 +09:00
Laurent Pinchart
80da8e02d2 sh-pfc: r8a7740: Add bias (pull-up/down) pinconf support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:10 +09:00
Laurent Pinchart
7d5684575c sh-pfc: r8a7740: Replace GPIO_PORTx enum with GPIO port numbers
The PFC GPIO API implementation moved to using port numbers. Replace all
GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx
enum values are identical to the port number on this platform.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:09 +09:00
Laurent Pinchart
d65c5ee14e sh-pfc: r8a7740: Remove function GPIOs
No r8a7740 platform use the function GPIOs API. Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-05 17:17:09 +09:00
Laurent Pinchart
0f7f51d82c sh-pfc: r8a7740: Remove HDMI function GPIOS
All r8a7740 platforms now use the pinctrl API to control the HDMI pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:34 +09:00
Laurent Pinchart
592e0c3029 sh-pfc: r8a7740: Remove FSI function GPIOS
All r8a7740 platforms now use the pinctrl API to control the FSI pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:34 +09:00
Laurent Pinchart
75c57d2c90 sh-pfc: r8a7740: Remove CEU function GPIOS
All r8a7740 platforms now use the pinctrl API to control the CEU pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:33 +09:00
Laurent Pinchart
3456e2543e sh-pfc: r8a7740: Remove GETHER function GPIOS
All r8a7740 platforms now use the pinctrl API to control the GETHER
pins, the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:33 +09:00
Laurent Pinchart
0be4e53913 sh-pfc: r8a7740: Remove BSC function GPIOS
All r8a7740 platforms now use the pinctrl API to control the BSC pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:32 +09:00
Laurent Pinchart
78c3e9b2a1 sh-pfc: r8a7740: Remove INTC function GPIOS
All r8a7740 platforms now use the pinctrl API to control the INTC pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:32 +09:00
Laurent Pinchart
aae36d71a3 sh-pfc: r8a7740: Remove SCIF function GPIOS
All r8a7740 platforms now use the pinctrl API to control the SCIF pins,
the corresponding function GPIOS are unused. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:31 +09:00
Laurent Pinchart
b79839024f sh-pfc: r8a7740: Hardcode the LCDC0 output
The r8a7740 has two LCDC units and two sets of LCDC output signals. By
default LCDC0 is routed to the LCD0 signals, and LCDC1 to the LCD1
signals. However, LCDC1 can be routed to the LCD0 signals by setting bit
MSEL6 in MSEL3CR (the LCD0 signals are further pinmuxed the usual way).

This could be configured by duplicating the LCD0 pin groups for LCDC1.
However, this would unnecessarily complicate the LCD pin groups, as no
r8a7740 board supported in mainline use such a configuration. Hardcode
the MSEL3CR MSEL6 bit to 0 for now.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:25 +09:00
Laurent Pinchart
a37d60659f sh-pfc: r8a7740: Add HDMI pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:25 +09:00
Laurent Pinchart
909dd95f13 sh-pfc: r8a7740: Add FSI pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:24 +09:00
Laurent Pinchart
0ec939bd75 sh-pfc: r8a7740: Add CEU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:24 +09:00
Laurent Pinchart
bae11d30d0 sh-pfc: r8a7740: Add GETHER pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:23 +09:00
Laurent Pinchart
b7099c498b sh-pfc: r8a7740: Add BSC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:23 +09:00
Laurent Pinchart
d031696e02 sh-pfc: r8a7740: Declare missing INTC function
When adding the INTC pin groups the INTC function hasn't been added to
the functions list. Fix it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:22 +09:00
Laurent Pinchart
cdd2c76935 sh-pfc: r8a7740: Add SCIF pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:22 +09:00
Laurent Pinchart
7cacd75559 sh-pfc: sh7372: Add bias (pull-up/down) pinconf support
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:21 +09:00
Laurent Pinchart
15dba8a454 sh-pfc: sh7372: Remove function GPIOs
No sh7372 platform use the function GPIOs API. Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:21 +09:00
Laurent Pinchart
4e65c958d3 sh-pfc: sh7372: Replace GPIO_PORTx enum with GPIO port numbers
The PFC GPIO API implementation moved to using port numbers. Replace all
GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx
enum values are identical to the port number on this platform.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:20 +09:00
Laurent Pinchart
e04662d69b sh-pfc: sh7372: Add USB pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:10 +09:00
Laurent Pinchart
ddc3296179 sh-pfc: sh7372: Add SCIF pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:09 +09:00
Laurent Pinchart
f3e03eb825 sh-pfc: sh7372: Add LCDC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:09 +09:00
Laurent Pinchart
41eb7d605e sh-pfc: sh7372: Add KEYSC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:08 +09:00
Laurent Pinchart
4d0882963e sh-pfc: sh7372: Add INTC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:08 +09:00
Laurent Pinchart
7231fa45e9 sh-pfc: sh7372: Add HDMI pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:07 +09:00
Laurent Pinchart
971a0cd6dc sh-pfc: sh7372: Add FSI pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:07 +09:00
Laurent Pinchart
8b1b71d3a8 sh-pfc: sh7372: Add FLCTL pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:06 +09:00
Laurent Pinchart
d4d1c6538e sh-pfc: sh7372: Add CEU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:06 +09:00
Laurent Pinchart
e68e641543 sh-pfc: sh7372: Add BSC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:05 +09:00
Kuninori Morimoto
564617d2f9 sh-pfc: r8a7778: add SDHI support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:05 +09:00
Kuninori Morimoto
a10cd30ed6 sh-pfc: r8a7778: add common PFC macro helper
pfc-r8a7778 will have many devices pfc support in the future,
and current pfc-r8a7778 is using pin/mux definition macro for SCIF.
The device definition style using macro is readable code IMO,
but creating new macro for each devices is not good sense.
This patch adds common SH_PFC_xx() macro for each new feature devices

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:04 +09:00
Vladimir Barinov
54ee73c6f5 sh-pfc: r8a7779: add VIN pin groups
Add VIN DATA[0:7]/CLK/HSYNC/VSYNC pin groups to R8A7779 PFC driver.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
[horms+renesas@verge.net.au: trivial rebase on top of
 "sh-pfc: r8a7779: Don't group USB OVC and PENC pins"]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:04 +09:00
Kuninori Morimoto
de9edf7d2c sh-pfc: r8a7779: use RCAR_GP_PIN() on _GP_GPIO() macro
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:03 +09:00
Laurent Pinchart
e21ea1977c sh-pfc: r8a7779: Replace hardcoded pin numbers with RCAR_GP_PIN macro
Use the RCAR_GP_PIN macro to convert from the documentation pin number
space to the linear pinctrl space.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:03 +09:00
Bastian Hecht
8fbfdbbb04 sh-pfc: r8a7740: Add SCIFA1 data group
Add SCIFA1 as preparation to switch to pinctrl in board files.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:02 +09:00
Kuninori Morimoto
87f8c98863 sh-pfc: Add r8a7778 pinmux support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
2013-06-04 21:04:02 +09:00
Laurent Pinchart
ed3e26049e sh-pfc: r8a7790: Don't use GPIO enum entries
Refactor the GPIO macro magic to use GPIO numbers directly instead of
the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum
entries from the mach/r8a7790.h header.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:01 +09:00
Laurent Pinchart
728d53f4a4 sh-pfc: r8a7790: Remove function GPIOs
No r8a7770 platform use the function GPIOs API. Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[horms+renesas@verge.net.au: fixed typo in changelog: r8a7779 -> r8a7770]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:01 +09:00
Laurent Pinchart
30e4247e5b sh-pfc: r8a7790: Remove GPIO data
GPIOs are now handled by a separate driver, remove GPIO data from the
SoC information structure.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:00 +09:00
Laurent Pinchart
45c6c85d13 sh-pfc: r8a7790: Add SCIF, SCIFA and SCIFB pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:00 +09:00
Laurent Pinchart
04e7ce78e0 sh-pfc: r8a7790: Add INTC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:04:00 +09:00
Laurent Pinchart
1627769b5f sh-pfc: r8a7790: Add ETH pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:03:59 +09:00
Laurent Pinchart
bf9f0674e3 sh-pfc: Remove dependency on GPIOLIB
Make GPIO support optional for platforms that don't support GPIOLIB.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:03:59 +09:00
Bastian Hecht
09bbc1fd03 sh-pfc: Add entries for INTC external IRQs
We add all necessary entries to support the external IRQs from the INTC.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:03:58 +09:00
Koji Matsuoka
58c229e18b sh-pfc: Initial r8a7790 PFC support
Add initial PFC support for the r8a7790 SoC.

At this point only GPIO interface is supported, move to
newer interfaces planned as incremental changes.

Original authors is Koji Matsuoka-san, thanks for him
and his team for the heavy lifting. Adjusted by Magnus
to work together with updated code in drivers/pinctrl.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@rms.renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 21:03:58 +09:00
Laurent Pinchart
350753bf2b sh-pfc: r8a7779: Don't group USB OVC and PENC pins
The USB_OVCn pins are alternate options for USB over-current detection
when using a 3.3V USB interface. As they're not mandatory they can be
used independently of the USB PENC pins. Don't group the USB_OVCn and
PENC pins to avoid conflicts when the USB_OVCn pins are used by another
function.

Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 14:37:43 +09:00
Linus Walleij
351c2163f9 pinctrl: coh901: add device tree support
This makes it possible to probe the COH901 pinctrl driver from
the device tree, and assigned the device tree node in the
gpio_chip so we can look up cross-references from the device
tree. Start grabbing the per-port (bank) IRQs by index instead
of by name so we don't have to look up the IRQs by name going
forward.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-31 11:25:45 +02:00
Linus Walleij
21a035db89 pinctrl: u300 device tree support
This adds a simple device tree compat string for the U300 pin
controller. The base address is already passed properly as
a resource and everything works fine.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-31 11:24:50 +02:00
Lee Jones
3fd765a917 pinctrl/nomadik: Standardise Pinctrl compat string for Nomadik based platforms
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-28 16:27:15 +02:00