Commit Graph

9 Commits

Author SHA1 Message Date
Sebastian Hesselbarth
ea7e0bd7e7 clk: mvebu: disintegrate obsolete file
Switch from function-centric to soc-centric clock drivers now makes
a bunch of files obsolete. This deletes all files and Kconfig options
that are not required anymore.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:28:29 +00:00
Sebastian Hesselbarth
68be12bda2 clk: mvebu: add Armada XP SoC-centric clock init
This is moving core clock and clock gating init for Armada XP to
its own file and adds a Kconfig option. Also init functions are added
and declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:59 +00:00
Sebastian Hesselbarth
6b72333d5b clk: mvebu: add Armada 370 SoC-centric clock init
This is moving core clock and clock gating init for Armada 370 to
its own file and adds a Kconfig option. Also init functions are added
and declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:51 +00:00
Sebastian Hesselbarth
e89406c957 clk: mvebu: add Kirkwood SoC-centric clock init
This is moving core clock and clock gating init for Kirkwood to its
own file and adds a Kconfig option. Also init functions are added and
declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:38 +00:00
Sebastian Hesselbarth
5d8401668e clk: mvebu: add Dove SoC-centric clock init
This is moving core clock and clock gating init for Dove to its own
file and adds a Kconfig option. Also init functions are added and
declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:30 +00:00
Sebastian Hesselbarth
a45184099a clk: mvebu: add common clock functions for core clk and clk gating
Based on the current common functions for core clocks and clock
gating control, new common functions are joined in a single file.
Given the opportunity, names of functions and structs are unified,
and also a Kconfig entry is added.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:22 +00:00
Sebastian Hesselbarth
f97d0d7aa8 clk: mvebu: add clock gating control provider for DT
This driver allows to provide DT clocks for clock gates found on
Marvell Dove and Kirkwood SoCs. The clock gates are referenced by
the phandle index of the corresponding bit in the clock gating control
register to ease lookup in the datasheet.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2012-11-20 14:43:24 +01:00
Gregory CLEMENT
ab8ba01b3f clk: mvebu: add armada-370-xp CPU specific clocks
Add Armada 370/XP specific CPU clocks

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-20 14:35:42 +01:00
Sebastian Hesselbarth
97fa4cf442 clk: mvebu: add mvebu core clocks.
This driver allows to provide DT clocks for core clocks found on
Marvell Kirkwood, Dove & 370/XP SoCs. The core clock frequencies and
ratios are determined by decoding the Sample-At-Reset registers.

Although technically correct, using a divider of 0 will lead to
div_by_zero panic. Let's use a ratio of 0/1 instead to fail later
with a zero clock.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-20 14:34:08 +01:00