2000 Commits

Author	SHA1	Message	Date
Linus Torvalds	a5255bc316	dmaengine updates for v5.5-rc1 ... - New drivers for SiFive PDMA, Socionext Milbeaut HDMAC and XDMAC, Freescale dpaa2 qDMA - Support for X1000 in JZ4780 - Xilinx dma updates and support for Xilinx AXI MCDM controller - New bindings for rcar R8A774B1 - Minor updates to dw, dma-jz4780, ti-edma, sprd drivers -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAl3gqOEACgkQfBQHDyUj g0fD5A//cXMPYTZvVtuEIEMfaN6wGexJVQFuRpvHfFyGw8dHijKB/zySne8xPM8E WuWwI9cpn29AgEa5ZR8wUHgNupA1w9owuuGWAtdVf9qKqg2iqyQDfm3768LQ9DAa V+Fi68g0uou/NIS58cGAqqDvBFc6Gd7VCjkxvcUSq7r0diWAN2CH16332Oyzqb99 PPvvGwnsryTcrOyPilKhyLPaCCNfFqBke4FLFLK6hAv3fZAs2uOTDESjgwTaLxon dkZY5L7HqOa1jMkuCxLUt9YH5QvTmjspRHY8ck9zgeNDql6y+qPkS9ifj48+mMIu jy1KroOcLwMXE/eFrBH4NHFA6wTXyGhJY7i7zVLLjHTgivQ6IVF/6FG9jCvSLgRf UgGgRQ6qKlKPkNHLT0GwkAR/oVEBb7Z2ff0AXQXq2cudF85Uuccahj/uocjZrEg5 v/yZ6X/jZy5MeDsG41Af2sSS8rLP/F2GAr9voo6/yhklzaRPRR4AL8e33PYeCW94 pU2DlXtkdotFpv9fLlxpKotGYAZ3VWX8darKOF0uRmJX8QSxjLRS4Br558NIhX+I 4kizRHqJrihwjb/fLdVNKi+X+VdwVNjzWNmuADdksT00QUOdbked5a3vHBqX3gkR ztRiv0Qw8oOVJSCItLMLto3ckVUGav7HmeX4/pea2h9sxhkn/nk= =bDMV -----END PGP SIGNATURE----- Merge tag 'dmaengine-5.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma Pull dmaengine updates from Vinod Koul: "Here are the changes this time around, couple of new drivers and updates to few more: - New drivers for SiFive PDMA, Socionext Milbeaut HDMAC and XDMAC, Freescale dpaa2 qDMA - Support for X1000 in JZ4780 - Xilinx dma updates and support for Xilinx AXI MCDM controller - New bindings for rcar R8A774B1 - Minor updates to dw, dma-jz4780, ti-edma, sprd drivers" * tag 'dmaengine-5.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (61 commits) dmaengine: Fix Kconfig indentation dmaengine: sf-pdma: move macro to header file dmaengine: sf-pdma: replace /** with /* for non-function comment dmaengine: ti: edma: fix missed failure handling dmaengine: mmp_pdma: add missed of_dma_controller_free dmaengine: mmp_tdma: add missed of_dma_controller_free dmaengine: sprd: Add wrap address support for link-list mode MAINTAINERS: Add Green as SiFive PDMA driver maintainer dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00 dt-bindings: dmaengine: sf-pdma: add bindins for SiFive PDMA dmaengine: zx: remove: removed dmam_pool_destroy dmaengine: mediatek: hsdma_probe: fixed a memory leak when devm_request_irq fails dmaengine: iop-adma: clean up an indentation issue dmaengine: milbeaut-xdmac: remove redundant error log dmaengine: milbeaut-hdmac: remove redundant error log dmaengine: dma-jz4780: add missed clk_disable_unprepare in remove dmaengine: JZ4780: Add support for the X1000. dt-bindings: dmaengine: Add X1000 bindings. dmaengine: xilinx_dma: Add Xilinx AXI MCDMA Engine driver support dmaengine: xilinx_dma: Extend dma_config struct to store irq routine handle ...	2019-12-02 11:00:19 -08:00
Linus Torvalds	ddebe839c6	This merge window we have one small clk provider API in the core framework and ... then a bunch of driver updates and a handful of new drivers. In terms of diffstat the Qualcomm and Amlogic drivers are high up there because of all the clk data introcued by new drivers. The Nvidia Tegra driver had a lot of work done this cycle too to support suspend/resume and memory controllers. And the OMAP clk driver got proper clk and reset handling in place. Rounding out the patches are various updates to remove unused data, mark things static, correct incorrect data in drivers, etc. All the little things that improve drivers and maintain code health. I will point out that there's a patch in here for the GPIO clk driver, that almost nobody uses, which changes behavior and causes clk_set_rate() to try to change the GPIO gate clk's parent. Other than that things are fairly well SoC specific here. Core: - Add a clk provider API to get current parent index - Plug a memory leak in clk_unregister() path New Drivers: - CGU in Ingenix X1000 - Bitmain BM1880 clks - Qualcomm MSM8998 GPU clk controllers - Qualcomm SC7180 GCC and RPMH clk controllers - Qualcomm QCS404 Q6SSTOP clk controllers - Add support for the Renesas R-Car M3-W+ (r8a77961) SoC - Add support for the Renesas RZ/G2N (r8a774b1) SoC - Add Tegra20/30 External Memory Clock (EMC) support Updates: - Make gpio gate clks propagate rate setting up to parent - Prepare Armada 3700 for suspend to RAM by moving PCIe suspend/resume priority - Drop unused variables, enums, etc. in various clk drivers - Convert various drivers to use devm_platform_ioremap_resource() - Use struct_size() some more in various clk drivers - Improve Rockchip px30 clk tree - Add suspend/resume support to Tegra210 clk driver - Reimplement SOR clks on earlier Tegra SoCs, helping HDMI and DP - Allwinner DT exports and H6 clk tree fixes - Proper clk and reset handling for OMAP SoCs - Revamped TI divider clk to clamp max divider - Make 1443X/1416X PLL clock structure common for reusing among i.MX8 SoCs - Drop IMX7ULP_CLK_MIPI_PLL clock, it shouldn't be used - Add VIDEO2_PLL clock for imx8mq - Add missing gate clock for pll1/2 fixed dividers on i.MX8 SoCs - Add sm1 support in the Amlogic audio clock controller - Switch some clocks on R-Car Gen2/3 to .determine_rate() - Remove Renesas R-Car Gen2 legacy DT clock support - Improve arithmetic divisions on Renesas R-Car Gen2 and Gen3 - Improve Renesas R-Car Gen3 SD clock handling - Add rate table for Samsung exynos542x GPU and VPLL clks - Fix potential CPU performance degradation after system suspend/resume cycle on exynos542x SoCs -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl3e6rMRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSUtWQ//a3epm5t5lQHZjhDJFLYXqavzkGTLcDnF 2+HWNwxLGatvmFqvLAxpB9QlFUntLOdQwjsI47UGKLVNwtXzqafl2yQGrMNYsdR+ 6ka0zkytPRuRr+C6cUYUxaoLviDMKi/PXrluOawXbdQ1ZL/5TgURkmEgGglp4Mti QHp2HO7uSk9pYA8T3TUK+hd9cqLXqW4xMn8MohuWfF3JxoquixOg+N7pE/OeGUyW NueWWvwKJ86Gtx+OxY8bW3afAzstUynxCUDLC/t7a5y52jxGCwuhHTC/pNcDgYFC z1H0rnoKG3pE74mm11Mh//zneoqvyzrWYGU6TNcaTxVgODogklGYY6doRLelZ0qc 4HFSqrtkUtx+lI++9Q73LcX5xdogTGxOnNv/hr3rCCR/w9tFmys14JKnfUDQCbhj qRTFlr9IkIkhfCiRw5+zNo0oRf/hE7IOgYdU2ju31j4w/V5r8TUKPTq2VBh2sJaG MJKQclaIBJOV5sxgJrI/XoocTes7H3WR0w5rSB1askbhzQnKkrhctPOEB6Rkvtyv 27z5VZb1AmPdYaa6TtHVZ5SQOB3Y9JaEl6t89X61kxk7mgylZlwhASUuBVRZpz53 WIjNfquYGpWnA+vc+SWnlMnaymqtlatGig8k8atdDn+eMiXphktL+gObIF1OFnm1 AhGhUxXf/Aw= =qJNg -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This merge window we have one small clk provider API in the core framework and then a bunch of driver updates and a handful of new drivers. In terms of diffstat the Qualcomm and Amlogic drivers are high up there because of all the clk data introcued by new drivers. The Nvidia Tegra driver had a lot of work done this cycle too to support suspend/resume and memory controllers. And the OMAP clk driver got proper clk and reset handling in place. Rounding out the patches are various updates to remove unused data, mark things static, correct incorrect data in drivers, etc. All the little things that improve drivers and maintain code health. I will point out that there's a patch in here for the GPIO clk driver, that almost nobody uses, which changes behavior and causes clk_set_rate() to try to change the GPIO gate clk's parent. Other than that things are fairly well SoC specific here. Core: - Add a clk provider API to get current parent index - Plug a memory leak in clk_unregister() path New Drivers: - CGU in Ingenix X1000 - Bitmain BM1880 clks - Qualcomm MSM8998 GPU clk controllers - Qualcomm SC7180 GCC and RPMH clk controllers - Qualcomm QCS404 Q6SSTOP clk controllers - Add support for the Renesas R-Car M3-W+ (r8a77961) SoC - Add support for the Renesas RZ/G2N (r8a774b1) SoC - Add Tegra20/30 External Memory Clock (EMC) support Updates: - Make gpio gate clks propagate rate setting up to parent - Prepare Armada 3700 for suspend to RAM by moving PCIe suspend/resume priority - Drop unused variables, enums, etc. in various clk drivers - Convert various drivers to use devm_platform_ioremap_resource() - Use struct_size() some more in various clk drivers - Improve Rockchip px30 clk tree - Add suspend/resume support to Tegra210 clk driver - Reimplement SOR clks on earlier Tegra SoCs, helping HDMI and DP - Allwinner DT exports and H6 clk tree fixes - Proper clk and reset handling for OMAP SoCs - Revamped TI divider clk to clamp max divider - Make 1443X/1416X PLL clock structure common for reusing among i.MX8 SoCs - Drop IMX7ULP_CLK_MIPI_PLL clock, it shouldn't be used - Add VIDEO2_PLL clock for imx8mq - Add missing gate clock for pll1/2 fixed dividers on i.MX8 SoCs - Add sm1 support in the Amlogic audio clock controller - Switch some clocks on R-Car Gen2/3 to .determine_rate() - Remove Renesas R-Car Gen2 legacy DT clock support - Improve arithmetic divisions on Renesas R-Car Gen2 and Gen3 - Improve Renesas R-Car Gen3 SD clock handling - Add rate table for Samsung exynos542x GPU and VPLL clks - Fix potential CPU performance degradation after system suspend/resume cycle on exynos542x SoCs" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (160 commits) clk: aspeed: Add RMII RCLK gates for both AST2500 MACs MAINTAINERS: Add entry for BM1880 SoC clock driver clk: Add common clock driver for BM1880 SoC dt-bindings: clock: Add devicetree binding for BM1880 SoC clk: Add clk_hw_unregister_composite helper function definition clk: Zero init clk_init_data in helpers clk: ingenic: Allow drivers to be built with COMPILE_TEST MAINTAINERS: Update section for Ux500 clock drivers clk: mark clk_disable_unused() as __init clk: Fix memory leak in clk_unregister() clk: Ingenic: Add CGU driver for X1000. dt-bindings: clock: Add X1000 bindings. clk: tegra: Use match_string() helper to simplify the code clk: pxa: fix one of the pxa RTC clocks clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_by_phandle() clk: armada-xp: remove unused code clk: tegra: Fix build error without CONFIG_PM_SLEEP clk: tegra: Add missing stubs for the case of !CONFIG_PM_SLEEP clk: tegra: Optimize PLLX restore on Tegra20/30 clk: tegra: Add suspend and resume support on Tegra210 ...	2019-12-01 16:06:02 -08:00
Linus Torvalds	0dd09bc02c	Staging / IIO patches for 5.5-rc1 ... Here is the big staging and iio set of patches for the 5.5-rc1 release. It's the usual huge collection of cleanup patches all over the drivers/staging/ area, along with a new staging driver, and a bunch of new IIO drivers as well. Full details are in the shortlog, but all of these have been in linux-next for a long time with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXd6lVQ8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ylFnwCgyvZ62uUyQTRey0zvNTe3I4fY9L4AnAnrz3ZC U6ZA2+Uj3O6qhAr5frRu =uv8S -----END PGP SIGNATURE----- Merge tag 'staging-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging / iio updates from Greg KH: "Here is the big staging and iio set of patches for the 5.5-rc1 release. It's the usual huge collection of cleanup patches all over the drivers/staging/ area, along with a new staging driver, and a bunch of new IIO drivers as well. Full details are in the shortlog, but all of these have been in linux-next for a long time with no reported issues" * tag 'staging-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (548 commits) staging: vchiq: Have vchiq_dump_* functions return an error code staging: vchiq: Refactor indentation in vchiq_dump_* functions staging: fwserial: Fix Kconfig indentation (seven spaces) staging: vchiq_dump: Replace min with min_t staging: vchiq: Fix block comment format in vchiq_dump() staging: octeon: indent with tabs instead of spaces staging: comedi: usbduxfast: usbduxfast_ai_cmdtest rounding error staging: most: core: remove sysfs attr remove_link staging: vc04: Fix Kconfig indentation staging: pi433: Fix Kconfig indentation staging: nvec: Fix Kconfig indentation staging: most: Fix Kconfig indentation staging: fwserial: Fix Kconfig indentation staging: fbtft: Fix Kconfig indentation fbtft: Drop OF dependency fbtft: Make use of device property API fbtft: Drop useless #ifdef CONFIG_OF and dead code fbtft: Describe function parameters in kernel-doc fbtft: Make sure string is NULL terminated staging: rtl8723bs: remove set but not used variable 'change', 'pos' ...	2019-11-27 10:57:52 -08:00
Linus Torvalds	8f56e4ebe0	Char/Misc driver patches for 5.5-rc1 ... Here is the big set of char/misc and other driver patches for 5.5-rc1 Loads of different things in here, this feels like the catch-all of driver subsystems these days. Full details are in the shortlog, but nothing major overall, just lots of driver updates and additions. All of these have been in linux-next for a while with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXd6ewA8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ymNXACfebVkDrFOH9EqDgFArPvZ1i9EmZ4AoLbE1Wki ftJApk+Ov1BT2TvClOza =cXqg -----END PGP SIGNATURE----- Merge tag 'char-misc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big set of char/misc and other driver patches for 5.5-rc1 Loads of different things in here, this feels like the catch-all of driver subsystems these days. Full details are in the shortlog, but nothing major overall, just lots of driver updates and additions. All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (198 commits) char: Fix Kconfig indentation, continued habanalabs: add more protection of device during reset habanalabs: flush EQ workers in hard reset habanalabs: make the reset code more consistent habanalabs: expose reset counters via existing INFO IOCTL habanalabs: make code more concise habanalabs: use defines for F/W files habanalabs: remove prints on successful device initialization habanalabs: remove unnecessary checks habanalabs: invalidate MMU cache only once habanalabs: skip VA block list update in reset flow habanalabs: optimize MMU unmap habanalabs: prevent read/write from/to the device during hard reset habanalabs: split MMU properties to PCI/DRAM habanalabs: re-factor MMU masks and documentation habanalabs: type specific MMU cache invalidation habanalabs: re-factor memory module code habanalabs: export uapi defines to user-space habanalabs: don't print error when queues are full habanalabs: increase max jobs number to 512 ...	2019-11-27 10:53:50 -08:00
Linus Torvalds	dc5fa46568	This is the bulk of pin control changes for the v5.5 kernel ... series: Core changes: - Avoid taking direct references to device tree-supplied device names: these may changed at runtime under certain circumstances to kstrdup them. GPIO related: - Work is ongoing to move to passing the irqchip along as a templated struct gpio_irq_chip when adding a standard gpiolib-based irqchip to a GPIO controller, a few patches in this cycle switches a few pin control drivers over to using this method. New hardware support: - Intel Lightning Mountain SoC pin controller and GPIO support, a first Intel platform to use device tree rather than ACPI to configure the system. News reports says that this SoC is a network processor. - Qualcomm MSM8976 and MSM8956 - Qualcomm PMIC GPIO now also supports PM6150 and PM6150L - Qualcomm SPMI MPP and SPMI GPIO for PM8950 and PMI8950 - Rockchip RK3308 - Renesas R8A77961 - Allwinner Meson-A1 Driver improvements: - get_multiple and set_multiple support for the AT91-PIO4 driver. - Convert Qualcomm SSBI GPIO to use the hierarchical IRQ helpers in the GPIOlib irqchip. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl3dPAMACgkQQRCzN7AZ XXOckA/+K8++XpN15+DR3tWD6QOKU1pXH9Mam/41yDi5eHJZ8TOTZA9V3rXvy53e 6QYj0OOXnbLm0UhcbJRA2lOPFLHlaK3aZExfQcNT4U/qklZxyteJ8fxNFDzADqAd 7FrrdrWBW8bJw4GwGeV0jwjJENUAQ2WJ3W9rHX3WDoABIMEqxBmZtPmcK+HpnZFW P6Gt0kMDS70IE4W+2IzXhpKWE41IwH6WV8QqOnCN1aIwmI9KhsFJ3WlbiowcRZoS yyDgLryt5gEvSIZNzG0rnOC+Mn21gQn3KyuQdGalm4OfW2TT7IuPXJF/ZT502lGv ypIhdjxwSIn4OxexS80j5HG8p/RNP2qjK3z8WBwh+IVUepPSV89kuk1lzH66B8VO FXnH+lhd1WJTttBkcjHOO/pkK09WTO1MOyu+iYXZQ/cYJADCHL/KHvK30unuvrL4 J/npJbOzxzbxor/132hrjJCFo9VHDViInWrt4lC2MaBi3gBcsgukROBYIqCBHO7T UtdemwB056sYr3WtwAsJ5GsBkFhhFmWUBf5i/hWGFT3vcop55Lnlo4HZ5ipSxjIc 1NAuymO/xyH6uDhQhfN7h7Dxc8fLYmslvOyiCROVxBBnzP0Am3UAb/fL7RXztHle v1E4786GH/IGL6Q1q2U2NTNfAm2CPdB/yF2pN1DluIM+U1spAKU= =uPLY -----END PGP SIGNATURE----- Merge tag 'pinctrl-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for v5.5. It is pretty much business as usual, the most interesting thing I think is the pin controller for a new Intel chip called Lightning Mountain, which is according to news reports some kind of embedded network processor and what is surprising about it is that Intel have decided to use device tree to describe the system rather than ACPI that they have traditionally favored. Core changes: - Avoid taking direct references to device tree-supplied device names: these may changed at runtime under certain circumstances to kstrdup them. GPIO related: - Work is ongoing to move to passing the irqchip along as a templated struct gpio_irq_chip when adding a standard gpiolib-based irqchip to a GPIO controller, a few patches in this cycle switches a few pin control drivers over to using this method. New hardware support: - Intel Lightning Mountain SoC pin controller and GPIO support, a first Intel platform to use device tree rather than ACPI to configure the system. News reports says that this SoC is a network processor. - Qualcomm MSM8976 and MSM8956 - Qualcomm PMIC GPIO now also supports PM6150 and PM6150L - Qualcomm SPMI MPP and SPMI GPIO for PM8950 and PMI8950 - Rockchip RK3308 - Renesas R8A77961 - Allwinner Meson-A1 Driver improvements: - get_multiple and set_multiple support for the AT91-PIO4 driver. - Convert Qualcomm SSBI GPIO to use the hierarchical IRQ helpers in the GPIOlib irqchip" * tag 'pinctrl-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (93 commits) pinctrl: ingenic: Add OTG VBUS pin for the JZ4770 pinctrl: ingenic: Handle PIN_CONFIG_OUTPUT config pinctrl: Fix Kconfig indentation pinctrl: lewisburg: Update pin list according to v1.1v6 MAINTAINERS: Replace my email by one @kernel.org pinctrl: armada-37xx: Fix irq mask access in armada_37xx_irq_set_type() dt-bindings: pinctrl: intel: Add for new SoC pinctrl: Add pinmux & GPIO controller driver for a new SoC pinctrl: rza1: remove unnecessary static inline function pinctrl: meson: add pinctrl driver support for Meson-A1 SoC pinctrl: meson: add a new callback for SoCs fixup pinctrl: nomadik: db8500: Add mc0_a_2 pin group without direction control dt-bindings: pinctrl: Convert generic pin mux and config properties to schema pinctrl: cherryview: Missed type change to unsigned int pinctrl: intel: Missed type change to unsigned int pinctrl: use devm_platform_ioremap_resource() to simplify code pinctrl: just return if no valid maps dt-bindings: pinctrl: qcom-pmic-mpp: Add support for PM/PMI8950 pinctrl: qcom: spmi-mpp: Add PM/PMI8950 compatible strings dt-bindings: pinctrl: qcom-pmic-gpio: Add support for PM/PMI8950 ...	2019-11-27 10:00:33 -08:00
Stephen Boyd	ec16ffe36d	Merge branches 'clk-ingenic', 'clk-init-leak', 'clk-ux500' and 'clk-bitmain' into clk-next ... - Support CGU in Ingenix X1000 - Support Bitmain BM1880 clks * clk-ingenic: clk: ingenic: Allow drivers to be built with COMPILE_TEST clk: Ingenic: Add CGU driver for X1000. dt-bindings: clock: Add X1000 bindings. * clk-init-leak: clk: mark clk_disable_unused() as __init clk: Fix memory leak in clk_unregister() * clk-ux500: MAINTAINERS: Update section for Ux500 clock drivers * clk-bitmain: MAINTAINERS: Add entry for BM1880 SoC clock driver clk: Add common clock driver for BM1880 SoC dt-bindings: clock: Add devicetree binding for BM1880 SoC clk: Add clk_hw_unregister_composite helper function definition clk: Zero init clk_init_data in helpers	2019-11-27 08:15:13 -08:00
Stephen Boyd	dabedfede3	Merge branches 'clk-gpio-flags', 'clk-tegra', 'clk-rockchip', 'clk-sprd' and 'clk-pxa' into clk-next ... - Make gpio gate clks propagate rate setting up to parent * clk-gpio-flags: clk: clk-gpio: propagate rate change to parent * clk-tegra: (23 commits) clk: tegra: Use match_string() helper to simplify the code clk: tegra: Fix build error without CONFIG_PM_SLEEP clk: tegra: Add missing stubs for the case of !CONFIG_PM_SLEEP clk: tegra: Optimize PLLX restore on Tegra20/30 clk: tegra: Add suspend and resume support on Tegra210 clk: tegra: Share clk and rst register defines with Tegra clock driver clk: tegra: Use fence_udelay() during PLLU init clk: tegra: clk-dfll: Add suspend and resume support clk: tegra: clk-super: Add restore-context support clk: tegra: clk-super: Fix to enable PLLP branches to CPU clk: tegra: periph: Add restore_context support clk: tegra: Support for OSC context save and restore clk: tegra: pll: Save and restore pll context clk: tegra: pllout: Save and restore pllout context clk: tegra: divider: Save and restore divider rate clk: tegra: Reimplement SOR clocks on Tegra210 clk: tegra: Reimplement SOR clock on Tegra124 clk: tegra: Rename sor0_lvds to sor0_out clk: tegra: Move SOR0 implementation to Tegra124 clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC ... * clk-rockchip: clk: rockchip: protect the pclk_usb_grf as critical on px30 clk: rockchip: add video-related niu clocks as critical on px30 clk: rockchip: move px30 critical clocks to correct clock controller clk: rockchip: Add div50 clocks for px30 sdmmc, emmc, sdio and nandc clk: rockchip: Add div50 clock-ids for sdmmc on px30 and nandc clk: rockchip: make clk_half_divider_ops static * clk-sprd: clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_by_phandle() * clk-pxa: clk: pxa: fix one of the pxa RTC clocks	2019-11-27 08:15:00 -08:00
Stephen Boyd	6df24d0c2f	Merge branches 'clk-ti', 'clk-allwinner', 'clk-qcom', 'clk-sa' and 'clk-aspeed' into clk-next ... - Qualcomm MSM8998 GPU clk controllers - Qualcomm SC7180 GCC and RPMH clk controllers - Qualcomm QCS404 Q6SSTOP clk controllers - Use struct_size() some more in various clk drivers * clk-ti: clk/ti/adpll: allocate room for terminating null ARM: dts: omap3: fix DPLL4 M4 divider max value clk: ti: divider: convert to use min,max,mask instead of width clk: ti: divider: cleanup ti_clk_parse_divider_data API clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table clk: ti: am43xx: drop idlest polling from gfx clock clk: ti: am33xx: drop idlest polling from gfx clock clk: ti: am33xx: drop idlest polling from pruss clkctrl clock clk: ti: am43xx: drop idlest polling from pruss clkctrl clock clk: ti: omap5: Drop idlest polling from IPU & DSP clkctrl clocks clk: ti: omap4: Drop idlest polling from IPU & DSP clkctrl clocks clk: ti: dra7xx: Drop idlest polling from IPU & DSP clkctrl clocks clk: ti: omap5: add IVA subsystem clkctrl data dt-bindings: clk: add omap5 iva clkctrl definitions clk: ti: clkctrl: add new exported API for checking standby info clk: ti: clkctrl: convert to use bit helper macros instead of bitops clk: ti: clkctrl: fix setting up clkctrl clocks * clk-allwinner: clk: sunxi-ng: h3: Export MBUS clock clk: sunxi-ng: h6: Allow GPU to change parent rate clk: sunxi-ng: h6: Use sigma-delta modulation for audio PLL * clk-qcom: clk: qcom: rpmh: Reuse sdm845 clks for sm8150 clk: qcom: Add MSM8998 GPU Clock Controller (GPUCC) driver clk: qcom: Allow constant ratio freq tables for rcg clk: qcom: smd: Add missing pnoc clock clk: qcom: Enumerate clocks and reset needed to boot the 8998 modem clk: qcom: clk-rpmh: Add support for RPMHCC for SC7180 dt-bindings: clock: Introduce RPMHCC bindings for SC7180 dt-bindings: clock: Add YAML schemas for the QCOM RPMHCC clock bindings clk: qcom: Add Global Clock controller (GCC) driver for SC7180 dt-bindings: clock: Add sc7180 GCC clock binding dt-bindings: clock: Add YAML schemas for the QCOM GCC clock bindings clk: qcom: common: Return NULL from clk_hw OF provider clk: qcom: rcg: update the DFS macro for RCG clk: qcom: remove unneeded semicolon clk: qcom: Add Q6SSTOP clock controller for QCS404 dt-bindings: clock: qcom: Add QCOM Q6SSTOP clock controller bindings * clk-sa: drivers/clk: convert VL struct to struct_size * clk-aspeed: clk: aspeed: Add RMII RCLK gates for both AST2500 MACs clk: ast2600: Add RMII RCLK gates for all four MACs dt-bindings: clock: Add AST2600 RMII RCLK gate definitions dt-bindings: clock: Add AST2500 RMII RCLK definitions	2019-11-27 08:14:38 -08:00
Stephen Boyd	74ca928886	Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next ... * clk-hisi: clk: hi6220: use CLK_OF_DECLARE_DRIVER * clk-amlogic: clk: meson: axg-audio: use devm_platform_ioremap_resource() to simplify code clk: meson: axg_audio: add sm1 support clk: meson: axg-audio: provide clk top signal name clk: meson: axg-audio: prepare sm1 addition clk: meson: axg-audio: fix regmap last register clk: meson: axg-audio: remove useless defines dt-bindings: clock: meson: add sm1 resets to the axg-audio controller dt-bindings: clk: axg-audio: add sm1 bindings clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxes clk: meson: g12a: fix cpu clock rate setting clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate * clk-samsung: clk: samsung: exynos5420: Add SET_RATE_PARENT flag to clocks on G3D path clk: samsung: exynos5420: Preserve CPU clocks configuration during suspend/resume clk: samsung: exynos5420: Add VPLL rate table clk: samsung: exynos5420: Preserve PLL configuration during suspend/resume clk: samsung: exynos542x: Move G3D subsystem clocks to its sub-CMU clk: samsung: exynos5433: Fix error paths * clk-renesas: (23 commits) clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960 dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support clk: renesas: r8a77965: Remove superfluous semicolon dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix typo in example dt-bindings: clock: renesas: Remove R-Car Gen2 legacy DT bindings dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions dt-bindings: power: Add r8a77961 SYSC power domain definitions clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate() clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate() clk: renesas: rcar-gen2: Switch Z clock to .determine_rate() clk: renesas: r8a774b1: Add TMU clock clk: renesas: cpg-mssr: Add r8a774b1 support dt-bindings: clock: renesas: cpg-mssr: Document r8a774b1 binding clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate() clk: renesas: rcar-gen3: Absorb cpg_sd_clock_calc_div() clk: renesas: rcar-gen3: Avoid double table iteration in SD .set_rate() clk: renesas: rcar-gen3: Improve arithmetic divisions clk: renesas: rcar-gen2: Improve arithmetic divisions clk: renesas: Remove R-Car Gen2 legacy DT clock support ... * clk-imx: clk: imx: imx8mq: fix sys3_pll_out_sels clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify code clk: imx7ulp: Correct DDR clock mux options clk: imx7ulp: Correct system clock source option #7 clk: imx: imx8mq: mark sys1/2_pll as fixed clock clk: imx: imx8mn: mark sys_pll1/2 as fixed clock clk: imx: imx8mm: mark sys_pll1/2 as fixed clock clk: imx8mn: Define gates for pll1/2 fixed dividers clk: imx8mm: Define gates for pll1/2 fixed dividers clk: imx8mq: Define gates for pll1/2 fixed dividers clk: imx: clk-pll14xx: Make two variables static clk: imx8mq: Add VIDEO2_PLL clock clk: imx8mn: Use common 1443X/1416X PLL clock structure clk: imx8mm: Move 1443X/1416X PLL clock structure to common place clk: imx: pll14xx: Fix quick switch of S/K parameter	2019-11-27 08:14:17 -08:00
Linus Torvalds	3f1b210a7f	sound updates for 5.5-rc1 ... There have been some significant changes in the core side, both for ALSA and ASoC, while lots of development have been seen in SOF, as well as many small fixes/improvements for ASoC codecs and platforms. Below is a highlight in this cycle: Core: - The unification of PCM vmalloc buffer allocation helpers into the standard API - Clean up of the default PCM mmap handling for vmalloc & SG-buffer - Fix potential races at ALSA timer open - A few new PCM API extensions; just preliminary core changes, the actual changes in drivers will be merged in 5.6 - Continued ASoC componentization works; now almost everything is a common ASoC component object. A lot of refactoring and simplification have been done along with it. ASoC: - Many fixes to the Sound Open Firmware (SOF) code - Wake on voice support for Chromebooks - SPI support and trigger word detection for RT5677 - New drivers for Analog Devices ADAU7118, Intel Cannonlake systems with RT1011 and RT5682, Texas Instruments TAS2562 and TAS2770 HD-audio: - Improved Intel DSP configuration / probe code for SOF - Plumbing the legacy HD-audio driver with Intel SOF HDMI - DP-MST support for Nvidia HDMI codecs - Realtek quirks cleanups and new additions as usual Others: - Lots of refactoring and cleanups for FireWire; period-size sharing, h/w IRQ interval configuration, clock recovery improvements, etc - USB-audio: Scarlett mixer quirks - Cleanups of PCM calls in various drivers (including media and USB) to adapt the core API changes -----BEGIN PGP SIGNATURE----- iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAl3cAmcOHHRpd2FpQHN1 c2UuZGUACgkQLtJE4w1nLE9UXxAAnybNeJRjvq5jCXIdASNjT7L1GdvEpjsYaqis LGibFi8ekJmbs6PH8ALn5aRaaZgM9EONIU/BJ3ItlsX96OZ/o+PT5QBy67osF39K zgS0z37puptznj4wy5+istfn7aYuCCSobN9K/3xSS/yX5ibvneBr2d88gKa/u7mn ubKKR8r+asBXLyKEHYhtif8IXN7lttYQgIiVGSTGe8a8V0C1VU2VQOFbCVAv2guv tg7PYzaQYa/37XLKgdRIovvJGC6r498/aI3aA7dSttUuAlZge6HT9iD/TDhChvmA OGyfnH7SViRtp8zlDfCyiwi2vlXSFHrkFYRQaf7Ov4uhAUPlQhehyEAs5SCl3zOB Z9BSGYyiyzUCwoy6nnxzsjA+6CSaVx7ceW33Zc64wie4CsvmaWT+QssJ3IQkB+WF VQTM0gnzaEKF1yR7jeTFc9ndWFnnHbCRR2WWWsn/U4lxsHczdpt/RoLi+TxTm3YP Qb4atYtydgnwFcMvIlWGh68/MzaP3yK9lh0Ckr0GsRgRgMs/nqK/gZMlvCosDMRP Hc8j7cSACXF1EZ+dGlVa+q/qiYD9rAFQa8f8h4WB4En6yqkZ+qilk/z/A7sdb8bt VaaoOWTK4xEiVeV23RMO74+kPZazkkju636EWTvc2zBTJ6upkaT+geUV/e4g1aSc r/gylz8= =xGUt -----END PGP SIGNATURE----- Merge tag 'sound-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound updates from Takashi Iwai: "There have been some significant changes in the core side, both for ALSA and ASoC, while lots of development have been seen in SOF, as well as many small fixes/improvements for ASoC codecs and platforms. Below is a highlight in this cycle: Core: - The unification of PCM vmalloc buffer allocation helpers into the standard API - Clean up of the default PCM mmap handling for vmalloc & SG-buffer - Fix potential races at ALSA timer open - A few new PCM API extensions; just preliminary core changes, the actual changes in drivers will be merged in 5.6 - Continued ASoC componentization works; now almost everything is a common ASoC component object. A lot of refactoring and simplification have been done along with it. ASoC: - Many fixes to the Sound Open Firmware (SOF) code - Wake on voice support for Chromebooks - SPI support and trigger word detection for RT5677 - New drivers for Analog Devices ADAU7118, Intel Cannonlake systems with RT1011 and RT5682, Texas Instruments TAS2562 and TAS2770 HD-audio: - Improved Intel DSP configuration / probe code for SOF - Plumbing the legacy HD-audio driver with Intel SOF HDMI - DP-MST support for Nvidia HDMI codecs - Realtek quirks cleanups and new additions as usual Others: - Lots of refactoring and cleanups for FireWire; period-size sharing, h/w IRQ interval configuration, clock recovery improvements, etc - USB-audio: Scarlett mixer quirks - Cleanups of PCM calls in various drivers (including media and USB) to adapt the core API changes" * tag 'sound-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (497 commits) ALSA: usb-audio: Fix Focusrite Scarlett 6i6 gen1 - input handling ALSA: hda/realtek - Enable internal speaker of ASUS UX431FLC ALSA: aloop: Fix dependency on timer API ASoC: DMI long name - avoid to add board name if matches with product name ASoC: improve the DMI long card code in asoc-core ASoC: rsnd: fix DALIGN register for SSIU ALSA: aloop: Avoid unexpected timer event callback tasklets ALSA: aloop: Remove redundant locking in timer open function ASoC: component: Add sync_stop PCM ops ASoC: pcm: Make ioctl ops optional ALSA: hda/hdmi - Clear codec->relaxed_resume flag at unbinding ALSA: hda - Disable audio component for legacy Nvidia HDMI codecs ALSA: cs4236: fix error return comparison of an unsigned integer ALSA: usb-audio: Fix NULL dereference at parsing BADD ALSA: usb-audio: Fix Scarlett 6i6 Gen 2 port data ALSA: hda/realtek - Enable the headset-mic on a Xiaomi's laptop ALSA: hda/realtek - Move some alc236 pintbls to fallback table ALSA: hda/realtek - Move some alc256 pintbls to fallback table ALSA: docs: Update about the new PCM sync_stop ops ALSA: pcm: Add card sync_irq field ...	2019-11-26 20:04:35 -08:00
Linus Torvalds	9e7a03233e	Power management updates for 5.5-rc1 ... - Use nanoseconds (instead of microseconds) as the unit of time in the cpuidle core and simplify checks for disabled idle states in the idle loop (Rafael Wysocki). - Fix and clean up the teo cpuidle governor (Rafael Wysocki). - Fix the cpuidle registration error code path (Zhenzhong Duan). - Avoid excessive vmexits in the ACPI cpuidle driver (Yin Fengwei). - Extend the idle injection infrastructure to be able to measure the requested duration in nanoseconds and to allow an exit latency limit for idle states to be specified (Daniel Lezcano). - Fix cpufreq driver registration and clarify a comment in the cpufreq core (Viresh Kumar). - Add NULL checks to the show() and store() methods of sysfs attributes exposed by cpufreq (Kai Shen). - Update cpufreq drivers: * Fix for a plain int as pointer warning from sparse in intel_pstate (Jamal Shareef). * Fix for a hardcoded number of CPUs and stack bloat in the powernv driver (John Hubbard). * Updates to the ti-cpufreq driver and DT files to support new platforms and migrate bindings from opp-v1 to opp-v2 (Adam Ford, H. Nikolaus Schaller). * Merging of the arm_big_little and vexpress-spc drivers and related cleanup (Sudeep Holla). * Fix for imx's default speed grade value (Anson Huang). * Minor cleanup of the s3c64xx driver (Nathan Chancellor). * CPU speed bin detection fix for sun50i (Ondrej Jirman). - Appoint Chanwoo Choi as the new devfreq maintainer. - Update the devfreq core: * Check NULL governor in available_governors_show sysfs to prevent showing wrong governor information and fix a race condition between devfreq_update_status() and trans_stat_show() (Leonard Crestez). * Add new 'interrupt-driven' flag for devfreq governors to allow interrupt-driven governors to prevent the devfreq core from polling devices for status (Dmitry Osipenko). * Improve an error message in devfreq_add_device() (Matthias Kaehlcke). - Update devfreq drivers: * tegra30 driver fixes and cleanups (Dmitry Osipenko). * Removal of unused property from dt-binding documentation for the exynos-bus driver (Kamil Konieczny). * exynos-ppmu cleanup and DT bindings update (Lukasz Luba, Marek Szyprowski). - Add new CPU IDs for CometLake Mobile and Desktop to the Intel RAPL power capping driver (Zhang Rui). - Allow device initialization in the generic power domains (genpd) framework to be more straightforward and clean it up (Ulf Hansson). - Add support for adjusting OPP voltages at run time to the OPP framework (Stephen Boyd). - Avoid freeing memory that has never been allocated in the hibernation core (Andy Whitcroft). - Clean up function headers in a header file and coding style in the wakeup IRQs handling code (Ulf Hansson, Xiaofei Tan). - Clean up the SmartReflex adaptive voltage scaling (AVS) driver for ARM (Ben Dooks, Geert Uytterhoeven). - Wrap power management documentation to fit in 80 columns (Bjorn Helgaas). - Add pm-graph utility entry to MAINTAINERS (Todd Brandt). - Update the cpupower utility: * Fix the handling of set and info subcommands (Abhishek Goel). * Fix build warnings (Nathan Chancellor). * Improve mperf_monitor handling (Janakarajan Natarajan). -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAl3dHGYSHHJqd0Byand5 c29ja2kubmV0AAoJEILEb/54YlRxMcgP/1bMSkxlRHFOXYSRwS4YcvkUjlBHrCSi 3qGRyYwhc+eRLqRc+2tcmQeQEeQRBqUt8etp7/9WxqS3nic/3Vdf6AFuhSpmJzo1 6JTEutHMU5eP8lwQuKoUCJncCNdIfEOkd5T35E12W/ar5PwyJio0UByZJBnJBjD/ p7/713ucq6ZH95OGncmCJ1S1UslFCZrSS2RRigDInu8gpEssnwN9zwaJbzUYrZHj BmnKpBpT8FdLmkpbOtmmiT7q2ZGpUEHhkaO916Knf/+BFdvydTXoR90FVvXKy8Zr QpOxaTdQB2ADifUa5zs8klVP6otmZhEO9vz8hVMUWGziqagObykQngzl8tqrKEBh hLI8eEG1IkEBCv5ThQbLcoaRXNpwriXXfvWPTPB8s84HJxNZ09F6pXsv1SLh96qC lj8Q5Yy2a3tlpsg4LB58XoJ54gOtlh8bWKkM0FytrFI/IP+HT4TUu/Rxgp1nDbGd tKzLvpn4Yo2h10seeDbYk3l79mogUYj50RmwjjPn+9RwS/Df4eIpNb6ibllGZUN/ zcPZH5xlVfQRl2LKDufVN0nYSnoMZY/fU05p9XbUiJWd80LHYOb4Em1N6h/FNOyl alDhVwlxEvc2BQwL/gjYmN6Qxc7SsPTBrSGVwjWYY+FghOYQd/wBDQqQUeM21QKg ChOE3z/F/26r =GJvT -----END PGP SIGNATURE----- Merge tag 'pm-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management updates from Rafael Wysocki: "These include cpuidle changes to use nanoseconds (instead of microseconds) as the unit of time and to simplify checks for disabled idle states in the idle loop, some cpuidle fixes and governor updates, assorted cpufreq updates (driver updates mostly and a few core fixes and cleanups), devfreq updates (dominated by the tegra30 driver changes), new CPU IDs for the RAPL power capping driver, relatively minor updates of the generic power domains (genpd) and operation performance points (OPP) frameworks, and assorted fixes and cleanups. There are also two maintainer information updates: Chanwoo Choi will be maintaining the devfreq subsystem going forward and Todd Brandt is going to maintain the pm-graph utility (created by him). Specifics: - Use nanoseconds (instead of microseconds) as the unit of time in the cpuidle core and simplify checks for disabled idle states in the idle loop (Rafael Wysocki) - Fix and clean up the teo cpuidle governor (Rafael Wysocki) - Fix the cpuidle registration error code path (Zhenzhong Duan) - Avoid excessive vmexits in the ACPI cpuidle driver (Yin Fengwei) - Extend the idle injection infrastructure to be able to measure the requested duration in nanoseconds and to allow an exit latency limit for idle states to be specified (Daniel Lezcano) - Fix cpufreq driver registration and clarify a comment in the cpufreq core (Viresh Kumar) - Add NULL checks to the show() and store() methods of sysfs attributes exposed by cpufreq (Kai Shen) - Update cpufreq drivers: * Fix for a plain int as pointer warning from sparse in intel_pstate (Jamal Shareef) * Fix for a hardcoded number of CPUs and stack bloat in the powernv driver (John Hubbard) * Updates to the ti-cpufreq driver and DT files to support new platforms and migrate bindings from opp-v1 to opp-v2 (Adam Ford, H. Nikolaus Schaller) * Merging of the arm_big_little and vexpress-spc drivers and related cleanup (Sudeep Holla) * Fix for imx's default speed grade value (Anson Huang) * Minor cleanup of the s3c64xx driver (Nathan Chancellor) * CPU speed bin detection fix for sun50i (Ondrej Jirman) - Appoint Chanwoo Choi as the new devfreq maintainer. - Update the devfreq core: * Check NULL governor in available_governors_show sysfs to prevent showing wrong governor information and fix a race condition between devfreq_update_status() and trans_stat_show() (Leonard Crestez) * Add new 'interrupt-driven' flag for devfreq governors to allow interrupt-driven governors to prevent the devfreq core from polling devices for status (Dmitry Osipenko) * Improve an error message in devfreq_add_device() (Matthias Kaehlcke) - Update devfreq drivers: * tegra30 driver fixes and cleanups (Dmitry Osipenko) * Removal of unused property from dt-binding documentation for the exynos-bus driver (Kamil Konieczny) * exynos-ppmu cleanup and DT bindings update (Lukasz Luba, Marek Szyprowski) - Add new CPU IDs for CometLake Mobile and Desktop to the Intel RAPL power capping driver (Zhang Rui) - Allow device initialization in the generic power domains (genpd) framework to be more straightforward and clean it up (Ulf Hansson) - Add support for adjusting OPP voltages at run time to the OPP framework (Stephen Boyd) - Avoid freeing memory that has never been allocated in the hibernation core (Andy Whitcroft) - Clean up function headers in a header file and coding style in the wakeup IRQs handling code (Ulf Hansson, Xiaofei Tan) - Clean up the SmartReflex adaptive voltage scaling (AVS) driver for ARM (Ben Dooks, Geert Uytterhoeven) - Wrap power management documentation to fit in 80 columns (Bjorn Helgaas) - Add pm-graph utility entry to MAINTAINERS (Todd Brandt) - Update the cpupower utility: * Fix the handling of set and info subcommands (Abhishek Goel) * Fix build warnings (Nathan Chancellor) * Improve mperf_monitor handling (Janakarajan Natarajan)" * tag 'pm-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (83 commits) PM: Wrap documentation to fit in 80 columns cpuidle: Pass exit latency limit to cpuidle_use_deepest_state() cpuidle: Allow idle injection to apply exit latency limit cpuidle: Introduce cpuidle_driver_state_disabled() for driver quirks cpuidle: teo: Avoid code duplication in conditionals cpufreq: Register drivers only after CPU devices have been registered cpuidle: teo: Avoid using "early hits" incorrectly cpuidle: teo: Exclude cpuidle overhead from computations PM / Domains: Convert to dev_to_genpd_safe() in genpd_syscore_switch() mmc: tmio: Avoid boilerplate code in ->runtime_suspend() PM / Domains: Implement the ->start() callback for genpd PM / Domains: Introduce dev_pm_domain_start() ARM: OMAP2+: SmartReflex: add omap_sr_pdata definition PM / wakeirq: remove unnecessary parentheses power: avs: smartreflex: Remove superfluous cast in debugfs_create_file() call cpuidle: Use nanoseconds as the unit of time PM / OPP: Support adjusting OPP voltages at runtime PM / core: Clean up some function headers in power.h cpufreq: Add NULL checks to show() and store() methods of cpufreq cpufreq: intel_pstate: Fix plain int as pointer warning from sparse ...	2019-11-26 19:06:44 -08:00
Linus Torvalds	d873a0cd21	regulator: Updates for v5.5 ... Another fairly quiet release for the regulator API, some work all around including some core work but mostly in specialist or driver specific code: - Fix for powering off boot-on regulators. - Enhancements to the coupled regulator support introduced in the last release. - Conversion of a bunch of drivers to the fwnode API for GPIOs. - Mode support for DA9062. - New device support for Qualcomm PM1650, PM8004 and PM895 and Silergy SR83X. - Removal of obsolete AB8505 support. -----BEGIN PGP SIGNATURE----- iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl3b04ETHGJyb29uaWVA a2VybmVsLm9yZwAKCRAk1otyXVSH0B82B/9Eto3rSo03EqkkKG3clSKPDGO9WSZG LSLQ0lbHxsXL8cyIoOx8S/ygiyLn07SLFbLFVhkMi/JXNlPxlNMKMohY3yNffKMd 7DQgWiqeFDEyxU9bFoTR1mAWMfycNUCGFDWel2EjmnhJ0NA5hyjXzXwgoYIUWMPf GQBMp6Qbxtl9SShNeuMNlzFdHdThAr8JNm014UVQLeg0Kx1DowMDWgCYVuHmRqDB 6VF37pNxaqPcGB/nqxJfSJULrj6brLJuQ9KFNGROxP9VPK8lt0+Aaeg3HsLq/LLe z6q0bAJ9EVJYhAuJYrSpUgDdd5pxcshLj3rzl70kH0Ac+GWjQsqfoqTO =jJ5N -----END PGP SIGNATURE----- Merge tag 'regulator-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator Pull regulator updates from Mark Brown: "Another fairly quiet release for the regulator API, some work all around including some core work but mostly in specialist or driver specific code: - Fix for powering off boot-on regulators - Enhancements to the coupled regulator support introduced in the last release - Conversion of a bunch of drivers to the fwnode API for GPIOs - Mode support for DA9062 - New device support for Qualcomm PM1650, PM8004 and PM895 and Silergy SR83X - Removal of obsolete AB8505 support" * tag 'regulator-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (49 commits) regulator: da9062: Return REGULATOR_MODE_INVALID for invalid mode regulator: Fix Kconfig indentation regulator: tps6105x: add optional devicetree support tps6105x: add optional devicetree support regulator: rn5t618: fix rc5t619 ldo10 enable regulator: vexpress: Use PTR_ERR_OR_ZERO() to simplify code dt-bindings: mfd: da9062: describe buck modes regulator: da9062: add of_map_mode support for bucks regulator: da9062: refactor buck modes into header regulator: stpmic1: Set a default ramp delay value regulator: core: Let boot-on regulators be powered off regulator: core: Don't try to remove device links if add failed regulator: ab8500: Remove SYSCLKREQ from enum ab8505_regulator_id regulator: ab8500: Remove AB8505 USB regulator regulator: fan53555: add chip id for Silergy SYR83X regulator: fixed: add off-on-delay dt-bindings: regulator: fixed: add off-on-delay-us property regulator: core: Allow generic coupling only for always-on regulators regulator: core: Release coupled_rdevs on regulator_init_coupling() error regulator: bd70528: Add MODULE_ALIAS to allow module auto loading ...	2019-11-25 21:11:55 -08:00
Manivannan Sadhasivam	7046c6b018	dt-bindings: clock: Add devicetree binding for BM1880 SoC ... Add YAML devicetree binding for Bitmain BM1880 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/20191115162901.17456-4-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2019-11-22 15:58:04 -08:00
Christoph Fritz	7d34aec52d	regulator: da9062: refactor buck modes into header ... This patch refactors buck modes into a header file so that device trees can make use of these mode constants. The new header filename uses da9063 because DA9063 was the earlier chip and its driver code will want updating at some point in a similar manner. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> Link: https://lore.kernel.org/r/1573652416-9848-2-git-send-email-chf.fritz@googlemail.com Signed-off-by: Mark Brown <broonie@kernel.org>	2019-11-15 12:06:06 +00:00
Dan Murphy	4d66c56f7e	dt-bindings: net: dp83869: Add TI dp83869 phy ... Add dt bindings for the TI dp83869 Gigabit ethernet phy device. Signed-off-by: Dan Murphy <dmurphy@ti.com> CC: Rob Herring <robh+dt@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>	2019-11-14 17:42:43 -08:00
Zhou Yanjie	0b24748c3b	dt-bindings: clock: Add X1000 bindings. ... Add the clock bindings for the X1000 Soc from Ingenic. Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> Link: https://lkml.kernel.org/r/1573378102-72380-2-git-send-email-zhouyanjie@zoho.com Reviewed-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2019-11-13 16:00:48 -08:00
Thierry Reding	05308d7e7b	clk: tegra: Reimplement SOR clocks on Tegra210 ... In order to allow the display driver to deal uniformly with all SOR generations, implement the SOR clocks in a way that is compatible with Tegra186 and later. Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>	2019-11-11 14:52:53 +01:00
Thierry Reding	991a051ea5	clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC ... Later SoC generations implement this clock as SOR1_OUT. For consistency, the Tegra210 implementation was adapted to match the same name in commit 4d1dc40185 ("dt-bindings: clock: tegra: Add sor1_out clock"). Clean up the remaining pieces by adopting the new name for the internal identifiers and remove the old alias. Note that since both SOR1_SRC and SOR1_OUT were referring to the same device tree clock ID, this does not break device tree ABI. Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>	2019-11-11 14:52:08 +01:00
Brian Masney	6120e5d821	dt-bindings: interconnect: qcom: add msm8974 bindings ... Add device tree bindings for the Qualcomm MSM8974 interconnect providers that support setting system bandwidth requirements between various network-on-chip fabrics. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20191024103054.9770-2-masneyb@onstation.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Link: https://lore.kernel.org/r/20191108125349.24191-2-georgi.djakov@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>	2019-11-08 17:14:06 +01:00
Jeffrey Hugo	95183d381a	clk: qcom: Enumerate clocks and reset needed to boot the 8998 modem ... We need to control five additional clocks and a reset inorder to boot the modem on msm8998. If we can boot the modem, we have a place to run the wlan firmware and get wifi up and running. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lkml.kernel.org/r/20191107192136.5880-1-jeffrey.l.hugo@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2019-11-07 13:41:40 -08:00
Taniya Das	8b9e0562f3	dt-bindings: clock: Add sc7180 GCC clock binding ... Add device tree bindings for global clock subsystem clock controller for Qualcomm Technology Inc's SC7180 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/20191014102308.27441-5-tdas@codeaurora.org Reviewed-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Reword subject to make sc7180 specific, sort compatible] Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2019-11-07 13:15:35 -08:00
Govind Singh	6cdef2738d	clk: qcom: Add Q6SSTOP clock controller for QCS404 ... Add support for the Q6SSTOP clock control used on qcs404 based devices. This would allow wcss remoteproc driver to control the required WCSS Q6SSTOP clock/reset controls to bring the subsystem out of reset and shutdown the WCSS Q6DSP. Signed-off-by: Govind Singh <govinds@codeaurora.org> Link: https://lkml.kernel.org/r/20191011132928.9388-3-govinds@codeaurora.org [sboyd@kernel.org: Sort makefile] Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2019-11-07 13:10:36 -08:00
Michael Walle	2c63221cd9	dt-bindings: net: phy: Add support for AT803X ... Document the Atheros AR803x PHY bindings. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>	2019-11-06 21:42:06 -08:00
Zhou Yanjie	be80507d45	dt-bindings: dmaengine: Add X1000 bindings. ... Add the dmaengine bindings for the X1000 Soc from Ingenic. Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1571937670-30828-2-git-send-email-zhouyanjie@zoho.com Signed-off-by: Vinod Koul <vkoul@kernel.org>	2019-11-06 22:39:58 +05:30
Lukasz Luba	fcbd8037f7	include: dt-bindings: add Performance Monitoring Unit for Exynos ... This patch add support of a new feature which can be used in DT: Performance Monitoring Unit with defined event data type. In this patch the event data types are defined for Exynos PPMU. The patch also updates the MAINTAINERS file accordingly and adds the header file to devfreq event subsystem. Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>	2019-11-06 12:03:59 +09:00
Finley Xiao	762539d699	clk: rockchip: Add div50 clock-ids for sdmmc on px30 and nandc ... EMMC and SDIO already have these clock-ids (still unused) only sdmmc is missing them, so fix that. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20190917081903.25139-1-heiko@sntech.de	2019-11-05 20:53:26 +01:00
Jernej Skrabec	4441b57ec2	clk: sunxi-ng: h3: Export MBUS clock ... MBUS clock will be referenced in MBUS controller node. Export it. Acked-by: Maxime Ripard <mripard@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech>	2019-11-05 11:34:41 +01:00
Qianggui Song	26f6a7524d	pinctrl: add compatible for Amlogic Meson A1 pin controller ... Add new compatible name for Amlogic's Meson-A1 pin controller add a dt-binding header file which document the detail pin names. Note that A1 doesn't need DS bank reg any more, use gpio reg as base. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com> Link: https://lore.kernel.org/r/1572004167-24150-2-git-send-email-qianggui.song@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2019-11-04 16:31:34 +01:00
Codrin Ciubotariu	0b32928528	pinctrl: at91: Enable slewrate by default on SAM9X60 ... On SAM9X60, slewrate should be enabled on pins with a switching frequency below 50Mhz. Since most of our pins do not exceed this value, we enable slewrate by default. Pins with a switching value that exceeds 50Mhz will have to explicitly disable slewrate. This patch changes the ABI. However, the slewrate macros are only used by SAM9X60 and, at this moment, there are no device-tree files available for this platform. Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20191101092031.24896-1-codrin.ciubotariu@microchip.com Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2019-11-03 23:34:47 +01:00
Geert Uytterhoeven	b07e816fc4	Renesas R-Car M3-W+ DT Binding Definitions ... Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXbwQzAAKCRCKwlD9ZEnx cGA2AQDvA8Uaf/WQ1zzq5GgHPB6R35ciBFCVn3AG+6izUqsCPAEA0FGEHsrNtWyG rcJ+C/8vBJ+Pe359DmXaELorJ4Xm6wQ= =EV4L -----END PGP SIGNATURE----- Merge tag 'renesas-r8a77961-dt-binding-defs-tag' into clk-renesas-for-v5.5 Renesas R-Car M3-W+ DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files.	2019-11-01 13:36:27 +01:00
Geert Uytterhoeven	0b05ad22a2	dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions ... Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car M3-W+ (R8A77961) SoC, as listed in Table 8.2b ("List of Clocks [R-Car M3-W/R-Car M3-W+]") of the R-Car Series, 3rd Generation Hardware User's Manual (Rev. 2.00, Jul. 31, 2019). A gap is added for CSIREF, to preserve compatibility with the definitions for R-Car M3-W (R8A77960). Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, SSPSRC, and POST2) are not included, as they are used as internal clock sources only, and never referenced from DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20191023122941.12342-3-geert+renesas@glider.be	2019-11-01 11:48:22 +01:00
Geert Uytterhoeven	640f9606dc	dt-bindings: power: Add r8a77961 SYSC power domain definitions ... Add power domain indices for the R-Car M3-W+ (R8A77961) SoC. Based on Rev. 2.00 of the R-Car Series, 3rd Generation, Hardware User’s Manual (Jul. 31, 2019). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com> Link: https://lore.kernel.org/r/20191023122911.12166-6-geert+renesas@glider.be	2019-11-01 11:48:22 +01:00
Andrew Jeffery	d8d9ad83a4	dt-bindings: clock: Add AST2600 RMII RCLK gate definitions ... The AST2600 has an explicit gate for the RMII RCLK for each of the four MACs. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au>	2019-11-01 15:01:18 +10:30
Andrew Jeffery	5b468cc4b8	dt-bindings: clock: Add AST2500 RMII RCLK definitions ... The AST2500 has an explicit gate for the RMII RCLK for each of the two MACs. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au>	2019-11-01 15:01:10 +10:30
Tero Kristo	2d5f60afd2	dt-bindings: clk: add omap5 iva clkctrl definitions ... OMAP5 device contains an IVA subsystem (Image and Video Accelerator.) IVA subsystem clkctrl definitions are currently missing, so add them. Signed-off-by: Tero Kristo <t-kristo@ti.com>	2019-10-31 15:18:28 +02:00
Thierry Reding	cdc2d6685c	dt-bindings: clock: tegra: Rename SOR0_LVDS to SOR0_OUT ... Tegra186 and later call this clock SOR0_OUT. Rename it on Tegra124 and Tegra210 to make the names consistent. Keep the old name for now to keep device trees buildable until they have all been converted. Signed-off-by: Thierry Reding <treding@nvidia.com>	2019-10-29 20:20:25 +01:00
Fancy Fang	72b2429d40	clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock ... The mipi pll clock comes from the MIPI PHY PLL output, so it should not be a fixed clock. MIPI PHY PLL is in the MIPI DSI space, and it is used as the bit clock for transferring the pixel data out and its output clock is configured according to the display mode. So it should be used only for MIPI DSI and not be exported out for other usages. Signed-off-by: Fancy Fang <chen.fang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>	2019-10-28 19:32:37 +08:00
Leonard Crestez	e8688fe8df	clk: imx8mn: Define gates for pll1/2 fixed dividers ... On imx8mn there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2 each with their own gate. Only one of these gates (the one "dividing" by one) is currently defined and it's incorrectly set as the parent of all the fixed-factor dividers. Add the other 8 gates to the clock tree between sys_pll1/2_bypass and the fixed dividers. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>	2019-10-25 17:03:19 +08:00
Leonard Crestez	3e4947acad	clk: imx8mm: Define gates for pll1/2 fixed dividers ... On imx8mm there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2 each with their own gate. Only one of these gates (the one "dividing" by one) is currently defined and it's incorrectly set as the parent of all the fixed-factor dividers. Add the other 8 gates to the clock tree between sys_pll1/2_bypass and the fixed dividers. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>	2019-10-25 17:03:16 +08:00
Leonard Crestez	b04383b6a5	clk: imx8mq: Define gates for pll1/2 fixed dividers ... On imx8mq there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2 each with their own gate but these gates are not currently defined in the clock tree. Add them between sys1/2_pll_out and the fixed dividers. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>	2019-10-25 17:03:00 +08:00
Maciej Falkowski	6cc23ed2ce	ASoC: samsung: i2s: Document clocks macros ... Document clocks macros with their description from 'Documentation/devicetree/bindings/sound/samsung-i2s.txt' Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20190926110219.6144-1-m.szyprowski@samsung.com Signed-off-by: Mark Brown <broonie@kernel.org>	2019-10-21 13:51:24 +01:00
Laurentiu Palcu	f0b1d7f2e7	clk: imx8mq: Add VIDEO2_PLL clock ... This clock is needed by DCSS when high resolutions are used. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com> CC: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>	2019-10-14 19:27:23 +08:00
Greg Kroah-Hartman	9dc86c234e	First set of IIO new device support, cleanups and features for the 5.5 cycle ... Third version with the adis rework set dropped as better to just have a fresh version of that at some future date. The usual mixed backs of new device support being added to drivers, long term reworks continuing and little per driver cleanups and features. Also a few trivial counter subsystem tidy ups on behalf of William. Core new feature * Device label support. A long requested feature no one got around to implementing before. Allows DT based provision of a 'label' that identifies a device uniquely within a system. This differs from existing 'name' which is meant to be the part number. New device support * ingenic-adc - Support for the JZ4770 SoC ADC including bindings. * inv_mpu6050 - Add support for magnetometer in MPU925x parts. Fiddly to do as this is actually a separate device sitting inside the package, but with the master device being able to schedule reads etc. Will only run if the auxiliary bus is not in use for any other devices. Features * ad7192 - Userspace calibration controls to do zero and full scale. * st_lsm6dsx - Enable latched interrupts by default for sensors events with related clear. - Motion events and related wakeup source. This needed quite a bit of refactoring as well. Cleanups and minor features * ad7192 - sysfs ABI docs * ad7949 - Remove code to readback configuration word as driver never actually enabled it. - Fix incorrect xfer length. Not actually known to cause problems other than wasted bus usage. * adis16080 - Replace core mlock usage with local lock with more appropriate scope. * adis16130 - Remove pointless mlock usage. * adis16240 - Remove include of gpio.h as no gpio usage. * atlas-ph-sensor - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. * bh1750 - Fix up a static compiler warning and make the code more readable. - yaml conversion of binding + MAINTAINERS entry. * bmp280 - Drop a stray newline. * cm36651 - Drop a redundant assignment * itg3200 - Alignment cleanup. * max31856 - Add missing of_node and parent references, useful to identify the device. * sc27xx_adc - Use devm_hwspin_lock_request_specific rather than local rolled version. * stm32-lptimer counter - kernel-doc warning. * stm32-timer counter - kernel-doc warning. - Alignment cleanup. * sx9500 - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. * tcs3414 - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAl2i3GIRHGppYzIzQGtl cm5lbC5vcmcACgkQVIU0mcT0FohHeRAAlZ0gHdNKJ/30vtX2GZQiSE0IrQlbTYVz 5t0Zvm1RWpuHdbMpANtsjPYI5oDUEO34O8520Kl6g/AwIQ6qfqpbaToTZA76fu8M B7eHO6a+UHL5kKFV5YQS2cDqtDpuPo1SR/0cCe7dDcjwvAm8jeehKtlCUFTVImU5 sMEuaD41Sr8Y5IuTpQIqFaGc4BS0s4NUJ7+fkq6ud3Qlw6CVWdLz0pz/kjnnLJcP jdr+VRqD6x+gXrujX+1iaeFu+r2dF+a9z3aPgr8vJj/6asnY0uihs82YTuL2v4Wb tBM3MKooTQt1zgrCEO7n/+GzC02pXbQ8mRPI2H1eOl4jaJhyttkSNztEo9k4EQ3N wYbAvc97yWNVthHd/2z7rDYf3SntN8nqjCkeuvn83P/6uhQS9EzSiVV2hkUda0K0 y1ZKOTDH0W+jCFITCtrDR1GLdV6GLPiv1AlG5l9AXyUfRBFBRWg9duLFYeVsVouu g3yxzO0PbsNKMbPqjwT+YzNCd4/QKpuU7/+WTBSNUVo428i/p3lpnXQyhJiQrWIE 3TH+pj6Es8WYNmuRw3h9bMTjxca9Esk/e6MZ8vnOFUKrHB1T1iQB+rSsascZQM9a +uv+d2x27KVUqotP8DLat1FYHDIbaIScKJioAWsLepscpBucJ3ayHq5yOFGXXp9i KKqT9ObTUfw= =nIWU -----END PGP SIGNATURE----- Merge tag 'iio-for-5.5a-take3' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next Jonathan writes: First set of IIO new device support, cleanups and features for the 5.5 cycle Third version with the adis rework set dropped as better to just have a fresh version of that at some future date. The usual mixed backs of new device support being added to drivers, long term reworks continuing and little per driver cleanups and features. Also a few trivial counter subsystem tidy ups on behalf of William. Core new feature * Device label support. A long requested feature no one got around to implementing before. Allows DT based provision of a 'label' that identifies a device uniquely within a system. This differs from existing 'name' which is meant to be the part number. New device support * ingenic-adc - Support for the JZ4770 SoC ADC including bindings. * inv_mpu6050 - Add support for magnetometer in MPU925x parts. Fiddly to do as this is actually a separate device sitting inside the package, but with the master device being able to schedule reads etc. Will only run if the auxiliary bus is not in use for any other devices. Features * ad7192 - Userspace calibration controls to do zero and full scale. * st_lsm6dsx - Enable latched interrupts by default for sensors events with related clear. - Motion events and related wakeup source. This needed quite a bit of refactoring as well. Cleanups and minor features * ad7192 - sysfs ABI docs * ad7949 - Remove code to readback configuration word as driver never actually enabled it. - Fix incorrect xfer length. Not actually known to cause problems other than wasted bus usage. * adis16080 - Replace core mlock usage with local lock with more appropriate scope. * adis16130 - Remove pointless mlock usage. * adis16240 - Remove include of gpio.h as no gpio usage. * atlas-ph-sensor - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. * bh1750 - Fix up a static compiler warning and make the code more readable. - yaml conversion of binding + MAINTAINERS entry. * bmp280 - Drop a stray newline. * cm36651 - Drop a redundant assignment * itg3200 - Alignment cleanup. * max31856 - Add missing of_node and parent references, useful to identify the device. * sc27xx_adc - Use devm_hwspin_lock_request_specific rather than local rolled version. * stm32-lptimer counter - kernel-doc warning. * stm32-timer counter - kernel-doc warning. - Alignment cleanup. * sx9500 - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. * tcs3414 - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. * tag 'iio-for-5.5a-take3' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (41 commits) iio: pressure: bmp280: remove stray newline iio: adc: sc27xx: Use devm_hwspin_lock_request_specific() to simplify code iio: chemical: atlas-ph-sensor: fix iio_triggered_buffer_predisable() position iio: gyro: clean up indentation issue counter: stm32: clean up indentation issue iio: proximity: sx9500: fix iio_triggered_buffer_{predisable,postenable} positions iio: core: Add optional symbolic label to device attributes dt-binding: iio: Add optional label property iio: gyro: adis16080: replace mlock with own lock counter: stm32-lptimer-cnt: fix a kernel-doc warning counter: stm32-timer-cnt: fix a kernel-doc warning iio: gyro: adis16130: remove mlock usage MAINTAINERS: add entry for ROHM BH1750 driver dt-bindings: iio: light: bh1750: convert bindings to yaml iio: imu: st_lsm6dsx: add motion report function and call from interrupt iio: imu: st_lsm6dsx: always enter interrupt thread iio: imu: st_lsm6dsx: add wakeup-source option iio: imu: st_lsm6dsx: add motion events iio: imu: st_lsm6dsx: move interrupt thread to core iio: imu: inv_mpu6050: add fifo support for magnetometer data ...	2019-10-13 10:59:05 +02:00
Jerome Brunet	aa03ea9bce	dt-bindings: clock: meson: add sm1 resets to the axg-audio controller ... Add the reset id of the sm1 audio clock controller Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>	2019-10-08 09:28:08 +02:00
Jerome Brunet	0ea0a188fd	dt-bindings: clk: axg-audio: add sm1 bindings ... Add the compatible and clock ids of the sm1 audio clock controller Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>	2019-10-08 09:28:07 +02:00
Biju Das	54ce17dd40	dt-bindings: clk: Add r8a774b1 CPG Core Clock Definitions ... Add all RZ/G2N Clock Pulse Generator Core Clock Outputs, as listed in Table 8.2d ("List of Clocks [RZ/G2N]") of the RZ/G2N Hardware User's Manual. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1567666360-28035-1-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>	2019-10-01 09:49:40 +02:00
Biju Das	be67c41781	dt-bindings: power: Add r8a774b1 SYSC power domain definitions ... This patch adds power domain indices for the RZ/G2N (a.k.a r8a774b1) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1567666326-27373-1-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>	2019-10-01 09:49:40 +02:00
Linus Torvalds	5c6bd5de3c	Main MIPS changes for v5.4: ... - boot_mem_map is removed, providing a nice cleanup made possible by the recent removal of bootmem. - Some fixes to atomics, in general providing compiler barriers for smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs or MIPS32 systems using cmpxchg64(). - Conversion to the new generic VDSO infrastructure courtesy of Vincenzo Frascino. - Removal of undefined behavior in set_io_port_base(), fixing the behavior of some MIPS kernel configurations when built with recent clang versions. - Initial MIPS32 huge page support, functional on at least Ingenic SoCs. - pte_special() is now supported for some configurations, allowing among other things generic fast GUP to be used. - Miscellaneous fixes & cleanups. And platform specific changes: - Major improvements to Ingenic SoC support from Paul Cercueil, mostly enabled by the inclusion of the new TCU (timer-counter unit) drivers he's spent a very patient year or so working on. Plus some fixes for X1000 SoCs from Zhou Yanjie. - Netgear R6200 v1 systems are now supported by the bcm47xx platform. - DT updates for BMIPS, Lantiq & Microsemi Ocelot systems. -----BEGIN PGP SIGNATURE----- iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXYaqpRUccGF1bC5idXJ0 b25AbWlwcy5jb20ACgkQPqefrLV1AN2JUQD+PQGFIlq9bo/3vLyqsXJffm+DhwVQ 4WSCSeN5brPkO8EA/153sRJBlRtG+KK5p9f7WYKUuBfbcEawuc1uwmKuy7cG =lWlM -----END PGP SIGNATURE----- Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Paul Burton: "Main MIPS changes: - boot_mem_map is removed, providing a nice cleanup made possible by the recent removal of bootmem. - Some fixes to atomics, in general providing compiler barriers for smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs or MIPS32 systems using cmpxchg64(). - Conversion to the new generic VDSO infrastructure courtesy of Vincenzo Frascino. - Removal of undefined behavior in set_io_port_base(), fixing the behavior of some MIPS kernel configurations when built with recent clang versions. - Initial MIPS32 huge page support, functional on at least Ingenic SoCs. - pte_special() is now supported for some configurations, allowing among other things generic fast GUP to be used. - Miscellaneous fixes & cleanups. And platform specific changes: - Major improvements to Ingenic SoC support from Paul Cercueil, mostly enabled by the inclusion of the new TCU (timer-counter unit) drivers he's spent a very patient year or so working on. Plus some fixes for X1000 SoCs from Zhou Yanjie. - Netgear R6200 v1 systems are now supported by the bcm47xx platform. - DT updates for BMIPS, Lantiq & Microsemi Ocelot systems" * tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (89 commits) MIPS: Detect bad _PFN_SHIFT values MIPS: Disable pte_special() for MIPS32 with RiXi MIPS: ralink: deactivate PCI support for SOC_MT7621 mips: compat: vdso: Use legacy syscalls as fallback MIPS: Drop Loongson _CACHE_* definitions MIPS: tlbex: Remove cpu_has_local_ebase MIPS: tlbex: Simplify r3k check MIPS: Select R3k-style TLB in Kconfig MIPS: PCI: refactor ioc3 special handling mips: remove ioremap_cachable mips/atomic: Fix smp_mb__{before,after}_atomic() mips/atomic: Fix loongson_llsc_mb() wreckage mips/atomic: Fix cmpxchg64 barriers MIPS: Octeon: remove duplicated include from dma-octeon.c firmware: bcm47xx_nvram: Allow COMPILE_TEST firmware: bcm47xx_nvram: Correct size_t printf format MIPS: Treat Loongson Extensions as ASEs MIPS: Remove dev_err() usage after platform_get_irq() MIPS: dts: mscc: describe the PTP ready interrupt MIPS: dts: mscc: describe the PTP register range ...	2019-09-22 09:30:30 -07:00
Linus Torvalds	f97c81dc6c	ARM: SoC: late updates for v5.4 ... This is some material that we picked up into our tree late or that had complex inter-depondencies. The fact that there are these interdependencies tends to meant that these are often actually the most interesting new additions: The new Aspeed AST2600 baseboard management controller is added, this is a Cortex-A7 based follow-up to the ARM11 based AST2500 and had some dependencies on other device drivers. After many years, support for the MMP2 based OLPC XO-1.75 finally makes it into the kernel. The Armada 3720 based Turris Mox open source router platform is a late addition and it follows some preparatory work across multiple branches. The OMAP2+ platform had some large-scale cleanup involving driver changes and DT changes, here we finish it off, dropping a lot of the now-unused platform data. The TI K3 platform that got added for 5.3 gains a lot more support for individual bits on the SoC, this part just came late for the merge window. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJdf6P3AAoJEJpsee/mABjZMFUP/i/J9CNJjEec0cWCG1XgP/qh SpKFf2g9Y9QzqAzDDovo7atTGHTCG8C0fn8W+bkv9h7dWj2uxRtFISM9COomUoHa 0qXUL9bbDB3LAvstLV451p4c67XsJUazV9KZPD7VsCquucWbDDYaGPz+0reSRm6y imK2jXqD0leG0CNbgRXfh64J32TF3M0/XnwbsNJreCmQvwUvkYLL5VNi/qcnvfyp k0g1/5OzH9mLertoVKWqJ9o1919Yvxdl6/eyDmTPmX08bs03WnPbCEzRVO/zkOKZ O6RcAlsjiLblQdfbDJKfbaYDDaE53d2NwdCvBIdSPmDoYM5eYjQC4PmDM0+0dmHe bFd9giBjzU2Uab7ylgeoVl6pX1ISk6bwmZxNup45cy0xyw8wuky02Wq2bQTuZbgI UcBlOGWR4aH/OCpNafn+ovDBYGc64I7EQobG7UiilrVq/libx1Uo7yjlWSxe4j8n wFchiB8It24WUiS4JhJFrTklkaf5JW3K3czdDATW7aZKjv+fnHU5GMre/hvNP4z7 qROlP69/eqNXG25VOcwWPQE8yhP43+ZgyvoVwDh1H6VZdy9WxgYyEoiBAhFfcrng +RVAT4rzylPmKP8oygVF1fpTHTS8xHrYBbjkdRaj5KqmTDdqI/nMsYoq+E0R1ScV EsnyNVq7wnvH12zrOv+I =Qtkp -----END PGP SIGNATURE----- Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC late updates from Arnd Bergmann: "This is some material that we picked up into our tree late or that had complex inter-depondencies. The fact that there are these interdependencies tends to meant that these are often actually the most interesting new additions: - The new Aspeed AST2600 baseboard management controller is added, this is a Cortex-A7 based follow-up to the ARM11 based AST2500 and had some dependencies on other device drivers. - After many years, support for the MMP2 based OLPC XO-1.75 finally makes it into the kernel. - The Armada 3720 based Turris Mox open source router platform is a late addition and it follows some preparatory work across multiple branches. - The OMAP2+ platform had some large-scale cleanup involving driver changes and DT changes, here we finish it off, dropping a lot of the now-unused platform data. - The TI K3 platform that got added for 5.3 gains a lot more support for individual bits on the SoC, this part just came late for the merge window" [ This pull request itself wasn't actually sent late at all by Arnd, but I waited on the branches that it used to be pulled first, so it ends up being merged much later than the other ARM SoC pull requests this merge window - Linus ] * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits) ARM: dts: dir685: Drop spi-cpol from the display ARM: dts: aspeed: Add AST2600 pinmux nodes ARM: dts: aspeed: Add AST2600 and EVB ARM: exynos: Enable support for ARM architected timers ARM: samsung: Fix system restart on S3C6410 ARM: dts: mmp2: add OLPC XO 1.75 machine ARM: dts: mmp2: rename the USB PHY node ARM: dts: mmp2: specify reg-shift for the UARTs ARM: dts: mmp2: add camera interfaces ARM: dts: mmp2: fix the SPI nodes ARM: dts: mmp2: trivial whitespace fix arm64: dts: marvell: add DTS for Turris Mox dt-bindings: marvell: document Turris Mox compatible arm64: dts: marvell: armada-37xx: add SPI CS1 pinctrl arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address arm64: dts: ti: k3-j721e-main: Add hwspinlock node arm64: dts: ti: k3-am65-main: Add hwspinlock node arm64: dts: k3-j721e: Add gpio-keys on common processor board dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E ...	2019-09-20 15:53:02 -07:00
Linus Torvalds	a703d279c5	We have a small collection of core framework updates this time, mostly around ... clk registration by clk providers and debugfs "nice to haves" for rate constraints. I'll highlight that we're now setting the clk_init_data pointer inside struct clk_hw to NULL during clk_register(), which may break some drivers that thought they could use that pointer during normal operations. That change has been sitting in next for a while now but maybe something is still broken. We'l see. Other than that the core framework changes aren't invasive and they're fixing bugs, simplifying, and making things better. On the clk driver side we got the usual addition of new SoC support, new features for existing drivers, and bug fixes scattered throughout. The biggest diffstat is the Amlogic driver that gained CPU clk support in addition to migrating to the new way of specifying clk parents. After that the Qualcomm, i.MX, Mediatek, and Rockchip clk drivers got support for various new SoCs and clock controllers from those vendors. Core: - Drop NULL checks in clk debugfs - Add min/max rates to clk debugfs - Set clk_init_data pointer inside clk_hw to NULL after registration - Make clk_bulk_get_all() return an 'id' corresponding to clock-names - Evict parents from parent cache when they're unregistered New Drivers: - Add clock driver for i.MX8MN SoCs - Support aspeed AST2600 SoCs - Support for Mediatek MT6779 SoCs - Support qcom SM8150 GCC and RPMh clks - Support qcom QCS404 WCSS clks - Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807) - Addition of clock driver for Rockchip rk3308 SoCs Updates: - Add regulator support to the cdce925 clk driver - Add support for Raspberry Pi 4 bcm2711 SoCs - Add SDIO gate support to aspeed driver - Add missing of_node_put() calls in various clk drivers - Migrate Amlogic driver to new clock parent description method - Add DVFS support to Amlogic Meson g12 - Add Amlogic Meson g12a reset support to the axg audio clock controller - Add sm1 support to the Amlogic Meson g12a clock controller - Switch i.MX8MM clock driver to platform driver - Add Hifi4 DSP related clocks for i.MX8QXP SoC - Fix Audio PLL setting and parent clock for USB - Misc i.MX8 clock driver improvements and corrections - Set floor ops for Qualcomm SD clks so that rounding works - Fix "always-on" Clock Domains on Renesas R-Car M1A, RZ/A1, RZ/A2, and RZ/N1 - Enable the Allwinner V3 SoC and fix the i2s clock for H6 -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl2FQEMRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSXHQw//XHnT5DPphpP8ua4x8wuJARdf0n58Vcdb 8fZxxs4QN7uuKhg6aMI4kgwBn+9tgIr65hvN0Gn9Wm5Bsbs3XZvdIo7DvQDrYg7W NE7192iy2Dg+m+C24YLO7ceZgqVepbjeN+6oeUK88Ui+H+XlOKfJvjfnJ+HxN9Ip sHnLakIxqlaWvzwTUOHOcsrHyQD2OXupbfNMxLnmr8T/kBh/nqwNEG3aYCppICsg LpJL9Bv2V3QSk8uBszTgKK5ybWo14aDQPx4rrhgsneD0h7DSnx6M3jvngxMra6W0 fnare4FQlkbPmgAj+XtB7RdCzsuwoke/7TJsvDLQrEbyOYTGnl7bYS8NOSrIg5Tp w4UPpXrMTQK7e/6okL1OJYAXXYurxep8QjsjpF3nahxC3IVzAZ9uio6ehJrDNEPC ErqOSPQTMkjOA2npovsQKCH3Mv/yGzAigpsQassPneWwp//NupMLKmmIm6645Xw2 6kqSlVFYz81lhzIylGEQKIoiLcszpB6qqWUzGVt0B94joRbvg0m//8BDaZbHeTqP m/acRYHRC1utpkAZEnBZRsd79cI+EeuARROUfGsoUMfOueTc4+qQ7Yrjbj4rTvnC lLM9Qz9h1QkfyRF1IHHPw/fS5twpNTUdO9c1+3qzS3AQfl5dZWpChoF9Um+ycVPR nQrpk05pHEY= =z8wK -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "We have a small collection of core framework updates this time, mostly around clk registration by clk providers and debugfs "nice to haves" for rate constraints. I'll highlight that we're now setting the clk_init_data pointer inside struct clk_hw to NULL during clk_register(), which may break some drivers that thought they could use that pointer during normal operations. That change has been sitting in next for a while now but maybe something is still broken. We'l see. Other than that the core framework changes aren't invasive and they're fixing bugs, simplifying, and making things better. On the clk driver side we got the usual addition of new SoC support, new features for existing drivers, and bug fixes scattered throughout. The biggest diffstat is the Amlogic driver that gained CPU clk support in addition to migrating to the new way of specifying clk parents. After that the Qualcomm, i.MX, Mediatek, and Rockchip clk drivers got support for various new SoCs and clock controllers from those vendors. Core: - Drop NULL checks in clk debugfs - Add min/max rates to clk debugfs - Set clk_init_data pointer inside clk_hw to NULL after registration - Make clk_bulk_get_all() return an 'id' corresponding to clock-names - Evict parents from parent cache when they're unregistered New Drivers: - Add clock driver for i.MX8MN SoCs - Support aspeed AST2600 SoCs - Support for Mediatek MT6779 SoCs - Support qcom SM8150 GCC and RPMh clks - Support qcom QCS404 WCSS clks - Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807) - Addition of clock driver for Rockchip rk3308 SoCs Updates: - Add regulator support to the cdce925 clk driver - Add support for Raspberry Pi 4 bcm2711 SoCs - Add SDIO gate support to aspeed driver - Add missing of_node_put() calls in various clk drivers - Migrate Amlogic driver to new clock parent description method - Add DVFS support to Amlogic Meson g12 - Add Amlogic Meson g12a reset support to the axg audio clock controller - Add sm1 support to the Amlogic Meson g12a clock controller - Switch i.MX8MM clock driver to platform driver - Add Hifi4 DSP related clocks for i.MX8QXP SoC - Fix Audio PLL setting and parent clock for USB - Misc i.MX8 clock driver improvements and corrections - Set floor ops for Qualcomm SD clks so that rounding works - Fix "always-on" Clock Domains on Renesas R-Car M1A, RZ/A1, RZ/A2, and RZ/N1 - Enable the Allwinner V3 SoC and fix the i2s clock for H6" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits) clk: Drop !clk checks in debugfs dumping clk: imx: imx8mn: fix pll mux bit clk: imx: imx8mm: fix pll mux bit clk: imx: clk-pll14xx: unbypass PLL by default clk: imx: pll14xx: avoid glitch when set rate clk: mvebu: ap80x: add AP807 clock support clk: mvebu: ap806: Prepare the introduction of AP807 clock support clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver clk: mvebu: ap806: be more explicit on what SaR is clk: mvebu: ap80x-cpu: add AP807 CPU clock support clk: mvebu: ap806-cpu: prepare mapping of AP807 CPU clock dt-bindings: ap806: Document AP807 clock compatible dt-bindings: ap80x: Document AP807 CPU clock compatible clk: sprd: add missing kfree clk: at91: allow 24 Mhz clock as input for PLL clk: Make clk_bulk_get_all() return a valid "id" clk: actions: Fix factor clk struct member access clk: qcom: rcg: Return failure for RCG update clk: remove extra ---help--- tags in Kconfig clk: add include guard to clk-conf.h ...	2019-09-20 15:45:07 -07:00