Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This driver handles usb phy power on and shutdown for hi3660 Soc of
Hisilicon.
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Pengcheng Li <lpc.li@hisilicon.com>
Cc: Jianguo Sun <sunjianguo1@huawei.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jiancheng Xue <xuejiancheng@hisilicon.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Binghui Wang <wangbinghui@hisilicon.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Yu Chen <chenyu56@huawei.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
It adds inno-usb2-phy driver for hi3798cv200 SoC USB 2.0 support. One
inno-usb2-phy device can support up to two PHY ports. While there is
device level reference clock and power reset to be controlled, each PHY
port has its own utmi reset that needs to assert/de-assert as needed.
Hi3798cv200 needs to access PHY port0 register via particular peripheral
syscon controller register to control PHY, like turning on PHY clock.
Signed-off-by: Pengcheng Li <lpc.li@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Add combo phy driver for HiSilicon STB SoCs. This phy can be
used as pcie-phy, sata-phy or usb-phy.
Changes for v5:
- Add bindings doc for Hi3798CV200 peripheral controller, and refer to
the bindings of this parent node in combphy bindings doc.
Changes for v4:
- Instead of relying on device id, add a new property
hisilicon,fixed-mode for combphy device that doesn't support mode
select but a fixed phy mode.
- Move combphy mode select register bits definition to device tree, as
it may vary from one device to another.
Changes for v3:
- Make combphy device be child of peripheral controller and use 'reg'
property for mapping combphy configuration registers.
- Kill "hisilicon,peripheral-syscon" property, since parent node is
just the syscon controller now.
- Check combphy id to handle the quirk that combphy0 can not configure
mode but always works in USB3 mode.
- Unify phy .init and .exit hooks for different combphy instances and
work modes, as the only quirk we need to handle is that combphy0 can
only work in USB3 mode.
- Better naming for clock and reset, 'ref' to 'ref_clk', 'por' to
'por_rst'.
Changes for v2:
- Move DT bindings into a separate patch.
- Drop the spurious newline from drivers/phy/Makefile.
- Use the phy type defines in dt-bindings/phy/phy.h.
- Use PTR_ERR_OR_ZERO() for checking return from
devm_of_phy_provider_register().
- Add USB3 phy support.
Signed-off-by: Jianguo Sun <sunjianguo1@huawei.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
