Commit Graph

8 Commits

Author SHA1 Message Date
Haojian Zhuang
86853c83e3 gpio: add gpio offset in gpio range cells property
Add gpio offset into "gpio-range-cells" property. It's used to support
sparse pinctrl range in gpio chip.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-07 05:27:29 +01:00
Linus Torvalds
ca2a88f56a MTD pull for 3.8
- Various cleanups especially in NAND tests
  - Add support for NAND flash on BCMA bus
  - DT support for sh_flctl and denali NAND drivers
  - Kill obsolete/superceded drivers (fortunet, nomadik_nand)
  - Fix JFFS2 locking bug in ENOMEM failure path
  - New SPI flash chips, as usual
  - Support writing in 'reliable mode' for DiskOnChip G4
  - Debugfs support in nandsim
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Merge tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd

Pull MTD updates from David Woodhouse:
 - Various cleanups especially in NAND tests
 - Add support for NAND flash on BCMA bus
 - DT support for sh_flctl and denali NAND drivers
 - Kill obsolete/superceded drivers (fortunet, nomadik_nand)
 - Fix JFFS2 locking bug in ENOMEM failure path
 - New SPI flash chips, as usual
 - Support writing in 'reliable mode' for DiskOnChip G4
 - Debugfs support in nandsim

* tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd: (96 commits)
  mtd: nand: typo in nand_id_has_period() comments
  mtd: nand/gpio: use io{read,write}*_rep accessors
  mtd: block2mtd: throttle writes by calling balance_dirty_pages_ratelimited.
  mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
  mtd: nand/docg4: fix and improve read of factory bbt
  mtd: nand/docg4: reserve bb marker area in ecclayout
  mtd: nand/docg4: add support for writing in reliable mode
  mtd: mxc_nand: reorder part_probes to let cmdline override other sources
  mtd: mxc_nand: fix unbalanced clk_disable() in error path
  mtd: nandsim: Introduce debugfs infrastructure
  mtd: physmap_of: error checking to prevent a NULL pointer dereference
  mtg: docg3: potential divide by zero in doc_write_oob()
  mtd: bcm47xxnflash: writing support
  mtd: tests/read: initialize buffer for whole next page
  mtd: at91: atmel_nand: return bit flips for the PMECC read_page()
  mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.c
  mtd: nand: onfi need to be probed in 8 bits mode
  mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width
  mtd: nand: print flash size during detection
  mted: nand_wait_ready timeout fix
  ...
2012-12-19 12:47:41 -08:00
Shiraz Hashim
86edd7b8ac ARM: SPEAr3xx: DT: add shirq node for interrupt multiplexor
shirq layer has been adapted to DT, add corresponding nodes in all
SPEAr3xx variants.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2012-11-26 16:55:32 +05:30
Jean-Christophe PLAGNIOL-VILLARD
6d7b42a447 mtd: fsmc_nand: pass the ale and cmd resource via resource
Do not use the platform_data to pass resource and be smart in the drivers.
Just pass it via resource

Switch to devm_request_and_ioremap at the sametime

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-By: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15 15:37:47 +02:00
Viresh Kumar
4ddb1c2957 ARM: SPEAr: Add plgpio node in device tree dtsi files
This patch adds plgpio nodes in SPEAr DT files.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11 19:08:52 +01:00
Viresh Kumar
10d8935f46 Viresh has moved
viresh.kumar@st.com email-id doesn't exist anymore as I have left the
company.  Replace ST's id with viresh.linux@gmail.com.

It also updates .mailmap file to fix address for 'git shortlog'

Signed-off-by: Viresh Kumar <viresh.linux@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-06-20 14:39:36 -07:00
Viresh Kumar
e037360785 SPEAr3xx: Add pinctrl support for boards
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
2012-04-22 22:49:28 +02:00
Viresh Kumar
c5fa4fdcdb ARM: SPEAr3xx: Add device-tree support to SPEAr3xx architecture
This patch adds a generic target for SPEAr3xx machines that can be configured
via the device-tree. Currently the following devices are supported via the
devicetree:

- VIC interrupts
- PL011 UART
- PL061 GPIO
- PL110 CLCD
- SP805 WDT
- Synopsys DW I2C
- Synopsys DW ethernet
- ST FSMC-NAND
- ST SPEAR-SMI
- ST SPEAR-KEYBOARD
- ST SPEAR-RTC
- ARASAN SDHCI-SPEAR
- SPEAR-EHCI
- SPEAR-OHCI

Other peripheral devices will follow in later patches.

This also removes IO_ADDRESS macro and creates 16 MB static mappings instead of
4K for individual peripherals. This is done to have efficient TLB lookup for any
I/O windows that are located closely together. ioremap() on this range will
return this mapping only instead of creating another.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
2012-04-22 22:41:35 +02:00