Use disk-activity trigger for armada-385-linksys
Keep dts alphabetically ordered for clearfog (Armada 388)
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Merge tag 'mvebu-dt-4.12-2' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt for 4.12 (part 2)
Use disk-activity trigger for armada-385-linksys
Keep dts alphabetically ordered for clearfog (Armada 388)
* tag 'mvebu-dt-4.12-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-385-linksys: disk-activity trigger for all
ARM: dts: clearfog: keep dts alphabetically ordered
Signed-off-by: Olof Johansson <olof@lixom.net>
Corrections:
* Correct clock frequency of X2 DU clock input for r8a7791/koelsch board
* Correct Z clock for r8a7792 SoC
* Correct parent of SSI[0-9] clocks for r8a779[013] SoCs
* Correct ethernet clock parent on r7s72100 SoC
* Correct DU clock for r8a7794/silk board
Cleanups:
* Drop _clk suffix from external CAN clock node name on r8a779[01] SoCs
Enhancements:
* Enable rtc r7s72100/genmai board
* Add Z2 clock for r8a7794 SoC
* Add DU clock for r8a7794 SoC
* Add power-domains to SDHI for r8a7794 and r7s72100 SoCs
* Add reset control properties for r8a774[35] SoCs
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Merge tag 'renesas-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.12
Corrections:
* Correct clock frequency of X2 DU clock input for r8a7791/koelsch board
* Correct Z clock for r8a7792 SoC
* Correct parent of SSI[0-9] clocks for r8a779[013] SoCs
* Correct ethernet clock parent on r7s72100 SoC
* Correct DU clock for r8a7794/silk board
Cleanups:
* Drop _clk suffix from external CAN clock node name on r8a779[01] SoCs
Enhancements:
* Enable rtc r7s72100/genmai board
* Add Z2 clock for r8a7794 SoC
* Add DU clock for r8a7794 SoC
* Add power-domains to SDHI for r8a7794 and r7s72100 SoCs
* Add reset control properties for r8a774[35] SoCs
* tag 'renesas-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
ARM: dts: r8a7791: Drop _clk suffix from external CAN clock node name
ARM: dts: r8a7790: Drop _clk suffix from external CAN clock node name
ARM: dts: genmai: Enable rtc and rtc_x1 clock
ARM: dts: rskrza1: add rtc DT support
ARM: dts: rskrza1: set rtc_x1 clock value
ARM: dts: r7s72100: add rtc to device tree
ARM: dts: r7s72100: add RTC_X clock inputs to device tree
ARM: dts: r7s72100: add rtc clock to device tree
ARM: dts: koelsch: Correct clock frequency of X2 DU clock input
ARM: dts: r8a7794: Add Z2 clock
ARM: dts: r8a7792: Correct Z clock
ARM: dts: r8a7793: Correct parent of SSI[0-9] clocks
ARM: dts: r8a7791: Correct parent of SSI[0-9] clocks
ARM: dts: r8a7790: Correct parent of SSI[0-9] clocks
ARM: dts: r7s72100: fix ethernet clock parent
ARM: dts: silk: Correct clock of DU1
ARM: dts: alt: Correct clock of DU1
ARM: dts: r8a7794: Correct clock of DU1
ARM: dts: r8a7794: Add DU1 clock to device tree
ARM: dts: r7s72100: add power-domains to sdhi
...
Signed-off-by: Olof Johansson <olof@lixom.net>
H3 patches for 4.12, which are mostly related to reworking the H3 DTSI to
be usable on the arm64 H5 DTSI, that shares almost everything with the H3
but the CPU cores.
We also have some new device addition (USB, mostly) that would conflict
otherwise.
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Merge tag 'sunxi-dt-h3-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3 DT changes for 4.12
H3 patches for 4.12, which are mostly related to reworking the H3 DTSI to
be usable on the arm64 H5 DTSI, that shares almost everything with the H3
but the CPU cores.
We also have some new device addition (USB, mostly) that would conflict
otherwise.
* tag 'sunxi-dt-h3-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sun8i: h2+: enable USB OTG for Orange Pi Zero board
ARM: sun8i: h3: enable USB OTG on Orange Pi One
ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5
arm: sun8i: h3: split Allwinner H3 .dtsi
arm: sun8i: h3: correct the GIC compatible in H3 to gic-400
arm: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI
arm: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI
Signed-off-by: Olof Johansson <olof@lixom.net>
As usual a number of changes, among which:
- All the sun5i DTSI has been reworked based on the new documentation and
the IPs that are actually found in all those SoCs. Part of that rework
also brought the GR8 DTSI to include sun5i.dtsi
- Mali devfreq and thermal throttling support on the A33
- AC power supplies for the AXP209 and AXP22X PMIC
- CAN support for the A20
- CPUFreq-based thermal throttling for the A33
- New board: NanoPi NEO Air
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Merge tag 'sunxi-dt-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.12
As usual a number of changes, among which:
- All the sun5i DTSI has been reworked based on the new documentation and
the IPs that are actually found in all those SoCs. Part of that rework
also brought the GR8 DTSI to include sun5i.dtsi
- Mali devfreq and thermal throttling support on the A33
- AC power supplies for the AXP209 and AXP22X PMIC
- CAN support for the A20
- CPUFreq-based thermal throttling for the A33
- New board: NanoPi NEO Air
* tag 'sunxi-dt-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (38 commits)
ARM: sun8i: sina33: add highest OPP of CPUs
ARM: sun8i: a33: Add devfreq-based GPU cooling
ARM: sun8i: a33: add CPU thermal throttling
ARM: sun8i: a33: add thermal sensor
ARM: dts: sun7i: fix device node ordering
ARM: dts: sun4i: fix device node ordering
ARM: dts: sun7i: Add can0_pins_a pinctrl settings
ARM: dts: sun7i: Add CAN node
ARM: dts: sun4i: Add can0_pins_a pinctrl settings
ARM: dts: sun4i: Add CAN node
ARM: sun7i: cubietruck: enable ACIN und USB power supply subnode
ARM: dts: sun5i: Add interrupt for display backend
dt-bindings: display: sun4i: Add display backend interrupt to device tree binding
ARM: dts: sun7i: Use axp209.dtsi on A20-OLinuXino-Micro
ARM: dts: sun6i: sina31s: Enable SPDIF out
ARM: sun8i: sina33: add cpu-supply
ARM: sun8i: a33: add all operating points
ARM: sun5i: chip: enable ACIN power supply subnode
ARM: dts: sun8i: sina33: enable ACIN power supply subnode
ARM: dtsi: axp22x: add AC power supply subnode
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Clean-up:
- Add clock/memory nodes
- Add labels for CPU nodes
- Remove unused unit names and reg
- Remove unused skeleton.dtsi
- Add support for PMU
- Add QSPI for sodia board
- Add Reset controller for Arria10
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Merge tag 'socfpga_dts_for_v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v4.12
- Clean-up:
- Add clock/memory nodes
- Add labels for CPU nodes
- Remove unused unit names and reg
- Remove unused skeleton.dtsi
- Add support for PMU
- Add QSPI for sodia board
- Add Reset controller for Arria10
* tag 'socfpga_dts_for_v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: Add Devkit A10-SR Reset Controller
ARM: dts: socfpga: sodia: enable qspi
ARM: dts: socfpga: Add support for PMU
ARM: dts: socfpga: Add labels for CPU nodes
ARM: dts: socfpga: Do not include skeleton.dtsi
ARM: dts: socfpga: Remove unit name for LEDs in EBV SOCrates
ARM: dts: socfpga: Remove unneeded reg from stmpe_touchscreen
ARM: dts: socfpga: Remove unneeded unit names
ARM: dts: socfpga: Add unit name to memory nodes
ARM: dts: socfpga: Add unit name to clock nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Highlights:
----------
- ADD RTC support on STM32F746 MCU
- Enable RTC on STM32F746 Eval board
- Enable clocks on STM32F746 MCU
- Enable DMA, pwm1 and pwm3 on STM32F429I Eval
- Add support of STM32H743 MCU and his Eval board
- Enable USB HS and FS on STM32F469 Disco board
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Merge tag 'stm32-dt-for-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt
STM32 DT updates for v4.12, round 1
Highlights:
----------
- ADD RTC support on STM32F746 MCU
- Enable RTC on STM32F746 Eval board
- Enable clocks on STM32F746 MCU
- Enable DMA, pwm1 and pwm3 on STM32F429I Eval
- Add support of STM32H743 MCU and his Eval board
- Enable USB HS and FS on STM32F469 Disco board
* tag 'stm32-dt-for-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
dt-bindings: Document the STM32 USB OTG DWC2 core binding
ARM: dts: stm32: Enable USB HS in FS mode (embedded phy) on stm32f429-disco
ARM: dts: stm32: Enable USB FS on stm32f469-disco
ARM: dts: stm32: Add USB FS support for STM32F429 MCU
ARM: dts: stm32: Add STM32H743 MCU and STM32H743i-EVAL board
ARM: dts: stm32: Enable pwm1 and pwm3 on stm32f429i-eval
ARM: dts: stm32: Enable dma by default on stm32f4 adc
ARM: dts: stm32: enable RTC on stm32746g-eval
ARM: dts: stm32: Add RTC support for STM32F746 MCU
ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f746
dt-bindings: mfd: Add STM32F7 RCC numeric constants into DT include file
ARM: dts: stm32: Enable clocks for STM32F746 MCU
Signed-off-by: Olof Johansson <olof@lixom.net>
This reverts commit 769907ae6e.
This change caused issues with people using USB gadget for serial
consoles. In addition, with the other USB changes coming in, it
makes sense to revert this patch and apply the new set as it
becomes ready.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The current practice is to not add _clk suffixes to clock node names in
DT, as these names are used as the actual clock names.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The current practice is to not add _clk suffixes to clock node names in
DT, as these names are used as the actual clock names.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the 32.768 kHz RTC_X1 clock by setting the frequency value to
non-zero and enable the realtime clock.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Commit a4ee7e18d8 ("ARM: dts: armada: Add default trigger for sata
led") adds the default trigger to individual boards, move it to
armada-385-linksys.dtsi which effectively enables the definition for
the WRT1900ACS (Shelby) as well as for future boards.
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The A33 supports 1.1GHz and 1.2GHz frequencies at 1.32V and the Sinlinx
SinA33 has its cpu-supply property set in the cpu DT node.
Therefore, CPUfreq knows how to handle the regulator in charge of the
CPU and can adjust its voltage to match the OPP.
Add these two CPU frequencies to the CPU OPP table of the Sinlinx
SinA33.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This adds GPU thermal throttling for the Allwinner A33.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
This adds CPU thermal throttling for the Allwinner A33. It uses the
thermal sensor present in the SoC's GPADC.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This adds the DT node for the thermal sensor present in the Allwinner
A33 GPADC.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch changes the device node position of ps20 and ps21 to fix
ordering by rising physical address.
From
uart7: serial@01c29c00
i2c0: i2c@01c2ac00
i2c1: i2c@01c2b000
i2c2: i2c@01c2b400
ps20: ps2@01c2a000
ps21: ps2@01c2a400
to
uart7: serial@01c29c00
ps20: ps2@01c2a000
ps21: ps2@01c2a400
i2c0: i2c@01c2ac00
i2c1: i2c@01c2b000
i2c2: i2c@01c2b400
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the 32.768 kHz RTC_X1 clock by setting the frequency value to
non-zero.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the RTC clocks to device tree. The frequencies must be fixed values
according to the hardware manual.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The X2 crystal oscillator on the Koelsch development board provides a
74.25 MHz clock, not a 148.5 MHz clock.
Fixes: cd21cb46e1 ("ARM: shmobile: koelsch: Add DU external pixel clocks to DT")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The A20 SoC has an on-board CAN controller. This patch adds
the pinctrl settings for pins PH20 and PH21.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A20 SoC has an on-board CAN controller.
This patch adds the device node.
The CAN controller is inherited from the A10 SoC and uses the same driver.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A10 SoC has an on-board CAN controller. This patch adds the
pinctrl settings for pins PH20 and PH21.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A10 SoC has an on-board CAN controller.
This patch adds the device node.
This patch is adapted from the description in
Documentation/devicetree/bindings/net/can/sun4i_can.txt
Signed-off-by: Patrick Menschel <menschel.p@posteo.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Cubietruck has an AXP209 PMIC and can be power-supplied by ACIN via
the CHG-IN pin or by USB.
This enables the ACIN and the USB power supply subnode in the DT.
Signed-off-by: Alexander Syring <alex@asyring.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the Z2 clock (Cortex-A7 CPU core clock), which uses a fixed divider,
and link the first CPU node to it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Unlike other R-Car Gen2 SoCs with Cortex-A15 CPU cores, R-Car V2H does
not have a programmable Z clock (Cortex-A15 CPU core clock), but uses a
fixed divider.
This is similar to the Z2 clock (Cortex-A7 CPU core clock) on R-Car E2.
Hence:
- Remove the Z clock output from the cpg_clocks node, as this implied
a programmable clock,
- Add the Z clock as a fixed factor clock,
- Let the first CPU node point to the new Z clock,
- Remove the Z clock index from the bindings (this definition was used
by r8a7792.dtsi only, and was not a contract between DT and driver).
Fixes: 7c4163aae3 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.
Fixes: 072d326542 ("ARM: dts: r8a7793: add MSTP10 clocks to device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.
Fixes: ee9141522d ("ARM: shmobile: r8a7791: add MSTP10 support on DTSI")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The SSI-ALL gate clock is located in between the P clock and the
individual SSI[0-9] clocks, hence the former should be listed as their
parent.
Fixes: bcde372254 ("ARM: shmobile: r8a7790: add MSTP10 support on DTSI")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Technically, the Ethernet block is run off the 133MHz Bus (B) clock, not
the 33MHz Peripheral 0 (P0) clock.
Fixes: 969244f9c7 ("ARM: dts: r7s72100: add ethernet clock to device tree")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables USB HS working in FS mode on stm32f429-disco
with 5V VBUS enable.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch enables USB FS on stm32f469-disco with 5V VBUS enable.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch adds the USB pins and nodes for USB FS core.
Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
There was a little conflict between the v4.11 bugfixes and the new changes for 4.12,
this merges the fixes into the 4.12 branch to avoid having to resolve it again.
* Broadcom fixes in mainline
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
ARM: dts: BCM5301X: Fix memory start address
ARM: dts: BCM5301X: Fix UARTs on bcm953012k
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add hecc node for am35x
- Add onenand support for omap3-igep
- Add bluetooth binding for n900/n9/n950
- Configure clocks and SATA for dm81xx
- Update operating points tables for am33xx, am43xx and dra7
- Update SPI flash documentation for w25q64
- Configure SPI NOR for am335x-icev2
- Mux uart0 for am437x-gp-evm
- Add thermal zones for omap3, omap4, omap5, dra7
- Configure LEDs for am335x-baltos
- A series of droid 4 changes to configure various devices
such as keypad, regulators, gpio-keys, rtc, power button,
compass, accelerometer, touchscreen, backlight, poweroff,
tmp105, HDMI, LCD panel and LEDs, EHCI, and micro-SD
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Merge tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Devicetree changes for omaps for v4.12 merge window" from Tony Lindgren:
- Add hecc node for am35x
- Add onenand support for omap3-igep
- Add bluetooth binding for n900/n9/n950
- Configure clocks and SATA for dm81xx
- Update operating points tables for am33xx, am43xx and dra7
- Update SPI flash documentation for w25q64
- Configure SPI NOR for am335x-icev2
- Mux uart0 for am437x-gp-evm
- Add thermal zones for omap3, omap4, omap5, dra7
- Configure LEDs for am335x-baltos
- A series of droid 4 changes to configure various devices
such as keypad, regulators, gpio-keys, rtc, power button,
compass, accelerometer, touchscreen, backlight, poweroff,
tmp105, HDMI, LCD panel and LEDs, EHCI, and micro-SD
* tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (35 commits)
ARM: dts: am335x-baltos: add LED support
ARM: dts: omap4-droid4: Fix MMC1 card for detect GPIO and regulator
ARM: dts: OMAP4460: Thermal: Add slope and offset values
ARM: dts: OMAP443x: Thermal: Add slope and offset values
ARM: dts: OMAP5: Thermal: Add slope and offset values
ARM: dts: DRA7: Thermal: Add slope and offset values
ARM: dts: omap3: Add cpu_thermal zone
ARM: dts: am437x-gp-evm: Add pinmux for uart0
ARM: dts: am335x-icev2: Add SPI based NOR
Documentation: devicetree: mtd: add w25q64 to list of supported SPI flashes
ARM: dts: dra7: Add updated operating-points-v2 table for cpu
ARM: dts: am4372: Update operating-points-v2 table for cpu
ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu
ARM: dts: am33xx: Add updated operating-points-v2 table for cpu
ARM: dts: dm8168-evm: add SATA node
ARM: dts: dm8168-evm: add the external reference clock for SATA
ARM: dts: N9/N950: add bluetooth
ARM: dts: N900: Add bluetooth
ARM: dts: omap4-droid4: Configure EHCI so modems can be accessed
ARM: dts: motorola-cpcap-mapphone: add LEDs
...
definitions for the mmc resets in the socs reset controller, sound
support for the Rock2, dma support for mmc controllers on the rk3188
and a led-fix for the MiQi board and and irq-fix for older Cortex-A9 socs.
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Merge tag 'v4.12-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 updates for 4.12 part1" from Heiko Stübner:
Contains one new board, the Tinkerboard from Asus based on the rk3288,
definitions for the mmc resets in the socs reset controller, sound
support for the Rock2, dma support for mmc controllers on the rk3188
and a led-fix for the MiQi board and and irq-fix for older Cortex-A9 socs.
* tag 'v4.12-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: setup DMA-channels for mmc0 and emmc for rk3188
ARM: dts: rockchip: fix PPI misconfiguration on Cortex-A9 socs
ARM: dts: rockchip: add rk322x dw-mmc resets
ARM: dts: rockchip: add rk3066/rk3188 dw-mmc resets
ARM: dts: rockchip: add rk3036 dw-mmc resets
ARM: dts: rockchip: add rk3288 dw-mmc resets
ARM: dts: rockchip: add dts for RK3288-Tinker board
dt-bindings: add rk3288-based Asus Tinker board
ARM: dts: rockchip: fix the MiQi board's LED definition
ARM: dts: rockchip: Add support for ES8388 to the Radxa Rock 2
- Add the power controller to the DTS.
- Augment the GPIO nodes to also include the Faraday
compatible.
- Add the PCI bus host and config to the Gemini device trees.
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Merge tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Pull "DTS updates for the Gemini on top of the multiplatform base" from Linus Walleij:
- Add the power controller to the DTS.
- Augment the GPIO nodes to also include the Faraday
compatible.
- Add the PCI bus host and config to the Gemini device trees.
* tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: add PCI to the Gemini device trees
ARM: dts: augment Gemini GPIO nodes
ARM: dts: add power controller to the Gemini DTS
4.12, please pull the following:
- Rafal:
* adds basic support for the Linksys EA9200, Linksys EA6300 V1, Linksys
EA9500, TP-Link Archer C5 V2 which are all based on BCM470x SoCs with
a bunch of BCM43602 radios.
* updates the BCM5301X DTS and DTS include file and moves the serial
console parameters to the DTS include file since all BCM5301X that we have so
far are consistent in using the same UART. He also does the same for the
BCM53573 DTS.
* makes some updates to the Tenda AC9 platform by describing its
PCIe controllers and endpoints in order to be able to represent GPIOs attached
to the on-chip Wi-Fi module. Once done, he adds the 2Ghz LED which is connected
to one of these GPIOs.
* re-licenses the DTS files he created to the ISC license
* removes the use of the non-existend "default-off" LED trigger in the
BCM53573 and BCM5301X DTS files
- Aditya adds missing Netgear R8000 LEDS and keys for WAN status LEDS and brightness
- Jon:
* adds NAND controller Device Tree nodes to the BCM953012K reference board
* converts the BCM5301X SoC to use the recently introduced Broadcom QSPI controller
Device Tree nodes.
* fixes the GIC PPI interrupt flags that the kernel now
reports about.
* adds ARM TWD watchdog entries to the BCM5301X DTS include file
* adds I2C entries to the BCM5301X DTS include files.
* disables i2c by default in the Northstar Plus DTS include file, and
,enables it at the board level instead.
* adds USB (OHCI & EHCI) Device Tree nodes to the Northstar Plus DTS
include files.
- Steven adds the mailbox (PDC) unit and the crytographic unit (SPU) to the
Broadcom Northstar Plus SoC DTS include file. Steven also adds proper ethernet
aliases to the BCM53012HR board since some bootloaders require that for MAC address
patching.
- Eric adds the DSI and its corresponding clock nodes to the BCM283x DTS files
but leaves them disabled by default (overlays should take care of enabling it)
- Boris adds support for HDMI audio and related DMA channels to the BCM283x SoCs
- Gerd adds support for the BCM2835 specific SDHCI controller to the BCM283x SoCs
- Rob fixes the iProc msi-controller name and unit address now that DTC can produce
additional errors
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Merge tag 'arm-soc/for-4.12/devicetree' of http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.12" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoCs Device Tree updates for
4.12, please pull the following:
- Rafal:
* adds basic support for the Linksys EA9200, Linksys EA6300 V1, Linksys
EA9500, TP-Link Archer C5 V2 which are all based on BCM470x SoCs with
a bunch of BCM43602 radios.
* updates the BCM5301X DTS and DTS include file and moves the serial
console parameters to the DTS include file since all BCM5301X that we have so
far are consistent in using the same UART. He also does the same for the
BCM53573 DTS.
* makes some updates to the Tenda AC9 platform by describing its
PCIe controllers and endpoints in order to be able to represent GPIOs attached
to the on-chip Wi-Fi module. Once done, he adds the 2Ghz LED which is connected
to one of these GPIOs.
* re-licenses the DTS files he created to the ISC license
* removes the use of the non-existend "default-off" LED trigger in the
BCM53573 and BCM5301X DTS files
- Aditya adds missing Netgear R8000 LEDS and keys for WAN status LEDS and brightness
- Jon:
* adds NAND controller Device Tree nodes to the BCM953012K reference board
* converts the BCM5301X SoC to use the recently introduced Broadcom QSPI controller
Device Tree nodes.
* fixes the GIC PPI interrupt flags that the kernel now
reports about.
* adds ARM TWD watchdog entries to the BCM5301X DTS include file
* adds I2C entries to the BCM5301X DTS include files.
* disables i2c by default in the Northstar Plus DTS include file, and
,enables it at the board level instead.
* adds USB (OHCI & EHCI) Device Tree nodes to the Northstar Plus DTS
include files.
- Steven adds the mailbox (PDC) unit and the crytographic unit (SPU) to the
Broadcom Northstar Plus SoC DTS include file. Steven also adds proper ethernet
aliases to the BCM53012HR board since some bootloaders require that for MAC address
patching.
- Eric adds the DSI and its corresponding clock nodes to the BCM283x DTS files
but leaves them disabled by default (overlays should take care of enabling it)
- Boris adds support for HDMI audio and related DMA channels to the BCM283x SoCs
- Gerd adds support for the BCM2835 specific SDHCI controller to the BCM283x SoCs
- Rob fixes the iProc msi-controller name and unit address now that DTC can produce
additional errors
* tag 'arm-soc/for-4.12/devicetree' of http://github.com/Broadcom/stblinux: (27 commits)
ARM: dts: bcm: fix msi-controller name and unit address
ARM: dts: BCM53573: Specify serial console parameters
ARM: dts: BCM5301X: Specify serial console params in dtsi files
ARM: dts: NSP: Add crypto (SPU) to dtsi
ARM: dts: NSP: Add mailbox (PDC) to NSP
ARM: dts: BCM953012HR: Add ethernet aliases
ARM: dts: BCM5301X: Add support for TP-LINK Archer C5 V2
ARM: dts: NSP: disable i2c DT entry by default
ARM: dts: NSP: Add EHCI/OHCI USB nodes to device tree
ARM: dts: BCM5301X: Add I2C support to the DT
ARM: dts: BCM5301X: Add TWD WD Support to DT
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
ARM: dts: bcm2835: add sdhost controller to devicetree
ARM: dts: bcm283x: Add HDMI audio related properties
ARM: dts: BCM5301X: Don't use nonexistent "default-off" LED trigger
ARM: dts: BCM53573: Don't use nonexistent "default-off" LED trigger
ARM: dts: BCM5301X: Add missing Netgear R8000 LEDs and Keys
ARM: dts: BCM5301X: Relicense DTS files I created to the ISC
ARM: dts: bcm2835: Add the DSI module nodes and clocks.
ARM: dts: BCM53573: Add Tenda AC9 2 GHz LED
...
- Add node lable for Armada 38x
- Add support for Synology DS116 NAS and Linksys WRT1900ACS
- Update mbus controller description on Armada 38x allowing entering in standby
- Add default trigger for sata led on various linksys boards
- Update newly added armada-xp-98dx3236
- Enable hardware buffer manager support for the devices in the
Linksys WRT AC Serie
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Merge tag 'mvebu-dt-4.12-1' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt for 4.12 (part 1)" from Gregory CLEMENT:
- Add node lable for Armada 38x
- Add support for Synology DS116 NAS and Linksys WRT1900ACS
- Update mbus controller description on Armada 38x allowing entering in standby
- Add default trigger for sata led on various linksys boards
- Update newly added armada-xp-98dx3236
- Enable hardware buffer manager support for the devices in the
Linksys WRT AC Serie
* tag 'mvebu-dt-4.12-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: mvebu: linksys: enable buffer manager support
ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236
ARM: dts: mvebu: Move mv98dx3236 clock bindings
ARM: dts: Use armada-370-xp as a base for armada-xp-98dx3236
ARM: dts: armada-xp-98dx3236: combine dfx server nodes
ARM: dts: armada: Add default trigger for sata led
ARM: dts: armada-38x: Adjust mbus controller description on Armada 38x
ARM: dts: armada-385: add support for the Linksys WRT1900ACS (Shelby)
ARM: dts: armada-385-synology-ds116: add support for Synology DS116 NAS
ARM: dts: armada-38x add node labels
Video display on DA850 along with some
whitespace clean-up.
Also, enables sound and ADC support on
Lego EV3.
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Merge tag 'davinci-for-v4.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Pull "DaVinci DT updates for v4.12" from Sekhar Nori:
DaVinci device tree updates to enable
Video display on DA850 along with some
whitespace clean-up.
Also, enables sound and ADC support on
Lego EV3.
* tag 'davinci-for-v4.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-evm: add the output port to the vpif node
ARM: dts: da850-evm: add IO expander node on UI card
ARM: dts: da850: add vpif video display pins
ARM: dts: da850-evm: fix whitespace errors
ARM: da850-lego-ev3: Add device tree node for sound
ARM: da850-lego-ev3: Add device tree node for A/DC
The Moxa ART GPIO is a Faraday FTGPIO010. Augment the DTS node
to indicate both compatible values for the SoC and the IP part.
Also increase the register range to 0x100, it has at least 0x48
bytes of registers, and a few extra will not hurt.
Tested-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Keep the clearfog DTS file ordered alphabetically - Florian placed the
MDIO entry after pinctrl, which mis-orders the file.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
