Commit Graph

26758 Commits

Author SHA1 Message Date
Marc Zyngier
0394e1f605 ARM: KVM: enforce maximum size for identity mapped code
We're about to move to an init procedure where we rely on the
fact that the init code fits in a single page. Make sure we
align the idmap text on a vector alignment, and that the code is
not bigger than a single page.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-28 22:23:09 -07:00
Marc Zyngier
2fb410596c ARM: KVM: move to a KVM provided HYP idmap
After the HYP page table rework, it is pretty easy to let the KVM
code provide its own idmap, rather than expecting the kernel to
provide it. It takes actually less code to do so.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-28 22:23:08 -07:00
Marc Zyngier
3562c76dcb ARM: KVM: fix HYP mapping limitations around zero
The current code for creating HYP mapping doesn't like to wrap
around zero, which prevents from mapping anything into the last
page of the virtual address space.

It doesn't take much effort to remove this limitation, making
the code more consistent with the rest of the kernel in the process.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-28 22:23:08 -07:00
Marc Zyngier
6060df84cb ARM: KVM: simplify HYP mapping population
The way we populate HYP mappings is a bit convoluted, to say the least.
Passing a pointer around to keep track of the current PFN is quite
odd, and we end-up having two different PTE accessors for no good
reason.

Simplify the whole thing by unifying the two PTE accessors, passing
a pgprot_t around, and moving the various validity checks to the
upper layers.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-28 22:23:07 -07:00
Mark Rutland
372b7c1bc8 ARM: KVM: arch_timer: use symbolic constants
In clocksource/arm_arch_timer.h we define useful symbolic constants.
Let's use them to make the KVM arch_timer code clearer.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <cdall@cs.columbia.edu>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-28 22:22:57 -07:00
Marc Zyngier
210552c1bf ARM: KVM: add support for minimal host vs guest profiling
In order to be able to correctly profile what is happening on the
host, we need to be able to identify when we're running on the guest,
and log these events differently.

Perf offers a simple way to register callbacks into KVM. Mimic what
x86 does and enjoy being able to profile your KVM host.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-28 21:44:01 -07:00
Olof Johansson
e0d20b69d3 Merge branch 'gic/cleanup' into next/soc
Merge in the gic cleanup since it has a handful of annoying internal conflicts
with soc development branches. All of them are delete/delete conflicts.

* gic/cleanup:
  irqchip: vic: add include of linux/irq.h
  irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
  irqchip: gic: Call handle_bad_irq() directly
  arm: Move chained_irq_(enter|exit) to a generic file
  arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h

Signed-off-by: Olof Johansson <olof@lixom.net>

Conflicts:
	arch/arm/mach-shmobile/smp-emev2.c
	arch/arm/mach-shmobile/smp-r8a7779.c
	arch/arm/mach-shmobile/smp-sh73a0.c
	arch/arm/mach-socfpga/platsmp.c
2013-04-28 15:06:56 -07:00
Olof Johansson
afcf7924ec Merge branch 'fixes' into next/cleanup
Merging in fixes since there's a conflict in the omap4 clock tables caused by
it.

* fixes: (245 commits)
  ARM: highbank: fix cache flush ordering for cpu hotplug
  ARM: OMAP4: hwmod data: make 'ocp2scp_usb_phy_phy_48m" as the main clock
  arm: mvebu: Fix the irq map function in SMP mode
  Fix GE0/GE1 init on ix2-200 as GE0 has no PHY
  ARM: S3C24XX: Fix interrupt pending register offset of the EINT controller
  ARM: S3C24XX: Correct NR_IRQS definition for s3c2440
  ARM i.MX6: Fix ldb_di clock selection
  ARM: imx: provide twd clock lookup from device tree
  ARM: imx35 Bugfix admux clock
  ARM: clk-imx35: Bugfix iomux clock
  + Linux 3.9-rc6

Signed-off-by: Olof Johansson <olof@lixom.net>

Conflicts:
	arch/arm/mach-omap2/cclock44xx_data.c
2013-04-28 15:01:12 -07:00
Olof Johansson
775c4f66fd This allows that device tree enables platform to setup a runtime IO mapping for the chip id
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Merge tag 'late-exynos-v3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into late/dt

From Kukjin Kim:
This allows that device tree enables platform to setup a runtime IO
mapping for the chip id

* tag 'late-exynos-v3-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: dts: Add chip-id controller node on Exynos4/5 SoC
  ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-28 12:24:20 -07:00
Tomasz Figa
765d012c23 ARM: dts: exynos4210: Add basic dts file for universal_c210 board
This patch adds basic device tree sources for Universal C210 board.

Currently support includes:
- eMMC
- serial
- max8952 and max8998 voltage regulators.
- gpio-keys

More support will be added in further patches.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-28 12:17:14 -07:00
Tomasz Figa
cc4193eaca ARM: dts: exynos4: Add node for PWM device
This patch adds device tree node for PWM block present on Exynos 4 SoCs.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-28 12:17:11 -07:00
Tomasz Figa
278c800ec4 ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos
This patch removes legacy PWM timer interrupt initialization from
exynos{4,5}_init_irq() functions, since it conflicts with internal
interrupt handling of the new PWM clocksource driver.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-28 12:17:08 -07:00
Olof Johansson
a4591dcf74 ARM: exynos: dts: cros5250: add EC device
Add basic EC information to device tree, currently only describing the
keyboard and keymap.

Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-28 12:04:39 -07:00
Doug Anderson
61d4f0523a ARM: dts: Add sbs-battery for exynos5250-snow
Now that we have i2c-arbitrator in place on bus 4 we can add the
sbs-battery driver.  Future devices will be added onto bus 4 once
drivers are in good shape.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-28 12:04:06 -07:00
Doug Anderson
97a4a1ba0e ARM: dts: Add i2c-arbitrator bus for exynos5250-snow
We need to use the i2c-arbitrator to talk to any of the devices on i2c
bus 4 on exynos5250-snow so that we don't confuse the embedded
controller (EC).  Add the i2c-arbitrator to the device tree.  As we
add future devices (keyboard, sbs, tps65090) we'll add them on top of
this.

The arbitrated bus is numbered 104 simply as a convenience to make it
easier for people poking around to guess that it might have something
to do with the physical bus 4.

The addition is split between the cros5250-common and the snow device
tree file since not all cros5250-class devices use arbitration.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-28 12:03:53 -07:00
Olof Johansson
6cae0fafe3 Merge branch 'exynos/dt' into late/dt
* exynos/dt: (125 commits)
  ARM: dts: add PDMA0 changes for exynos5440
  ARM: dts: Add cpufreq controller node for Exynos5440 SoC
  ARM: dts: Fix gmac clock ids due to changes in Exynos5440
  ARM: dts: add device tree file for SD5v1 board
  ARM: dts: update bootargs to boot from sda2 for exynos5440-ssdk5440
  ARM: dts: add PMU support in exynos5440
  ARM: dts: Add node for GMAC for exynos5440
  ARM: dts: list the interrupts generated by pin-controller on Exynos5440
  ARM: dts: Add FIMD DT binding Documentation
  ARM: dts: Add FIMD node and display timing node to exynos4412-origen.dts
  ARM: dts: Add FIMD node to exynos4
  ARM: dts: Add SYSREG block node for S5P/Exynos4 SoC series
  ARM: dts: Add display timing node to exynos5250-smdk5250.dts
  ARM: dts: Add FIMD node to exynos5
  ARM: dts: Add virtual GIC DT bindings for exynos5440
  ARM: dts: Document usb clocks in samsung,exynos4210-ehci/ohci bindings
  ARM: dts: add usb 2.0 clock references to exynos5250 device tree
  ARM: dts: Add architected timer nodes for exynos5250
  ARM: dts: Declare the gic as a15 compatible for exynos5250
  ARM: dts: Add HDMI HPD and regulator node for Arndale board
  ...
2013-04-28 12:03:33 -07:00
Olof Johansson
4fac6f0e65 Merge branch 'samsung/pinctrl-exynos' into late/dt
* samsung/pinctrl-exynos:
  ARM: EXYNOS: skip wakeup interrupt registration for exynos5250 if pinctrl is enabled
  gpio: samsung: skip gpiolib registration if pinctrl support is enabled for exynos5250
  pinctrl: exynos: add exynos5250 SoC specific data
2013-04-28 12:02:44 -07:00
Mark Brown
a2c05e91b9 Merge remote-tracking branch 'regulator/topic/max8952' into v3.9-rc8 2013-04-28 02:13:43 +01:00
Mark Brown
c98cac899b Merge remote-tracking branch 'regulator/topic/ab8500' into v3.9-rc8 2013-04-28 02:13:34 +01:00
Rafael J. Wysocki
885f925eef Merge branch 'pm-cpufreq'
* pm-cpufreq: (57 commits)
  cpufreq: MAINTAINERS: Add co-maintainer
  cpufreq: pxa2xx: initialize variables
  ARM: S5pv210: compiling issue, ARM_S5PV210_CPUFREQ needs CONFIG_CPU_FREQ_TABLE=y
  cpufreq: cpu0: Put cpu parent node after using it
  cpufreq: ARM big LITTLE: Adapt to latest cpufreq updates
  cpufreq: ARM big LITTLE: put DT nodes after using them
  cpufreq: Don't call __cpufreq_governor() for drivers without target()
  cpufreq: exynos5440: Protect OPP search calls with RCU lock
  cpufreq: dbx500: Round to closest available freq
  cpufreq: Call __cpufreq_governor() with correct policy->cpus mask
  cpufreq / intel_pstate: Optimize intel_pstate_set_policy
  cpufreq: OMAP: instantiate omap-cpufreq as a platform_driver
  arm: exynos: Enable OPP library support for exynos5440
  cpufreq: exynos: Remove error return even if no soc is found
  cpufreq: exynos: Add cpufreq driver for exynos5440
  cpufreq: AMD "frequency sensitivity feedback" powersave bias for ondemand governor
  cpufreq: ondemand: allow custom powersave_bias_target handler to be registered
  cpufreq: convert cpufreq_driver to using RCU
  cpufreq: powerpc/platforms/cell: move cpufreq driver to drivers/cpufreq
  cpufreq: sparc: move cpufreq driver to drivers/cpufreq
  ...

Conflicts:
	MAINTAINERS (with commit a8e39c3 from pm-cpuidle)
	drivers/cpufreq/cpufreq_governor.h (with commit beb0ff3)
2013-04-28 02:10:46 +02:00
Rafael J. Wysocki
e4f5a3adc4 Merge branch 'pm-cpuidle'
* pm-cpuidle: (51 commits)
  cpuidle: add maintainer entry
  ARM: s3c64xx: cpuidle: use init/exit common routine
  SH: cpuidle: use init/exit common routine
  cpuidle: fix comment format
  ARM: imx: cpuidle: use init/exit common routine
  ARM: davinci: cpuidle: use init/exit common routine
  ARM: kirkwood: cpuidle: use init/exit common routine
  ARM: calxeda: cpuidle: use init/exit common routine
  ARM: tegra: cpuidle: use init/exit common routine for tegra3
  ARM: tegra: cpuidle: use init/exit common routine for tegra2
  ARM: OMAP4: cpuidle: use init/exit common routine
  ARM: shmobile: cpuidle: use init/exit common routine
  ARM: tegra: cpuidle: use init/exit common routine
  ARM: OMAP3: cpuidle: use init/exit common routine
  ARM: at91: cpuidle: use init/exit common routine
  ARM: ux500: cpuidle: use init/exit common routine
  cpuidle: make a single register function for all
  ARM: ux500: cpuidle: replace for_each_online_cpu by for_each_possible_cpu
  cpuidle: remove en_core_tk_irqen flag
  ARM: OMAP3: remove cpuidle_wrap_enter
  ...
2013-04-28 01:54:49 +02:00
Linus Torvalds
4cbbd1d55d ARM: arm-soc fixes for 3.9
A late-arriving fix for musb on OMAP4, resolving an issue where the musb
 IP won't be clocked and thus not functional. Small in scope, most of the
 lines changed is a longish comment.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fix from Olof Johansson:
 "A late-arriving fix for musb on OMAP4, resolving an issue where the
  musb IP won't be clocked and thus not functional.  Small in scope,
  most of the lines changed is a longish comment."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: OMAP4: hwmod data: make 'ocp2scp_usb_phy_phy_48m" as the main clock
2013-04-27 13:58:36 -07:00
Wei Yongjun
9bc25a1d5f xen/arm: remove duplicated include from enlighten.c
Remove duplicated include.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
2013-04-27 14:57:17 +00:00
Thomas Abraham
662478d060 ARM: dts: add mshc controller node for Exynos4x12 SoCs
Commit 800974ac ("ARM: dts: Add board dts file for ODROID-X") includes a node
to describe the board level properties for mshc controller. But the mshc
controller node was not added in the Exynos4x12 dtsi file which resulted
in the following warning when compiling the dtb files.

Warning (reg_format): "reg" property in /mshc@12550000/slot@0 has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells value for /mshc@12550000/slot@0
Warning (avoid_default_addr_size): Relying on default #size-cells value for /mshc@12550000/slot@0

Fix this by adding the mshc controller node for Exynos4x12 SoCs.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Tested-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-26 18:00:33 -07:00
Doug Anderson
522ccdb6fd ARM: dts: Disable the RTC by default on exynos5
This change makes the rtc on the exynos5250 and 5440 disabled by
default to match exynos4.

Ever since the common clock framework came in, exynos5250 boards
have dumped lots of warnings in the boot log. It turns out that
we don't see those on exynos4 since the rtc is disabled by default.
While we need to get to the bottom of the problems with the RTC,
it still makes sense to have the default state of the RTC on exynos
boards match.

For the record, warnings look like this:
  ------------[ cut here ]------------
  WARNING: at drivers/clk/clk.c:771 __clk_enable+0x34/0xb0()
  Modules linked in:
  [<80015bfc>] (unwind_backtrace+0x0/0xec) from [<804717f0>] (dump_stack+0x20/0x24)
  [<804717f0>] (dump_stack+0x20/0x24) from [<80023cd0>] (warn_slowpath_common+0x5c/0x7c)
  [<80023cd0>] (warn_slowpath_common+0x5c/0x7c) from [<80023d1c>] (warn_slowpath_null+0x2c/0x34)
  [<80023d1c>] (warn_slowpath_null+0x2c/0x34) from [<8035ddb0>] (__clk_enable+0x34/0xb0)
  [<8035ddb0>] (__clk_enable+0x34/0xb0) from [<8035de54>] (clk_enable+0x28/0x3c)
  [<8035de54>] (clk_enable+0x28/0x3c) from [<8031a160>] (s3c_rtc_probe+0xf4/0x434)
  [<8031a160>] (s3c_rtc_probe+0xf4/0x434) from [<8028e288>] (platform_drv_probe+0x24/0x28)
  [<8028e288>] (platform_drv_probe+0x24/0x28) from [<8028ce10>] (driver_probe_device+0xbc/0x22c)
  [<8028ce10>] (driver_probe_device+0xbc/0x22c) from [<8028cff8>] (__driver_attach+0x78/0x9c)
  [<8028cff8>] (__driver_attach+0x78/0x9c) from [<8028bdfc>] (bus_for_each_dev+0x64/0xac)
  [<8028bdfc>] (bus_for_each_dev+0x64/0xac) from [<8028c7e0>] (driver_attach+0x28/0x30)
  [<8028c7e0>] (driver_attach+0x28/0x30) from [<8028c43c>] (bus_add_driver+0xe0/0x234)
  [<8028c43c>] (bus_add_driver+0xe0/0x234) from [<8028d55c>] (driver_register+0xac/0x13c)
  [<8028d55c>] (driver_register+0xac/0x13c) from [<8028e4f4>] (platform_driver_register+0x54/0x68)
  [<8028e4f4>] (platform_driver_register+0x54/0x68) from [<8065c944>] (s3c_rtc_driver_init+0x14/0x1c)
  [<8065c944>] (s3c_rtc_driver_init+0x14/0x1c) from [<800086d8>] (do_one_initcall+0x60/0x138)
  [<800086d8>] (do_one_initcall+0x60/0x138) from [<80633a8c>] (kernel_init_freeable+0x108/0x1d0)
  [<80633a8c>] (kernel_init_freeable+0x108/0x1d0) from [<8046d2f8>] (kernel_init+0x1c/0xf4)
  [<8046d2f8>] (kernel_init+0x1c/0xf4) from [<8000e358>] (ret_from_fork+0x14/0x20)
  ---[ end trace 4bcdc801c868d73f ]---

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-26 17:59:03 -07:00
Olof Johansson
d21be237ff One MUSB regression fix that I forgot to send earlier. Without
this MUSB no longer works on omap4 based devices.
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Merge tag 'omap-for-v3.9-rc6/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

From Tony Lindgren:
One MUSB regression fix that I forgot to send earlier. Without
this MUSB no longer works on omap4 based devices.

* tag 'omap-for-v3.9-rc6/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP4: hwmod data: make 'ocp2scp_usb_phy_phy_48m" as the main clock

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-26 17:35:21 -07:00
Linus Walleij
ea7113f70d clocksource: nomadik-mtu: fix up clocksource/timer
The Nomadik clocksource driver has had a bad define making it
impossible to use it for sched_clock() for a while. Fix this
and also enable it for the Nomadik.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-26 17:10:46 -07:00
Linus Walleij
0259d9eb30 ARM: u300: fix ages old copy/paste bug
The UART1 is on the fast AHB bridge, not on the slow bus.

Cc: stable@vger.kernel.org
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-26 17:07:38 -07:00
Olof Johansson
340fcb5cb4 Merge branch 'samsung/exynos-multiplatform' into next/drivers
This merges in the revert of multiplatform support for exynos.

Trivial conflicts on removed code. Also, needed to add "select COMMON_CLK"
to the non-multiplatform EXYNOS config option.

* samsung/exynos-multiplatform:
  Revert "ARM: exynos: enable multiplatform support"

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-26 11:47:45 -07:00
Olof Johansson
772ba2ffd2 Merge branch 'samsung/exynos-multiplatform' into next/multiplatform
This just merges in the revert of multiplatform support. Not doing it by
cherry-pick since we need the same revert in the next/drivers branch.

* samsung/exynos-multiplatform:
  Revert "ARM: exynos: enable multiplatform support"

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-26 11:35:59 -07:00
Olof Johansson
4923ee444a Revert "ARM: exynos: enable multiplatform support"
This reverts commit bd51de53e1.

Turns out that multiplatform breaks some uses cases, such as when you
have an existing defconfig, since it adds the new EXYNOS_SINGLE config
option as a dependecy. As a result, nearly all exynos config options
will be disabled by default.

Reverting instead of rebasing since this branch is pulled in as a
dependency elsewhere.

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-26 11:35:51 -07:00
Daniel Lezcano
9fe3d35a32 ARM: s3c64xx: cpuidle: use init/exit common routine
Remove the duplicated code and use the cpuidle common code for initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-26 13:34:02 +02:00
Jon Medhurst
1783d45746 ARM: 7700/2: Make cpu_init() notrace
On resume from CPU power down any trace hooks enabled in cpu_init()
will get called before that function has done set_my_cpu_offset(),
so any use of per-cpu variables by trace hook code will cause bad
things to happen. Prevent this by marking the function notrace.

This fixes lockups/crashes seen when enabling function tracer on TC2
with the not yet mainlined cpuidle driver.

Signed-off-by: Jon Medhurst <tixy@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-26 11:09:32 +01:00
Tomi Valkeinen
9bf9d47a29 Merge branch '3.10/fb-mmap' into for-next
Merge topic branch to get vm_iomap_memory into use.

Conflicts:
	drivers/video/fbmon.c
2013-04-26 09:14:47 +03:00
Arnd Bergmann
c3c683ead3 USB: OMAP: ISP1301 needs USB_PHY
The Kconfig entry for USB_OMAP unconditionally selects USB_ISP1301,
which is now only visible when USB_PHY is also enabled.

This adds an appropriate dependency and enables USB_PHY in the omap1
defconfig, avoiding these build warnings:

warning: (USB_OHCI_HCD && USB_OMAP) selects ISP1301_OMAP which has unmet direct dependencies (USB_SUPPORT && USB_PHY && I2C && ARCH_OMAP_OTG)

Also fix a Makefile typo while we're at it.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-25 10:58:00 -07:00
Arnd Bergmann
64e98a7981 USB: lpc32xx: ISP1301 needs USB_PHY
The Kconfig entry for USB_LPC32XX unconditionally selects USB_ISP1301,
which is now only visible when USB_PHY is also enabled.

This adds an appropriate dependency and enables USB_PHY in the msm
defconfig, avoiding these build errors:

warning: (USB_LPC32XX) selects USB_ISP1301 which has unmet direct dependencies (USB_SUPPORT && USB_PHY && (USB || USB_GADGET) && I2C)
drivers/built-in.o: In function `usb_hcd_nxp_probe':
drivers/usb/host/ohci-nxp.c:224: undefined reference to `isp1301_get_client'
drivers/built-in.o: In function `lpc32xx_udc_probe':
drivers/usb/gadget/lpc32xx_udc.c:3071: undefined reference to `isp1301_get_client'

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Roland Stigge <stigge@antcom.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-25 10:58:00 -07:00
Stefano Stabellini
6abb749e83 xen/arm: use sched_op hypercalls for machine reboot and power off
Changes in v5:
- set pm_power_off and arm_pm_restart from the Xen specific
intialization code.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-04-25 16:46:10 +00:00
Stefano Stabellini
d37a6e1687 xenvm: add a simple PSCI node and a second cpu
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
CC: rob.herring@calxeda.com
CC: will.deacon@arm.com
CC: arnd@arndb.de
2013-04-25 16:46:09 +00:00
Stefano Stabellini
17b7ab80e3 xen/arm: XEN selects ARM_PSCI
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-04-25 16:46:08 +00:00
Stefano Stabellini
cc3d7f70c3 xen: move the xenvm machine to mach-virt
xenvm is based on mach-vexpress, move it to mach-virt.

Changes in v4:
- update the dts Makefile too.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
CC: Marc Zyngier <marc.zyngier@arm.com>
CC: will.deacon@arm.com
CC: arnd@arndb.de
CC: rob.herring@calxeda.com
2013-04-25 16:46:08 +00:00
Stefano Stabellini
9a9ab3cc00 xen/arm: SMP support
Map vcpu_info using VCPUOP_register_vcpu_info on all the online vcpus,
make sure the allocated struct doesn't cross a page boundary.

Call enable_percpu_irq on every cpu.

Changes in v5:
- allocate xen_vcpu_info dynamically, aligning it to the size of the
struct;
- use VCPUOP_register_vcpu_info on cpu0 too.

Changed in v2:
- move the percpu variable argument fix to a separate patch;
- remove unused variable.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-04-25 16:46:07 +00:00
Stefano Stabellini
ea0af61321 xen/arm: implement HYPERVISOR_vcpu_op
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Ian Campbell <ian.campbell@citrix.com>
2013-04-25 16:46:07 +00:00
Stefano Stabellini
2798ba7d19 xen/arm: actually pass a non-NULL percpu pointer to request_percpu_irq
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Ian Campbell <ian.camjpbell@citrix.com>
CC: stable@vger.kernel.org
2013-04-25 16:46:06 +00:00
Thomas Abraham
096ee6adcf ARM: dts: Add chip-id controller node on Exynos4/5 SoC
Add chip-id controller nodes for Exynos4 and Exynos5 SoCs.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-26 01:21:44 +09:00
Thomas Abraham
f5f83c71ff ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
On device tree enabled exynos platforms, retrieve the physical base address
of the chip-id controller from device tree and create a virtual I/O mapping
for the chip-id controller. This helps to remove the chip-id controller entry
from the statically defined I/O mapping tables.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-26 01:21:37 +09:00
Gleb Natapov
2dfee7b271 Merge branch 'kvm-arm-cleanup' from git://github.com/columbia/linux-kvm-arm.git 2013-04-25 18:23:48 +03:00
Catalin Marinas
6aaa189f87 ARM: 7702/1: Set the page table freeing ceiling to TASK_SIZE
ARM processors with LPAE enabled use 3 levels of page tables, with an
entry in the top level (pgd) covering 1GB of virtual space. Because of
the branch relocation limitations on ARM, the loadable modules are
mapped 16MB below PAGE_OFFSET, making the corresponding 1GB pgd shared
between kernel modules and user space.

If free_pgtables() is called with the default ceiling 0,
free_pgd_range() (and subsequently called functions) also frees the page
table shared between user space and kernel modules (which is normally
handled by the ARM-specific pgd_free() function). This patch changes
defines the ARM USER_PGTABLES_CEILING to TASK_SIZE when CONFIG_ARM_LPAE
is enabled.

Note that the pgd_free() function already checks the presence of the
shared pmd page allocated by pgd_alloc() and frees it, though with
ceiling 0 this wasn't necessary.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: <stable@vger.kernel.org> # 3.3+
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-25 13:15:38 +01:00
Catalin Marinas
3eb0be3042 ARM: 7703/1: Disable preemption in broadcast_tlb*_a15_erratum()
Commit 93dc688 (ARM: 7684/1: errata: Workaround for Cortex-A15 erratum
798181 (TLBI/DSB operations)) introduces calls to smp_processor_id() and
smp_call_function_many() with preemption enabled. This patch disables
preemption and also optimises the smp_processor_id() call in
broadcast_tlb_mm_a15_erratum(). The broadcast_tlb_a15_erratum() function
is changed to use smp_call_function() which disables preemption.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Geoff Levand <geoff@infradead.org>
Reported-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-25 13:15:15 +01:00
Russell King
a126f7c41d Merge branch 'mcpm' of git://git.linaro.org/people/nico/linux into devel-stable 2013-04-25 09:42:42 +01:00
Thomas Gleixner
6402c7dc2a Merge branch 'linus' into timers/core
Reason: Get upstream fixes before adding conflicting code.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-04-24 20:33:54 +02:00
Masanari Iida
b23f7a09f9 treewide: Fix typo in printk and comments
Fix typo in printk and comments within various drivers.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2013-04-24 16:43:00 +02:00
Nicolas Pitre
a7eb7c6f9a ARM: mcpm: provide an interface to set the SMP ops at run time
This is cleaner than exporting the mcpm_smp_ops structure.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Jon Medhurst <tixy@linaro.org>
2013-04-24 10:37:03 -04:00
Nicolas Pitre
9ff221bad8 ARM: mcpm: generic SMP secondary bringup and hotplug support
Now that the cluster power API is in place, we can use it for SMP secondary
bringup and CPU hotplug in a generic fashion.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:37:02 -04:00
Dave Martin
1ae98561b1 ARM: mcpm_head.S: vlock-based first man election
Instead of requiring the first man to be elected in advance (which
can be suboptimal in some situations), this patch uses a per-
cluster mutex to co-ordinate selection of the first man.

This should also make it more feasible to reuse this code path for
asynchronous cluster resume (as in CPUidle scenarios).

We must ensure that the vlock data doesn't share a cacheline with
anything else, or dirty cache eviction could corrupt it.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:37:01 -04:00
Dave Martin
9762f12d3e ARM: mcpm: Add baremetal voting mutexes
This patch adds a simple low-level voting mutex implementation
to be used to arbitrate during first man selection when no load/store
exclusive instructions are usable.

For want of a better name, these are called "vlocks".  (I was
tempted to call them ballot locks, but "block" is way too confusing
an abbreviation...)

There is no function to wait for the lock to be released, and no
vlock_lock() function since we don't need these at the moment.
These could straightforwardly be added if vlocks get used for other
purposes.

For architectural correctness even Strongly-Ordered memory accesses
require barriers in order to guarantee that multiple CPUs have a
coherent view of the ordering of memory accesses.  Whether or not
this matters depends on hardware implementation details of the
memory system.  Since the purpose of this code is to provide a clean,
generic locking mechanism with no platform-specific dependencies the
barriers should be present to avoid unpleasant surprises on future
platforms.

Note:

  * When taking the lock, we don't care about implicit background
    memory operations and other signalling which may be pending,
    because those are not part of the critical section anyway.

    A DMB is sufficient to ensure correctly observed ordering if
    the explicit memory accesses in vlock_trylock.

  * No barrier is required after checking the election result,
    because the result is determined by the store to
    VLOCK_OWNER_OFFSET and is already globally observed due to the
    barriers in voting_end.  This means that global agreement on
    the winner is guaranteed, even before the winner is known
    locally.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:37:01 -04:00
Dave Martin
7fe31d28e8 ARM: mcpm: introduce helpers for platform coherency exit/setup
This provides helper methods to coordinate between CPUs coming down
and CPUs going up, as well as documentation on the used algorithms,
so that cluster teardown and setup
operations are not done for a cluster simultaneously.

For use in the power_down() implementation:
  * __mcpm_cpu_going_down(unsigned int cluster, unsigned int cpu)
  * __mcpm_outbound_enter_critical(unsigned int cluster)
  * __mcpm_outbound_leave_critical(unsigned int cluster)
  * __mcpm_cpu_down(unsigned int cluster, unsigned int cpu)

The power_up_setup() helper should do platform-specific setup in
preparation for turning the CPU on, such as invalidating local caches
or entering coherency.  It must be assembler for now, since it must
run before the MMU can be switched on.  It is passed the affinity level
for which initialization should be performed.

Because the mcpm_sync_struct content is looked-up and modified
with the cache enabled or disabled depending on the code path, it is
crucial to always ensure proper cache maintenance to update main memory
right away.  The sync_cache_*() helpers are used to that end.

Also, in order to prevent a cached writer from interfering with an
adjacent non-cached writer, we ensure each state variable is located to
a separate cache line.

Thanks to Nicolas Pitre and Achin Gupta for the help with this
patch.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:37:00 -04:00
Nicolas Pitre
7c2b860534 ARM: mcpm: introduce the CPU/cluster power API
This is the basic API used to handle the powering up/down of individual
CPUs in a (multi-)cluster system.  The platform specific backend
implementation has the responsibility to also handle the cluster level
power as well when the first/last CPU in a cluster is brought up/down.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:36:59 -04:00
Nicolas Pitre
e8db288e05 ARM: multi-cluster PM: secondary kernel entry code
CPUs in cluster based systems, such as big.LITTLE, have special needs
when entering the kernel due to a hotplug event, or when resuming from
a deep sleep mode.

This is vectorized so multiple CPUs can enter the kernel in parallel
without serialization.

The mcpm prefix stands for "multi cluster power management", however
this is usable on single cluster systems as well.  Only the basic
structure is introduced here.  This will be extended with later patches.

In order not to complexify things more than they currently have to,
the planned work to make runtime adjusted MPIDR based indexing and
dynamic memory allocation for cluster states is postponed to a later
cycle. The MAX_NR_CLUSTERS and MAX_CPUS_PER_CLUSTER static definitions
should be sufficient for those systems expected to be available in the
near future.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24 10:36:59 -04:00
Nicolas Pitre
0c91e7e07e ARM: cacheflush: add synchronization helpers for mixed cache state accesses
Algorithms used by the MCPM layer rely on state variables which are
accessed while the cache is either active or inactive, depending
on the code path and the active state.

This patch introduces generic cache maintenance helpers to provide the
necessary cache synchronization for such state variables to always hit
main memory in an ordered way.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Dave Martin <dave.martin@linaro.org>
2013-04-24 10:36:09 -04:00
Wenyou Yang
a68b728f7a ARM: dts: add pinctrl property for spi node for atmel SoC
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-04-24 11:02:57 +01:00
Richard Genoud
b6811e9ab7 ARM: dts: add spi nodes for the atmel boards
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
[wenyou.yang@atmel.com: added spi nodes for the sam9263ek, sam9g20ek, sam9m10g45ek and sam9n12ek boards]
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-04-24 11:02:48 +01:00
Richard Genoud
d50f88a0c3 ARM: dts: add spi nodes for atmel SoC
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
[wenyou.yang@atmel.com: add spi nodes for sam9260, sam9263, sam9g45 and sam9n12]
[wenyou.yang@atmel.com: remove spi property "cs-gpios" to the board dts files]
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-04-24 11:02:44 +01:00
Richard Genoud
f0db66a5cd ARM: at91: add clocks for spi dt entries
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
[<wenyou.yang@atmel.com: declare the spi clocks for sam9260, at91sam9g45, and at91sam9n12]
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-04-24 11:02:30 +01:00
Arnd Bergmann
405f5e5ee5 ARM: OMAP: remove unused variable
Commit 0583fe478a "ARM: convert arm/arm64 arch timer to use CLKSRC_OF init"
has left the omap5_realtime_timer_init() function with a stale variable and
broken whitespace. This fixes both.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-23 23:25:33 +02:00
Arnd Bergmann
4b0ed6967e ARM: OMAP2+: add dependencies on ARCH_MULTI_V6/V7
CONFIG_ARCH_OMAP2PLUS depends on (ARCH_MULTI_V6 || ARCH_MULTI_V7) as of
a0694861 "ARM: OMAP2+: Enable ARCH_MULTIPLATFORM support", but the
individual OMAP2/3/4/5 and AM33XX platforms can all be selected independent
of what we are building for, which is a bug and prevents us from easily
building e.g. an ARMv7-only defconfig.

This makes ARCH_OMAP2 depend on ARCH_MULTI_V6 and the others depend on
ARCH_MULTI_V7, to ensure we really only build the platforms for the
CPUs we have enabled in the global multiplatform configuration step.

Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-23 21:09:30 +02:00
Mark Brown
5561f17f26 Merge remote-tracking branch 'asoc/topic/davinci' into asoc-next 2013-04-23 19:25:29 +01:00
Greg Kroah-Hartman
0b9b6df9ee usb: urgent fixes for v3.10 merge window
Here are some late urgent fixes for v3.10 merge window.
 
 All of these errors were introduced by recent commits
 which are in linux-next.
 
 f_obex, multi and cdc2 gadget drivers have learned to
 return a proper error code when something goes wrong.
 
 usb_bind_phy() was mistakenly placed into .init.text
 section which caused Section mismatch warnings and undefined
 reference compile errors.
 
 f_source_sink had a copy-paste error which is now corrected.
 
 g_zero got a memory leak plugged.
 
 Two defconfigs got fixed to enable the newly introduced
 CONFIG_USB_PHY.
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Merge tag 'usb-for-v3.10-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next

Felipe writes:

usb: urgent fixes for v3.10 merge window

Here are some late urgent fixes for v3.10 merge window.

All of these errors were introduced by recent commits
which are in linux-next.

f_obex, multi and cdc2 gadget drivers have learned to
return a proper error code when something goes wrong.

usb_bind_phy() was mistakenly placed into .init.text
section which caused Section mismatch warnings and undefined
reference compile errors.

f_source_sink had a copy-paste error which is now corrected.

g_zero got a memory leak plugged.

Two defconfigs got fixed to enable the newly introduced
CONFIG_USB_PHY.
2013-04-23 09:14:09 -07:00
Arnd Bergmann
721e0205b0 ARM: bcm: mark bcm_kona_smc_init as __init
The bcm_kona_smc_init function references the bcm_kona_smc_ids variable
that is marked __initconst, so the function itself has to be __init
to avoid this build error:

WARNING: arch/arm/mach-bcm/built-in.o(.text+0x12c): Section mismatch in reference from the function bcm_kona_smc_init() to the (unknown reference) .init.rodata:(unknown)

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Christian Daudt <csd@broadcom.com>
2013-04-23 17:43:32 +02:00
Daniel Lezcano
54a4644b7a ARM: imx: cpuidle: use init/exit common routine
The code intializes the cpuidle driver at different places.
The cpuidle driver for :
  * imx5 : is in the pm-imx5.c, the init function is in cpuidle.c
  * imx6 : is in cpuidle-imx6q.c, the init function is in cpuidle.c
           and cpuidle-imx6q.c

Instead of having the cpuidle code spread across different files,
let's create a driver for each SoC and use the common register function.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:23 +02:00
Daniel Lezcano
3aec034590 ARM: davinci: cpuidle: use init/exit common routine
Remove the duplicated code and use the cpuidle common code for initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:23 +02:00
Daniel Lezcano
f040c26ffa ARM: tegra: cpuidle: use init/exit common routine for tegra3
Remove the duplicated code and use the cpuidle common code for initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:23 +02:00
Daniel Lezcano
c5106c9dea ARM: tegra: cpuidle: use init/exit common routine for tegra2
Remove the duplicated code and use the cpuidle common code for initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:23 +02:00
Daniel Lezcano
0e9e8b4b91 ARM: OMAP4: cpuidle: use init/exit common routine
Remove the duplicated code and use the cpuidle common code for initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:22 +02:00
Daniel Lezcano
3cf4bc36f5 ARM: shmobile: cpuidle: use init/exit common routine
Remove the duplicated code and use the cpuidle common code for initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:22 +02:00
Daniel Lezcano
e158f9da69 ARM: tegra: cpuidle: use init/exit common routine
Remove the duplicated code and use the cpuidle common code for initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:22 +02:00
Daniel Lezcano
472a85f762 ARM: OMAP3: cpuidle: use init/exit common routine
Remove the duplicated code and use the cpuidle common code for initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:22 +02:00
Daniel Lezcano
22f5d1fa08 ARM: at91: cpuidle: use init/exit common routine
Remove the duplicated code and use the cpuidle common code for initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:22 +02:00
Daniel Lezcano
e8928e2e1e ARM: ux500: cpuidle: use init/exit common routine
Remove the duplicate code and use the cpuidle common code for initialization.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:22 +02:00
Daniel Lezcano
80b1c1999e ARM: ux500: cpuidle: replace for_each_online_cpu by for_each_possible_cpu
All the drivers are using, in their initialization function, the
for_each_possible_cpu macro.

Using for_each_online_cpu means the driver must handle the initialization
of the cpuidle device when a cpu is up which is not the case here.

Change the macro to for_each_possible_cpu as that fix the hotplug
initialization and make the initialization routine consistent with the
rest of the code in the different drivers.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:22 +02:00
Daniel Lezcano
554c06ba3e cpuidle: remove en_core_tk_irqen flag
The en_core_tk_irqen flag is set in all the cpuidle driver which
means it is not necessary to specify this flag.

Remove the flag and the code related to it.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kevin Hilman <khilman@linaro.org>  # for mach-omap2/*
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-23 13:45:22 +02:00
Shawn Guo
added5fce6 ARM: mxs_defconfig: add CONFIG_USB_PHY
Commit edc7cb2 (usb: phy: make it a menuconfig) makes USB_MXS_PHY
be a sub-item of menuconfig symbol USB_PHY.  This change gets the
selection of CONFIG_USB_MXS_PHY in mxs_defconfig lost.  Hence the
boot stops at the point below.

  [    1.600867] ci_hdrc ci_hdrc.0: doesn't support gadget
  [    1.606282] ci_hdrc ci_hdrc.0: EHCI Host Controller
  [    1.613522] ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1

Add CONFIG_USB_PHY to have the CONFIG_USB_MXS_PHY selection back to
work.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-04-23 14:18:54 +03:00
Shawn Guo
a52f31e95e ARM: imx_v6_v7_defconfig: add CONFIG_USB_PHY
Commit edc7cb2 (usb: phy: make it a menuconfig) makes USB_MXS_PHY
be a sub-item of menuconfig symbol USB_PHY.  This change gets the
selection of CONFIG_USB_MXS_PHY in imx_v6_v7_defconfig lost.  Hence the
boot stops at the point below.

  ci_hdrc ci_hdrc.0: doesn't support gadget
  ci_hdrc ci_hdrc.0: EHCI Host Controller
  ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1

Add CONFIG_USB_PHY to have the CONFIG_USB_MXS_PHY selection back to
work.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-04-23 14:18:09 +03:00
David S. Miller
6e0895c2ea Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts:
	drivers/net/ethernet/emulex/benet/be_main.c
	drivers/net/ethernet/intel/igb/igb_main.c
	drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
	include/net/scm.h
	net/batman-adv/routing.c
	net/ipv4/tcp_input.c

The e{uid,gid} --> {uid,gid} credentials fix conflicted with the
cleanup in net-next to now pass cred structs around.

The be2net driver had a bug fix in 'net' that overlapped with the VLAN
interface changes by Patrick McHardy in net-next.

An IGB conflict existed because in 'net' the build_skb() support was
reverted, and in 'net-next' there was a comment style fix within that
code.

Several batman-adv conflicts were resolved by making sure that all
calls to batadv_is_my_mac() are changed to have a new bat_priv first
argument.

Eric Dumazet's TS ECR fix in TCP in 'net' conflicted with the F-RTO
rewrite in 'net-next', mostly overlapping changes.

Thanks to Stephen Rothwell and Antonio Quartulli for help with several
of these merge resolutions.

Signed-off-by: David S. Miller <davem@davemloft.net>
2013-04-22 20:32:51 -04:00
Daniel Lezcano
3dcb9f1b17 ARM: OMAP3: remove cpuidle_wrap_enter
In a previous commit the en_core_tk_irqen flag has been added but we missed
the cpuidle_wrap_enter which was doing the job to measure the time for the
'omap3_enter_idle' function.

Actually, I don't see any reason to use this wrapper in the code. In the better
case, the time computation is not correctly done because of the different
operations done in omap3_enter_idle_bm which were not taken into account
before the en_core_tk_irqen flag was set.

As the time is reflected for the state overridden by the omap3_enter_idle_bm,
using the wrapper is pointless now, so removing it.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-22 01:05:16 +02:00
Daniel Lezcano
80d538b275 ARM: shmobile: cpuidle: remove shmobile_enter_wfi prototype
Commit 688036b538 removed the function
'shmobile_enter_wfi' but we forgot to remove the definition in the header file.

Note this function is just an alias to 'cpu_do_idle()' wrapped into a cpuidle
function callback prototype which already exists with the default WFI state
and the arm_simple_enter function.

Remove the function prototype.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-22 01:03:32 +02:00
Daniel Lezcano
38ef8d3fa4 ARM: shmobile: cpuidle: remove shmobile_enter_wfi function
Remove the shmobile_enter_wfi function which is the same as the
common WFI enter function from the arm cpuidle driver defined
with the ARM_CPUIDLE_WFI_STATE macro.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-04-22 01:02:03 +02:00
Linus Torvalds
8c3a13c84b Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King:
 "A set of fixes from various people - Will Deacon gets a prize for
  removing code this time around.  The biggest fix in this lot is
  sorting out the ARM740T mess.  The rest are relatively small fixes."

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7699/1: sched_clock: Add more notrace to prevent recursion
  ARM: 7698/1: perf: fix group validation when using enable_on_exec
  ARM: 7697/1: hw_breakpoint: do not use __cpuinitdata for dbg_cpu_pm_nb
  ARM: 7696/1: Fix kexec by setting outer_cache.inv_all for Feroceon
  ARM: 7694/1: ARM, TCM: initialize TCM in paging_init(), instead of setup_arch()
  ARM: 7692/1: iop3xx: move IOP3XX_PERIPHERAL_VIRT_BASE
  ARM: modules: don't export cpu_set_pte_ext when !MMU
  ARM: mm: remove broken condition check for v4 flushing
  ARM: mm: fix numerous hideous errors in proc-arm740.S
  ARM: cache: remove ARMv3 support code
  ARM: tlbflush: remove ARMv3 support
2013-04-20 18:38:06 -07:00
Arnd Bergmann
2254c36dde Merge branch 'samsung/exynos-multiplatform-drivers' into late/multiplatform
This series contains the final pieces for Exynos multiplatform support:
Most of the patches are about the exynos-combiner irqchip, which is
converted to not rely on platform provided constants.

* samsung/exynos-multiplatform-drivers:
  ARM: exynos: restore mach/regs-clock.h for exynos5
  irqchip: exynos: look up irq using irq_find_mapping
  irqchip: exynos: pass irq_base from platform
  irqchip: exynos: localize irq lookup for ATAGS
  irqchip: exynos: allocate combiner_data dynamically
  irqchip: exynos: pass max combiner number to combiner_init
  ARM: exynos: add missing properties for combiner IRQs
  clocksource: exynos_mct: remove platform header dependency
  clk: exynos: prepare for multiplatform

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-20 00:35:17 +02:00
Stephen Boyd
cea15092f0 ARM: 7699/1: sched_clock: Add more notrace to prevent recursion
cyc_to_sched_clock() is called by sched_clock() and cyc_to_ns()
is called by cyc_to_sched_clock(). I suspect that some compilers
inline both of these functions into sched_clock() and so we've
been getting away without having a notrace marking. It seems that
my compiler isn't inlining cyc_to_sched_clock() though, so I'm
hitting a recursion bug when I enable the function graph tracer,
causing my system to crash. Marking these functions notrace fixes
it. Technically cyc_to_ns() doesn't need the notrace because it's
already marked inline, but let's just add it so that if we ever
remove inline from that function it doesn't blow up.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-19 22:23:55 +01:00
Arnd Bergmann
22cf644e03 Merge branch 'next/drivers' into late/multiplatform
Multiple parts of next/drivers are prerequisites for the final
exynos multiplatform changes, so let's pull in the entire branch.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 23:12:42 +02:00
Arnd Bergmann
db60074b46 ARM: exynos: restore mach/regs-clock.h for exynos5
Commit 6e6aac75 "ARM: EXYNOS: Migrate clock support to common
clock framework" from Thomas Abraham removed the Exynos5 specific
register definitions as they were unused at the time, but the
cpufreq driver actually still uses them.

Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 23:11:28 +02:00
Arnd Bergmann
863a08dc8b irqchip: exynos: pass irq_base from platform
The platform code knows the IRQ base, while the irqchip driver
should really not. This is a littly hacky because we still
hardwire the IRQ base to 160 for the combiner in the DT case,
when we should really use -1. Removing that line will cause
a linear IRQ domain to be use, as we should.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
2013-04-19 23:00:43 +02:00
Arnd Bergmann
6761dcfe8c irqchip: exynos: pass max combiner number to combiner_init
We can find out the number of combined IRQs from the device
tree, but in case of ATAGS boot, the driver currently uses
hardcoded values based on the SoC type. We can't do that
in general for a multiplatform kernel, so let's instead pass
this information from platform code directly in case of
ATAGS boot.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
2013-04-19 23:00:40 +02:00
Arnd Bergmann
30269ddff1 ARM: exynos: add missing properties for combiner IRQs
The exynos combiner irqchip needs to find the parent interrupts
and needs to know their number, so add the missing properties
for exynos4 as they were already present for exynos5.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 23:00:39 +02:00
Arnd Bergmann
034c097ca2 clocksource: exynos_mct: remove platform header dependency
For the non-DT case, the mct_init() function requires access
to a couple of platform specific constants, but cannot include
the header files in case we are building for multiplatform.

This changes the interface to the platform so we pass all
the necessary data as arguments to mct_init.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: John Stultz <john.stultz@linaro.org>
2013-04-19 23:00:38 +02:00
Arnd Bergmann
25e56eba0a clk: exynos: prepare for multiplatform
The new common clock drivers for exynos are using compile
time constants and soc_is_exynos* macros to provide backwards
compatibility for pre-DT systems, which is not possible with
multiplatform kernels. This moves all the necessary
information back into platform code and removes the mach/*
header inclusions.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Mike Turquette <mturquette@linaro.org>
2013-04-19 23:00:38 +02:00
Arnd Bergmann
f54ae513d3 Merge branch 'spear/dwdma' into late/cleanup
This is a series originally prepared for inclusion in 3.9, which did
not work out because of dependencies on the dmaengine driver. All the
changes for the dmaengine code are merged in 3.9 now, so we can finally
do the switchover and remove the now unnecessary dma definitions for
spear13xx from the platform code.

The dma platform_data actually made up the majority of the spear13xx
platform code overall, so moving that into device tree files makes the
code substantially smaller.

* spear/dwdma:
  ata: arasan: remove the need for platform_data
  ARM: SPEAr13xx: Pass generic DW DMAC platform data from DT
  serial: pl011: use generic DMA slave configuration if possible
  spi: pl022: use generic DMA slave configuration if possible

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 22:50:52 +02:00
Arnd Bergmann
1b361942b5 Merge branch 'spear/multiplatform' into late/cleanup
This is a prerequisite for the spear/dwdma series.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 22:50:01 +02:00
Olof Johansson
61b464aef0 Little modification in SoC presentation in kernel log.
Removing of a long-standing warning in sam9263 PM code.
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Merge tag 'at91-soc' of git://github.com/at91linux/linux-at91 into late/cleanup

From Nicolas Ferre:
Little modification in SoC presentation in kernel log.
Removing of a long-standing warning in sam9263 PM code.

* tag 'at91-soc' of git://github.com/at91linux/linux-at91:
  ARM: at91: suspend both memory controllers on at91sam9263
  ARM: at91: change "Unknown" qualifier SoC subtype handling

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-19 11:51:24 -07:00
Olof Johansson
a71efd61db Merge branch 'at91/soc' into late/cleanup
* at91/soc:
  ARM: at91: add defconfig for SAMA5
  ARM: at91: dt: add device tree files for SAMA5D3 family
  ARM: at91: introduce SAMA5 support
  ARM: at91: introduce the core type choice to split ARMv4/5 and ARMv7 arch
  ARM: at91: add AT91_SAM9_TIME entry to select at91sam926x_time.c compilation
  ARM: at91: change name template in AT91_SOC_START macro
  ARM: at91: renamme rm9200 dt file
  ARM: at91: rename board-dt to more specific name board-dt-sam9
  ARM: at91: move non DT Kconfig to Kconfig.non_dt
2013-04-19 11:50:25 -07:00
Olof Johansson
cd4cb1a7df Display related clean-up from Tomi Valkeinen.
These were separated from the DSS driver changes to leave out
 a dependency between the driver and arch/arm related code.
 
 As agreed on the mailing lists, these are based on Tomi's
 platform_data header branch at:
 
 git://gitorious.org/linux-omap-dss2/linux.git 3.10/0-dss-headers
 
 Note that these patches have already been in Linux next via
 Tomi's tree. As Tomi's driver changes are getting merged via
 the drm tree because of another dependency, these should get
 merged via the ARM SoC tree.
 
 Apologies for the late pull request on this one, this dependency
 should have been cleared away earlier.
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Merge tag 'omap-for-v3.10/dss-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/cleanup

From Tony Lindgren:
Display related clean-up from Tomi Valkeinen.

These were separated from the DSS driver changes to leave out
a dependency between the driver and arch/arm related code.

* tag 'omap-for-v3.10/dss-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  arm: dss-common: don't use reset_gpio from omap4_panda_dvi_device
  arm: omap boards: Remove unnecessary platform_enable/disable callbacks for VENC devices
  arm: omap: dss-common: use picodlp panel's gpio handling
  arm: omap: board-omap3pandora: use tpo panel's gpio handling
  arm: omap: board-zoom: use NEC panel's gpio handling
  arm: omap: board-rx-51: use acx565akm panel's gpio handling
  arm: omap: board-sdp3430: use sharp panel's gpio handling
  arm: omap: board-omap3evm: use sharp panel's gpio handling
  arm: omap: board-overo: use lb035q02 dpi panel's gpio handling
  arm: omap: board-ldp: use generic dpi panel's gpio handling
  arm: omap: board-am3517: use generic dpi panel's gpio handling
  arm: omap: board-cm-t35: use generic dpi panel's gpio handling
  arm: omap: board-devkit8000: use generic dpi panel's gpio handling
  arm: omap: board-2430: use generic dpi panel's gpio handling
  ARM: OMAP: zoom: Use pwm stack for lcd and keyboard backlight
  OMAPDSS: add fields to panels' platform data
  OMAPDSS: panels: keep platform data of all panels in a single header

Conflicts:
	arch/arm/mach-omap2/board-2430sdp.c
	arch/arm/mach-omap2/board-zoom-display.c
2013-04-19 11:40:52 -07:00
Linus Torvalds
f068f5e158 ARM: arm-soc fixes for 3.9
Only one remaining fix for arm-soc platforms at this time, a small
 bugfix for cpu hotplug on highbank platforms that has become much
 easier to hit as of late. Details in the patch description, but it's
 small and well-contained and definitely impacts users of the platform,
 so 3.9 seems appropriate.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "Only one remaining fix for arm-soc platforms at this time, a small
  bugfix for cpu hotplug on highbank platforms that has become much
  easier to hit as of late.

  Details in the patch description, but it's small and well-contained
  and definitely impacts users of the platform, so 3.9 seems
  appropriate."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: highbank: fix cache flush ordering for cpu hotplug
2013-04-19 11:38:36 -07:00
Olof Johansson
ff57270de9 Merge branch 'omap/boards' into late/cleanup
* omap/boards:
  ARM: OMAP: board-4430sdp: Provide regulator to pwm-backlight
  ARM: OMAP: zoom: Use pwm stack for lcd and keyboard backlight
  ARM: OMAP2+: omap2plus_defconfig: Add support for BMP085 pressure sensor
  omap2+: Remove useless Makefile line
  omap2+: Remove useless Makefile line
  ARM: OMAP: RX-51: add missing regulator supply definitions for lis3lv02d
  ARM: OMAP1: fix omap_udc registration
2013-04-19 11:37:28 -07:00
Olof Johansson
17ada81e4e Merge branch 'omap/fixes-non-critical' into late/cleanup
* omap/fixes-non-critical:
  ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
  ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
  ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
  ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
  ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
  ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
  ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry
  ARM: OMAP: fix typo "CONFIG_SMC91x_MODULE"
  ARM: OMAP5: clock: No Freqsel on OMAP5 devices too
  ARM: OMAP5: Make errata i688 workaround available
  ARM: OMAP5: Update SAR memory layout for WakeupGen
  ARM: OMAP5: Update SAR RAM base address
  ARM: OMAP5: Reuse prm read_inst/write_inst
  ARM: OMAP5: prm: Allow prm init to succeed
  ARM: OMAP5: timer: Update the clocksource name as per clock data
  ARM: OMAP5: Update SOC id detection code for ES2
2013-04-19 11:37:21 -07:00
Paul Bolle
f19814721e ARM: SPEAr13xx: Fix typo "ARCH_HAVE_CPUFREQ"
Do what commit f12a500e4a
("ARM: SPEAr13xx: Enable CONFIG_ARCH_HAS_CPUFREQ") wanted to do.

[arnd: fix botched merge from changing the Kconfig file]

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 17:30:49 +02:00
Arnd Bergmann
dc9c220304 Merge branch 'next/spring-cleaning' into next/cleanup 2013-04-19 17:18:46 +02:00
Arnd Bergmann
0dc488e778 Merge branch 'samsung/exynos-multiplatform' into next/drivers
Merging this into the next/drivers branch avoids a number of
pointless conflicts with code changed here.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 16:50:56 +02:00
Arnd Bergmann
56b690481c Merge branch 'samsung/exynos-multiplatform' into next/multiplatform
These patches get us closer to adding multiplatform support on
the Exynos platform, they are part of a longer series of
patches.  This would get all the simple stuff out of the
way, and I don't think there is a big risk of introducing
regressions with these.

A lot of the other patches have already been merged into
subsystem trees. After this series in in arm-soc, what is
left comes down to

* The ASoC conversion to dmaengine won't make it unless someone
  who knows that code better steps up to do it right away. This
  means that we won't have audio in a 3.10 multiplatform kernel
  on Exynos, but it will still work for users that don't enable
  multiplatform.

* The irqchip (combiner), clk and clksource patches are all based
  on top   of other changesets we pulled in from your trees, so I
  would not make them part of the next/multiplatform branch. We can
  apply them on top of the next/drivers branch once they are
  tested successfully.

* A trivial patch is needed in the end to actually make
  CONFIG_ARCH_EXYNOS visible in multiplatform configurations.
  We will do that as a separate patch once everything else is
  there.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 14:33:09 +02:00
Arnd Bergmann
bd51de53e1 ARM: exynos: enable multiplatform support
This makes it possible to enable the exynos platform as part of a
multiplatform kernel, in addition to keeping the single-platform
exynos support.

The multiplatform variant has a number of limitations at the moment:

* It only supports DT-enabled machines. This is not a problem in
  the long run, as non-DT machines for exynos are going away.
  The main problem here is that the gpio code and the exynos_eint
  irqchip are not multiplatform capable but still required for
  ATAGS based boot.
* The watchdog driver is still missing a conversion.
* sparsemem and memory_holes are currently not supported in
  multiplatform.

The the multiplatform aware ARCH_EXYNOS Kconfig symbol is disabled
for now, as dependent patches are still pending in other
subsystem trees. We will enable it once everything comes together.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 13:51:26 +02:00
Arnd Bergmann
b9d7c5d3f4 rtc: s3c: make header file local
Nothing outside of the rtc driver includes plat/regs-rtc.h,
so we can simply move the file into the same directory,
which allows us to build the file as platform-independent
code.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: rtc-linux@googlegroups.com
Cc: Alessandro Zummo <a.zummo@towertech.it>
2013-04-19 13:51:25 +02:00
Arnd Bergmann
93115b7fa8 mtd: onenand/samsung: make regs-onenand.h file local
Nothing uses the NAND register definitions other than the
actual driver, so we can move the header file into the
same local directory, which lets us build it in a multiplatform
configuration.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: linux-mtd@lists.infradead.org
Cc: David Woodhouse <dwmw2@infradead.org>
2013-04-19 13:51:24 +02:00
Arnd Bergmann
cc014f3e29 mmc: sdhci-s3c: remove platform dependencies
plat/regs-sdhci.h is not used anywhere but in the sdhci-s3c
driver, so it can become a local file there and all other
inclusions removed.

plat/sdhci.h is used only to define the platform devices,
and with the exception of the platform_data structure not
needed by the driver, so we can split out the platform_data
definition instead and leave the rest to platform code.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Chris Ball <cjb@laptop.org>
2013-04-19 13:51:23 +02:00
Arnd Bergmann
f76da510d6 ARM: samsung: move mfc device definition to s5p-dev-mfc.c
For a DT-only build we don't want to compile devs.c, but we do need
the mfc device, which is also referenced by the DT based platforms,
so move it all into one place.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 13:51:22 +02:00
Arnd Bergmann
a2e4071047 ARM: exynos: move debug-macro.S to include/debug/
The move is necessary to support early debug output on exynos
with multiplatform configurations. This implies also moving the
plat/debug-macro.S file, but we are leaving the remaining users of that
file in place, to avoid adding large numbers of extra configuration
options to Kconfig.debug

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 13:51:21 +02:00
Arnd Bergmann
7ba8022fc3 ARM: exynos: prepare for sparse IRQ
When we enable CONFIG_SPARSE_IRQ, we have to set the value of NR_IRQS in
the machine_desc for legacy IRQ domains, and any file referring to the
number of interrupts or a specific number must include the mach/irqs.h
header file explicitly.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 13:51:20 +02:00
Arnd Bergmann
b4cf27f773 ARM: exynos: introduce EXYNOS_ATAGS symbol
As a preparation for multiplatform support, this introduces
a new Kconfig symbol to split the ATAGS based EXYNOS platforms
from the DT based ones. Turning off CONFIG_EXYNOS_ATAGS disables
all platforms that are not yet converted to DT, and we can
have code that relies on DT checking for this symbol being
disabled.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-19 13:51:19 +02:00
Nicolas Ferre
a6268b8648 ARM: at91/sama5d34ek.dts: remove not needed compatibility string
"atmel,sama5ek" compatibility sting does not correspond to a
useful board configuration. This d34ek.dts is the only sama5d3
.dts file affected.

Reported-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-04-19 11:38:05 +02:00
Ludovic Desroches
05c1bc97c1 ARM: at91: dts: add MCI DMA support
Add DMA resources to MCI nodes.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
[nicolas.ferre@atmel.com: correct 9g45, 9n12 dma phandle name]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-04-19 10:42:08 +02:00
Ludovic Desroches
d9a63a4518 ARM: at91: dts: add i2c dma support
Add DMA resources to i2c nodes.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
[nicolas.ferre@atmel.com: correct 9n12 dma phandle name]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-04-19 10:40:23 +02:00
Russell King
bca7a5a049 ARM: cpu hotplug: remove majority of cache flushing from platforms
Remove the majority of cache flushing calls from the individual platform
files.  This is now handled by the core code.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-18 20:08:04 +01:00
Russell King
51acdfd1fa ARM: smp: flush L1 cache in cpu_die()
Flush the L1 cache for the CPU which is going down in cpu_die() so
that we don't end up with all platforms doing this.  This ensures
that any cache lines we own are pushed out before the cache becomes
inaccessible.

We may end up subsequently creating some dirty cache lines - for
example, with the complete() call, but this update must become
visible to other CPUs before __cpu_die() can proceed.  Subsequent
accesses from the platforms cpu_die() function should _not_ matter.

Also place a mb() after the complete() call to ensure that this is
visible to other CPUs.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-18 20:08:04 +01:00
Pawel Moll
6e973d2c43 clk: vexpress: Add separate SP810 driver
Factor out the SP810 clocking code into a separate driver,
selecting better (faster) parent at clk_prepare() time.
This is to avoid problems with clocking infrastructure
initialisation order, in particular to avoid dependency
of fixed clock being initialized before SP810. It also
makes vexpress platform OF-based clock initialisation code
unnecessary.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: add .unprepare, FIXME comment, cleaned up code]
2013-04-18 11:41:10 -07:00
Russell King
da2265b130 ARM: tegra: remove tegra specific cpu_disable()
The tegra cpu_disable() function is the same as the generic version
in arch/arm/kernel/smp.c.  Therefore, it can be removed.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-18 18:04:09 +01:00
Rob Herring
73053d973d ARM: highbank: fix cache flush ordering for cpu hotplug
The L1 data cache flush needs to be after highbank_set_cpu_jump call which
pollutes the cache with the l2x0_lock. This causes other cores to deadlock
waiting for the l2x0_lock. Moving the flush of the entire data cache after
highbank_set_cpu_jump fixes the problem. Use flush_cache_louis instead of
flush_cache_all are that is sufficient to flush only the L1 data cache.
flush_cache_louis did not exist when highbank_cpu_die was originally
written.

With PL310 errata 769419 enabled, a wmb is inserted into idle which takes
the l2x0_lock. This makes the problem much more easily hit and causes
reset to hang.

Reported-by: Paolo Pisati <p.pisati@gmail.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-18 09:37:46 -07:00
Stephen Warren
c312908a10 ARM: tegra: solve adr range issue with THUMB2_KERNEL enabled
When building the kernel with CONFIG_THUMB2_KERNEL enabled, older
assemblers may emit the following error:

reset-handler.S:78: Error: invalid immediate for address calculation (value = 0x00000004)

Using an explicit adr.w instruction will solve this. Newer assemblers do
this automatically. Use the W() macro to do this under Thumb mode only.

Inspired-by: Joseph Lo <josephl@nvidia.com>
Suggested-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-18 09:35:19 -07:00
Joseph Lo
128673b364 ARM: tegra: pm: fix build error w/o PM_SLEEP
This fixes the building error when the PM_SLEEP is disabled. The fucntional
defintion of "tegra_pm_validate_suspend_mode" without "static inline"
would become a multiple definition error.

Reported-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-18 09:34:13 -07:00
Joseph Lo
a65dc10ffa ARM: tegra: fix relocation truncated error when THUMB2_KERNEL enabled
The conditional branch instruction in Thumb2 only available to short range.
The linker will fail when the conditional branch over the range. Then
resulting in link error when generating kernel image. e.g.:

arch/arm/mach-tegra/reset-handler.S:47:(.text+0xf8e):
relocation truncated to fit: R_ARM_THM_JUMP19 against symbol
`cpu_resume' defined in .data section in arch/arm/kernel/built-in.o

This patch using a Thumb2 instruction IT (if-then) to have a longer branch
range.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-18 09:30:40 -07:00
Joseph Lo
5777b4b577 ARM: tegra: fix build error when THUMB2_KERNEL enabled
This patch fix the build failure when CONFIG_THUBM2_KERNEL enabled. You
clould see the error message below:

arch/arm/mach-tegra/sleep-tegra30.S:69: Error: shift must be constant --
`orr r12,r12,r4,lsl r3'

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-18 09:30:32 -07:00
Olof Johansson
88cf9c5e49 Fourth round of dt additions for 3.10
There's only one late patch that merge together two clocks that were
 already defined in a previous patch.
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Merge tag 'sunxi-dt-for-3.10-4' of git://github.com/mripard/linux into next/dt

From Maxime Ripard:
Fourth round of dt additions for 3.10

There's only one late patch that merge together two clocks that were
already defined in a previous patch.

* tag 'sunxi-dt-for-3.10-4' of git://github.com/mripard/linux:
  ARM: sunxi: unify osc24M_fixed and osc24M

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-18 09:27:46 -07:00
Olof Johansson
da0851fe3a The imx device tree changes for 3.10:
* The huge diff stat is introduced by the pinctrl changes.  With DTC
   macro support ready, we're moving those huge mount of data about pins
   out of pinctrl driver.
 * Device tree source updates for GPI, LDB, SRC, cpufreq-cpu0.
 * Initial imx6dl device tree support
 * Board level DTS changes for some imx27 and imx51 platforms.
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Merge tag 'imx-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt

From Shawn Guo:
The imx device tree changes for 3.10:

* The huge diff stat is introduced by the pinctrl changes.  With DTC
  macro support ready, we're moving those huge mount of data about pins
  out of pinctrl driver.
* Device tree source updates for GPI, LDB, SRC, cpufreq-cpu0.
* Initial imx6dl device tree support
* Board level DTS changes for some imx27 and imx51 platforms.

* tag 'imx-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (605 commits)
  ARM: dts: imx6dl-wandboard: Add USB Host support
  ARM: dts: imx51 cpu node
  ARM: dts: Add missing imx27-phytec-phycore dtb target
  ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module
  ARM: i.MX51: Add PATA support
  ARM: dts: Add initial support for Wandboard Dual-Lite
  ARM: dts: imx: add initial imx6dl-sabreauto support
  ARM: dts: imx: add initial imx6dl-sabresd support
  ARM: dts: imx: make sabreauto and sabresd common
  pinctrl: add pinctrl driver for imx6sl
  pinctrl: add pinctrl driver for imx6dl
  ARM: dts: imx53: fix SD2_DATA1 pad AUDMUX_AUD4 configuration
  ARM: dts: MicroSys sbc6x support (i.MX6)
  ARM i.MX5: Add System Reset Controller (SRC) support for i.MX51 and i.MX53
  ARM i.MX5: Add system reset controller (SRC) to i.MX51 and i.MX53 device tree
  ARM i.MX6q: Link system reset controller (SRC) to IPU in DT
  ARM i.MX6q: Add LDB device to device tree
  ARM: imx5 DT init cpufreq-cpu0 device
  ARM: imx27 DT init cpufreq-cpu0 device
  ARM i.MX53: Add LDB device to device tree
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-18 09:21:20 -07:00
Ludovic Desroches
980ce7d94e ARM: at91: dts: set #dma-cells to the correct value
Moving to generic DMA DT binding involves to set #dma-cells to 2.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-04-18 17:06:10 +02:00
Arnd Bergmann
f5fa4098c3 ARM: at91: suspend both memory controllers on at91sam9263
For the past three years, we have had a #warning in
mach-at91 about the sdram_selfrefresh_enable or
at91sam9_standby functions possibly not working on
at91sam9263. In the meantime a function was added
to do the right thing on at91sam9g45, which looks like
it should also work on '9263.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[nicolas.ferre@atmel.com: remove paragraph in commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-04-18 16:31:02 +02:00
Olof Johansson
1556f4b4d0 v3.10 board updates for DaVinci
This set of patches enables remoteproc support
 on DA850 EVM and fixes some sparse warnings for
 the same board.
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Merge tag 'davinci-for-v3.10/board-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/boards

From Sekhar Nori:
v3.10 board updates for DaVinci

This set of patches enables remoteproc support
on DA850 EVM and fixes some sparse warnings for
the same board.

* tag 'davinci-for-v3.10/board-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: da850 evm: fix const qualifier placement
  ARM: davinci: da850 board: add remoteproc support
  ARM: davinci: ensure global variables are declared
  ARM: davinci: sram.c: fix incorrect type in assignment
  ARM: davinci: da8xx dt: make file local symbols static
  ARM: davinci: da8xx: add remoteproc support
  ARM: davinci: remove test for undefined Kconfig macro
  ARM: davinci: mmc: derive version information from device name
  ARM: davinci: da850: add ECAP & EHRPWM clock nodes
  ARM: davinci: clk framework support for enable/disable functionality
2013-04-17 23:54:41 -07:00
Olof Johansson
a100caaf12 v3.10 SoC updates for DaVinci
This set of patches add support for remoteproc
 used to control the DSP and also fix sparse
 errors existing for quite some time.
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Merge tag 'davinci-for-v3.10/soc-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc

From Sekhar Nori:
v3.10 SoC updates for DaVinci

This set of patches add support for remoteproc
used to control the DSP and also fix sparse
errors existing for quite some time.

* tag 'davinci-for-v3.10/soc-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: ensure global variables are declared
  ARM: davinci: sram.c: fix incorrect type in assignment
  ARM: davinci: da8xx dt: make file local symbols static
  ARM: davinci: da8xx: add remoteproc support

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-17 23:53:20 -07:00
Olof Johansson
c8bf98a28f v3.10 DT updates for DaVinci
This set of patches adds support for PWMs and SPI
 controller present on DA850 and for SPI flash present on
 DA850 EVM.
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Merge tag 'davinci-for-v3.10/dt-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt2

From Sekhar Nori:
v3.10 DT updates for DaVinci

This set of patches adds support for PWMs and SPI
controller present on DA850 and for SPI flash present on
DA850 EVM.

* tag 'davinci-for-v3.10/dt-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: da850-evm: add SPI flash support
  ARM: davinci: da850: override SPI DT node device name
  ARM: davinci: da850: add SPI1 DT node
  spi/davinci: add DT binding documentation
  spi/davinci: no wildcards in DT compatible property
  ARM: davinci: da850: add EHRPWM & ECAP DT node
  ARM: davinci: da850: override mmc DT node device name
  ARM: davinci: da850: add mmc DT entries
  mmc: davinci_mmc: add DT support
  ARM: davinci: da850: add tps6507x regulator DT data
  ARM: regulator: add tps6507x device tree data
  ARM: davinci: remove test for undefined Kconfig macro
  ARM: davinci: mmc: derive version information from device name
  ARM: davinci: da850: add ECAP & EHRPWM clock nodes
  ARM: davinci: clk framework support for enable/disable functionality

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-17 23:51:31 -07:00
Olof Johansson
db39ad7d41 mvebu dt for v3.10 round 4
- mvebu LPAE 64bit dts file changes
 
 Depends:
  - mvebu/fixes (tags/mvebu_fixes_for_v3.9_round3)
  - mvebu/soc (tags/soc_for_v3.10)
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Merge tag 'dt-3.10-4' of git://git.infradead.org/users/jcooper/linux into next/dt2

From Jason Cooper:
mvebu dt for v3.10 round 4

 - mvebu LPAE 64bit dts file changes

* tag 'dt-3.10-4' of git://git.infradead.org/users/jcooper/linux: (52 commits)
  ARM: dts: mvebu: Convert mvebu device tree files to 64 bits
  ARM: dts: mvebu: introduce internal-regs node
  ARM: dts: mvebu: Convert all the mvebu files to use the range property
  ARM: dts: mvebu: move all peripherals inside soc
  ARM: dts: mvebu: fix cpus section indentation
  arm: mvebu: PCIe Device Tree informations for Armada XP GP
  arm: mvebu: PCIe Device Tree informations for Armada 370 DB
  arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox
  arm: mvebu: PCIe Device Tree informations for Armada XP DB
  arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4
  arm: mvebu: add PCIe Device Tree informations for Armada XP
  arm: mvebu: add PCIe Device Tree informations for Armada 370
  ARM: mvebu: Align the internal registers virtual base to support LPAE
  ARM: mvebu: Limit the DMA zone when LPAE is selected
  arm: plat-orion: remove addr-map code
  arm: mach-mv78xx0: convert to use the mvebu-mbus driver
  arm: mach-orion5x: convert to use mvebu-mbus driver
  arm: mach-dove: convert to use mvebu-mbus driver
  arm: mach-kirkwood: convert to use mvebu-mbus driver
  arm: mach-mvebu: convert to use mvebu-mbus driver
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-17 23:27:52 -07:00
Olof Johansson
7fa7ed8e1c mvebu dt for v3.10 round 3
- mvebu PCIe DT support
 
 from round 2 (no pr was sent):
  - 64bit dts skeleton
  - mvebu devicebus additions
  - mvebu thermal nodes
  - mirabox gpio leds
  - orion5x xor and ehci
  - use mvsdio on guruplug dt
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Merge tag 'dt-3.10-3' of git://git.infradead.org/users/jcooper/linux into next/dt

From Jason Cooper:
mvebu dt for v3.10 round 3

 - mvebu PCIe DT support

from round 2 (no pr was sent):
 - 64bit dts skeleton
 - mvebu devicebus additions
 - mvebu thermal nodes
 - mirabox gpio leds
 - orion5x xor and ehci
 - use mvsdio on guruplug dt

* tag 'dt-3.10-3' of git://git.infradead.org/users/jcooper/linux:
  arm: mvebu: PCIe Device Tree informations for Armada XP GP
  arm: mvebu: PCIe Device Tree informations for Armada 370 DB
  arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox
  arm: mvebu: PCIe Device Tree informations for Armada XP DB
  arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4
  arm: mvebu: add PCIe Device Tree informations for Armada XP
  arm: mvebu: add PCIe Device Tree informations for Armada 370
  ARM: dts: Add a 64 bits version of the skeleton device tree
  ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig
  ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board
  ARM: mvebu: Add support for NOR flash device on Armada XP-GP board
  ARM: mvebu: Add Device Bus support for Armada 370/XP SoC
  ARM: configs: Update mvebu defconfig for thermal
  ARM: mvebu: Add thermal support to Armada 370 device tree
  ARM: mvebu: Add thermal support to Armada XP device tree
  arm: mvebu: Add GPIO LEDs to Mirabox board
  arm: orion5x: enable xor for orion5x platform
  arm: orion5x: add ehci bindings to dtsi
  ARM: kirkwood: make use of DT mvsdio on guruplug board
  ARM: mvebu: Add button on Armada 370 Reference Design board
2013-04-17 23:24:18 -07:00
Olof Johansson
392f919564 mvebu boards for v3.10
- kirkwood
     - Netgear ReadyNAS Duo v2
     - add guruplug dt to defconfig
     - Lacie Cloudbox
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Merge tag 'boards-3.10' of git://git.infradead.org/users/jcooper/linux into next/boards

From Jason Cooper:
mvebu boards for v3.10

 - kirkwood
    - Netgear ReadyNAS Duo v2
    - add guruplug dt to defconfig
    - Lacie Cloudbox

* tag 'boards-3.10' of git://git.infradead.org/users/jcooper/linux:
  ARM: Kirkwood: update Network Space Mini v2 description
  ARM: Kirkwood: DT board setup for CloudBox
  ARM: Kirkwood: sort board entries by ASCII-code order
  ARM: kirkwood: add MACH_GURUPLUG_DT to defconfig
  ARM: kirkwood: Add support for NETGEAR ReadyNAS Duo v2 using DT

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-17 22:34:22 -07:00
Olof Johansson
8b85143e5d mvebu soc changes for v3.10
- use the mvebu-mbus driver
  - prep for LPAE support
 
 Depends:
  - mvebu/cleanup (tags/cleanup_for_v3.10)
  - mvebu/drivers (tags/drivers_for_v3.10)
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Merge tag 'soc_for_v3.10' of git://git.infradead.org/users/jcooper/linux into next/soc2

From Jason Cooper:
mvebu soc changes for v3.10

 - use the mvebu-mbus driver
 - prep for LPAE support

Depends:
 - mvebu/cleanup (tags/cleanup_for_v3.10)
 - mvebu/drivers (tags/drivers_for_v3.10)

* tag 'soc_for_v3.10' of git://git.infradead.org/users/jcooper/linux:
  ARM: mvebu: Align the internal registers virtual base to support LPAE
  ARM: mvebu: Limit the DMA zone when LPAE is selected
  arm: plat-orion: remove addr-map code
  arm: mach-mv78xx0: convert to use the mvebu-mbus driver
  arm: mach-orion5x: convert to use mvebu-mbus driver
  arm: mach-dove: convert to use mvebu-mbus driver
  arm: mach-kirkwood: convert to use mvebu-mbus driver
  arm: mach-mvebu: convert to use mvebu-mbus driver
  bus: mvebu: fix mistake in PCIe window target attribute for Kirkwood
  bus: mvebu-mbus: Restore checking for coherency fabric hardware
  ARM: Orion: add dbg_show function to gpio-orion driver
  bus: introduce an Marvell EBU MBus driver
  arm: mach-orion5x: use mv_mbus_dram_info() in PCI code
  arm: plat-orion: use mv_mbus_dram_info() in PCIe code
  arm: plat-orion: only build addr-map.c when needed

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-17 22:26:25 -07:00
Marc Zyngier
15bbc1b28f ARM: KVM: fix unbalanced get_cpu() in access_dcsw
In the very unlikely event where a guest would be foolish enough to
*read* from a write-only cache maintainance register, we end up
with preemption disabled, due to a misplaced get_cpu().

Just move the "is_write" test outside of the critical section.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-04-17 12:51:32 -07:00
Olof Johansson
c3e0c873d0 This is the 2nd part of ARM timer clean-ups for 3.10. This series has
the following changes:
 
 - Add sched_clock selection logic to select the highest frequency clock
 - Use full 64-bit arch timer counter for sched_clock
 - Convert arch timer, sp804 and integrator-cp timers to CLKSRC_OF and
 adapt all users to use clocksource_of_init
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Merge tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux into late/clksrc

This is the 2nd part of ARM timer clean-ups for 3.10. This series has
the following changes:

- Add sched_clock selection logic to select the highest frequency clock
- Use full 64-bit arch timer counter for sched_clock
- Convert arch timer, sp804 and integrator-cp timers to CLKSRC_OF and
adapt all users to use clocksource_of_init

* tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux:
  devtree: add binding documentation for sp804
  ARM: integrator-cp: convert use CLKSRC_OF for timer init
  ARM: versatile: use OF init for sp804 timer
  ARM: versatile: add versatile dtbs to dtbs target
  ARM: vexpress: remove extra timer-sp control register clearing
  ARM: dts: vexpress: disable CA9 core tile sp804 timer
  ARM: vexpress: remove sp804 OF init
  ARM: highbank: use OF init for sp804 timer
  ARM: timer-sp: convert to use CLKSRC_OF init
  OF: add empty of_device_is_available for !OF
  ARM: convert arm/arm64 arch timer to use CLKSRC_OF init
  ARM: make machine_desc->init_time default to clocksource_of_init
  ARM: arch_timer: use full 64-bit counter for sched_clock
  ARM: make sched_clock just call a function pointer
  ARM: sched_clock: allow changing to higher frequency counter

Signed-off-by: Olof Johansson <olof@lixom.net>

This has a nasty set of conflicts with the exynos MCT code, which was
moved in a separate branch, and then fixed up when merged in, but still
conflicts a bit here. It should have been sorted out by this merge though.
2013-04-17 10:10:01 -07:00
Manjunathappa, Prakash
4f4d9d4dc5 ARM: davinci: da850-evm: add SPI flash support
Enable m25p64 SPI flash support on da850-EVM. Also
add partition information of SPI flash.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-04-17 22:19:55 +05:30
Manjunathappa, Prakash
414d6e5e66 ARM: davinci: da850: override SPI DT node device name
Populate OF_DEV_AUXDATA with desired device name expected by spi-davinci
driver. Without this clk_get of spi-davinci DT driver fails.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-04-17 22:19:54 +05:30
Manjunathappa, Prakash
c6347e489b ARM: davinci: da850: add SPI1 DT node
Patch adds SPI1 DT node along with pinmux data.

Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-04-17 22:19:54 +05:30
Sekhar Nori
58b6c5a133 ARM: davinci: da850 evm: fix const qualifier placement
const qualifier was misplaced in couple of definitions.
This fixes the sparse error:

  CHECK   arch/arm/mach-davinci/board-mityomapl138.c
arch/arm/mach-davinci/board-da850-evm.c:404:19: error: Just how const do you want this type to be?
arch/arm/mach-davinci/board-da850-evm.c:568:19: error: Just how const do you want this type to be?

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-04-17 22:00:09 +05:30
Robert Tivy
5428813499 ARM: davinci: da850 board: add remoteproc support
Add .reserve function for reserving CMA memory block to MACHINE_START.

Add call to remoteproc platform device registration function during init.

Signed-off-by: Robert Tivy <rtivy@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-04-17 22:00:09 +05:30
Gregory CLEMENT
b361d61dc1 ARM: 7695/1: mvebu: Enable pj4b on LPAE compilations
pj4b cpus are LPAE capable so enable them on LPAE compilations

Signed-off-by: Lior Amsalem <alior@marvell.com>
Tested-by: Franklin <flin@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-17 16:55:01 +01:00
Joonsoo Kim
dd0f67f474 ARM: 7693/1: mm: clean-up in order to reduce to call kmap_high_get()
In kmap_atomic(), kmap_high_get() is invoked for checking already
mapped area. In __flush_dcache_page() and dma_cache_maint_page(),
we explicitly call kmap_high_get() before kmap_atomic()
when cache_is_vipt(), so kmap_high_get() can be invoked twice.
This is useless operation, so remove one.

v2: change cache_is_vipt() to cache_is_vipt_nonaliasing() in order to
be self-documented

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-17 16:55:01 +01:00
Will Deacon
cb2d8b342a ARM: 7698/1: perf: fix group validation when using enable_on_exec
Events may be created with attr->disabled == 1 and attr->enable_on_exec
== 1, which confuses the group validation code because events with the
PERF_EVENT_STATE_OFF are not considered candidates for scheduling, which
may lead to failure at group scheduling time.

This patch fixes the validation check for ARM, so that events in the
OFF state are still considered when enable_on_exec is true.

Cc: stable@vger.kernel.org
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: Jiri Olsa <jolsa@redhat.com>
Reported-by: Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-17 16:54:07 +01:00
Bastian Hecht
50acff3c1f ARM: 7697/1: hw_breakpoint: do not use __cpuinitdata for dbg_cpu_pm_nb
We must not declare dbg_cpu_pm_nb as __cpuinitdata as we need it after
system initialization for Suspend and CPUIdle.

This was done in commit 9a6eb310ea ("ARM: hw_breakpoint: Debug powerdown
support for self-hosted debug").

Cc: stable@vger.kernel.org
Cc: Dietmar Eggemann <Dietmar.Eggemann@arm.com>
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-17 16:54:06 +01:00
Illia Ragozin
cd272d1ea7 ARM: 7696/1: Fix kexec by setting outer_cache.inv_all for Feroceon
On Feroceon the L2 cache becomes non-coherent with the CPU
when the L1 caches are disabled. Thus the L2 needs to be invalidated
after both L1 caches are disabled.

On kexec before the starting the code for relocation the kernel,
the L1 caches are disabled in cpu_froc_fin (cpu_v7_proc_fin for Feroceon),
but after L2 cache is never invalidated, because inv_all is not set
in cache-feroceon-l2.c.
So kernel relocation and decompression may has (and usually has) errors.
Setting the function enables L2 invalidation and fixes the issue.

Cc: <stable@vger.kernel.org>
Signed-off-by: Illia Ragozin <illia.ragozin@grapecom.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-17 16:53:27 +01:00
Joonsoo Kim
de40614e92 ARM: 7694/1: ARM, TCM: initialize TCM in paging_init(), instead of setup_arch()
tcm_init() call iotable_init() and it use early_alloc variants which
do memblock allocation. Directly using memblock allocation after
initializing bootmem should not permitted, because bootmem can't know
where are additinally reserved.
So move tcm_init() to a safe place before initalizing bootmem.

(On the U300)

Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-17 16:53:24 +01:00
Aaro Koskinen
f5d6a1441a ARM: 7692/1: iop3xx: move IOP3XX_PERIPHERAL_VIRT_BASE
Currently IOP3XX_PERIPHERAL_VIRT_BASE conflicts with PCI_IO_VIRT_BASE:

					address         size
	PCI_IO_VIRT_BASE                0xfee00000      0x200000
	IOP3XX_PERIPHERAL_VIRT_BASE     0xfeffe000      0x2000

Fix by moving IOP3XX_PERIPHERAL_VIRT_BASE below PCI_IO_VIRT_BASE.

The patch fixes the following kernel panic with 3.9-rc1 on iop3xx boards:

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Initializing cgroup subsys cpu
[    0.000000] Linux version 3.9.0-rc1-iop32x (aaro@blackmetal) (gcc version 4.7.2 (GCC) ) #20 PREEMPT Tue Mar 5 16:44:36 EET 2013
[    0.000000] bootconsole [earlycon0] enabled
[    0.000000] ------------[ cut here ]------------
[    0.000000] kernel BUG at mm/vmalloc.c:1145!
[    0.000000] Internal error: Oops - BUG: 0 [#1] PREEMPT ARM
[    0.000000] Modules linked in:
[    0.000000] CPU: 0    Not tainted  (3.9.0-rc1-iop32x #20)
[    0.000000] PC is at vm_area_add_early+0x4c/0x88
[    0.000000] LR is at add_static_vm_early+0x14/0x68
[    0.000000] pc : [<c03e74a8>]    lr : [<c03e1c40>]    psr: 800000d3
[    0.000000] sp : c03ffee4  ip : dfffdf88  fp : c03ffef4
[    0.000000] r10: 00000002  r9 : 000000cf  r8 : 00000653
[    0.000000] r7 : c040eca8  r6 : c03e2408  r5 : dfffdf60  r4 : 00200000
[    0.000000] r3 : dfffdfd8  r2 : feffe000  r1 : ff000000  r0 : dfffdf60
[    0.000000] Flags: Nzcv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
[    0.000000] Control: 0000397f  Table: a0004000  DAC: 00000017
[    0.000000] Process swapper (pid: 0, stack limit = 0xc03fe1b8)
[    0.000000] Stack: (0xc03ffee4 to 0xc0400000)
[    0.000000] fee0:          00200000 c03fff0c c03ffef8 c03e1c40 c03e7468 00200000 fee00000
[    0.000000] ff00: c03fff2c c03fff10 c03e23e4 c03e1c38 feffe000 c0408ee4 ff000000 c0408f04
[    0.000000] ff20: c03fff3c c03fff30 c03e2434 c03e23b4 c03fff84 c03fff40 c03e2c94 c03e2414
[    0.000000] ff40: c03f8878 c03f6410 ffff0000 000bffff 00001000 00000008 c03fff84 c03f6410
[    0.000000] ff60: c04227e8 c03fffd4 a0008000 c03f8878 69052e30 c02f96eb c03fffbc c03fff88
[    0.000000] ff80: c03e044c c03e268c 00000000 0000397f c0385130 00000001 ffffffff c03f8874
[    0.000000] ffa0: dfffffff a0004000 69052e30 a03f61a0 c03ffff4 c03fffc0 c03dd5cc c03e0184
[    0.000000] ffc0: 00000000 00000000 00000000 00000000 00000000 c03f8878 0000397d c040601c
[    0.000000] ffe0: c03f8874 c0408674 00000000 c03ffff8 a0008040 c03dd558 00000000 00000000
[    0.000000] Backtrace:
[    0.000000] [<c03e745c>] (vm_area_add_early+0x0/0x88) from [<c03e1c40>] (add_static_vm_early+0x14/0x68)

Tested-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-17 16:53:23 +01:00
Sekhar Nori
215a084dc5 ARM: davinci: ensure global variables are declared
Fix the following sparse warnings by declaring relevant
global variables.

  CHECK   arch/arm/mach-davinci/usb.c
arch/arm/mach-davinci/usb.c:134:12: warning: symbol 'da8xx_register_usb20' was not declared. Should it be static?
arch/arm/mach-davinci/usb.c:169:12: warning: symbol 'da8xx_register_usb11' was not declared. Should it be static?

  CHECK   arch/arm/mach-davinci/pm.c
arch/arm/mach-davinci/pm.c:155:12: warning: symbol 'davinci_pm_init' was not declared. Should it be static?

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-04-17 19:26:41 +05:30
Sekhar Nori
182e7961ca ARM: davinci: sram.c: fix incorrect type in assignment
Fix missing __iomem attribute. This fixes the sparse warning:

  CHECK   arch/arm/mach-davinci/sram.c
arch/arm/mach-davinci/sram.c:75:8: warning: incorrect type in assignment (different address spaces)
arch/arm/mach-davinci/sram.c:75:8:    expected void *addr
arch/arm/mach-davinci/sram.c:75:8:    got void [noderef] <asn:2>*
arch/arm/mach-davinci/sram.c:81:12: warning: incorrect type in argument 1 (different address spaces)
arch/arm/mach-davinci/sram.c:81:12:    expected void volatile [noderef] <asn:2>*addr
arch/arm/mach-davinci/sram.c:81:12:    got void *addr

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-04-17 19:26:41 +05:30
Sekhar Nori
267f3c0731 ARM: davinci: da8xx dt: make file local symbols static
Make some file-local functions static. This fixes the sparse
warnings:

  CHECK   arch/arm/mach-davinci/da8xx-dt.c
arch/arm/mach-davinci/da8xx-dt.c:23:13: warning: symbol 'da8xx_uart_clk_enable' was not declared. Should it be static?
arch/arm/mach-davinci/da8xx-dt.c:40:23: warning: symbol 'da850_auxdata_lookup' was not declared. Should it be static?

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-04-17 19:26:40 +05:30
Robert Tivy
5c71d6181f ARM: davinci: da8xx: add remoteproc support
Add remoteproc platform device for controlling the DSP
on da8xx. The patch uses CMA-based reservation of physical
memory block for DSP use. A new kernel command-line parameter
has been added to allow boot-time specification of the physical
memory block.

Signed-off-by: Robert Tivy <rtivy@ti.com>
[nsekhar@ti.com: edit commit message for readability and
style improvements]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-04-17 19:26:40 +05:30
Russell King
4d855021dd Merge branch 'for-rmk/740t' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into fixes 2013-04-17 10:35:23 +01:00
Thomas Gleixner
d190e8195b idle: Remove GENERIC_IDLE_LOOP config switch
All archs are converted over. Remove the config switch and the
fallback code.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-04-17 10:39:38 +02:00
Linus Torvalds
542a672467 Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fix from Russell King:
 "A build fix for an incomplete change to the ARM cpu suspend code"

* branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: Do 15e0d9e37c (ARM: pm: let platforms select cpu_suspend support) properly
2013-04-16 19:49:03 -07:00
Linus Torvalds
4be41343a2 Merge git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull kvm fixes from Marcelo Tosatti:
 "PPC and ARM KVM fixes"

* git://git.kernel.org/pub/scm/virt/kvm/kvm:
  ARM: KVM: fix L_PTE_S2_RDWR to actually be Read/Write
  ARM: KVM: fix KVM_CAP_ARM_SET_DEVICE_ADDR reporting
  kvm/ppc/e500: eliminate tlb_refs
  kvm/ppc/e500: g2h_tlb1_map: clear old bit before setting new bit
  kvm/ppc/e500: h2g_tlb1_rmap: esel 0 is valid
  kvm/powerpc/e500mc: fix tlb invalidation on cpu migration
2013-04-16 19:46:14 -07:00
Marc Zyngier
865499ea90 ARM: KVM: fix L_PTE_S2_RDWR to actually be Read/Write
Looks like our L_PTE_S2_RDWR definition is slightly wrong,
and is actually write only (see ARM ARM Table B3-9, Stage 2 control
of access permissions). Didn't make a difference for normal pages,
as we OR the flags together, but I'm still wondering how it worked
for Stage-2 mapped devices, such as the GIC.

Brown paper bag time, again.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-16 16:21:25 -07:00
Marc Zyngier
ca46e10fb2 ARM: KVM: fix KVM_CAP_ARM_SET_DEVICE_ADDR reporting
Commit 3401d54696 (KVM: ARM: Introduce KVM_ARM_SET_DEVICE_ADDR
ioctl) added support for the KVM_CAP_ARM_SET_DEVICE_ADDR capability,
but failed to add a break in the relevant case statement, returning
the number of CPUs instead.

Luckilly enough, the CONFIG_NR_CPUS=0 patch hasn't been merged yet
(https://lkml.org/lkml/diff/2012/3/31/131/1), so the bug wasn't
noticed.

Just give it a break!

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-16 16:21:24 -07:00
Alexander Graf
79558f112f KVM: ARM: Fix kvm_vm_ioctl_irq_line
Commit aa2fbe6d broke the ARM KVM target by introducing a new parameter
to irq handling functions.

Fix the function prototype to get things compiling again and ignore the
parameter just like we did before

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Christoffer Dall <cdall@cs.columbia.edu>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2013-04-16 18:16:10 -03:00
Alexandre Courbot
7fd2bf3d32 Remove GENERIC_GPIO config option
GENERIC_GPIO has been made equivalent to GPIOLIB in architecture code
and all driver code has been switch to depend on GPIOLIB. It is thus
safe to have GENERIC_GPIO removed.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2013-04-16 18:47:19 +09:00
Dave Airlie
dea14dfab9 Omapdss patches for 3.10 merge window
The biggest changes are:
 
 * DSI video mode: automatic clock and timing calculation
 * Lots of platform data related panel driver cleanups, to prepare for DT
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Merge tag 'omapdss-for-3.10' of git://gitorious.org/linux-omap-dss2/linux into drm-next

Omapdss patches for 3.10 merge window

The biggest changes are:

* DSI video mode: automatic clock and timing calculation
* Lots of platform data related panel driver cleanups, to prepare for DT

* tag 'omapdss-for-3.10' of git://gitorious.org/linux-omap-dss2/linux: (69 commits)
  drm/omap: add statics to a few structs
  drm/omap: Fix and improve crtc and overlay manager correlation
  drm/omap: Take a fb reference in omap_plane_update()
  drm/omap: Make fixed resolution panels work
  drm/omap: fix modeset_init if a panel doesn't satisfy omapdrm requirements
  OMAPDSS: DPI: widen the pck search when using dss fck
  OMAPDSS: fix dss_fck clock rate rounding
  omapdss: use devm_clk_get()
  OMAPDSS: nec-nl8048 panel: Use dev_pm_ops
  OMAPDSS: DISPC: Revert to older DISPC Smart Standby mechanism for OMAP5
  OMAPDSS: DISPC: Configure doublestride for NV12 when using 2D Tiler buffers
  omapdss: Features: Fix some parameter ranges
  omapdss: DISPC: add max pixel clock limits for LCD and TV managers
  OMAPDSS: DSI: Use devm_clk_get()
  drivers: video: omap2: dss: Use PTR_RET function
  OMAPDSS: VENC: remove platform_enable/disable calls
  OMAPDSS: n8x0 panel: remove use of platform_enable/disable
  OMAPDSS: n8x0 panel: handle gpio data in panel driver
  OMAPDSS: picodlp panel: remove platform_enable/disable callbacks
  OMAPDSS: picodlp panel: handle gpio data in panel driver
  ...
2013-04-16 13:20:03 +10:00
Thomas Petazzoni
9339d432fd irqchip: move IRQ driver for Armada 370/XP
When the Marvell Armada 370/XP support was included in the kernel, the
drivers/irqchip/ directory didn't exist and the minimal infrastructure
in it also didn't exist. Now that we have those things in place, we
move the Armada 370/XP IRQ controller driver from
arch/arm/mach-mvebu/irq-armada-370-xp.c to
drivers/irqchip/irq-armada-370-xp.c.

Note in order to reduce code movement and therefore ease the review of
this patch, we intentionally introduce a forward declaration of
armada_370_xp_handle_irq(). It is in fact not needed because this
handler can now simply be implemented before
armada_370_xp_mpic_of_init(). That will be done in the next commit.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 19:34:36 +00:00
Thomas Petazzoni
e33369cbf3 ARM: mvebu: move L2 cache initialization in init_early()
In preparation for moving the IRQ controller driver to
drivers/irqchip/, we don't want the IRQ controller driver to be
responsible for initializing the L2 cache. Instead, let's initialize
the L2 cache at the init_early() level, like mach-exynos/common.c is
doing.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 19:34:16 +00:00
Bastian Hecht
cbaf7f8080 ARM - shmobile: Armadillo800EVA: Move st1232 reset pin handling
We no longer need to set up the reset pin for the st1232 in the board
code, but can pass the GPIO number via the platform data to the driver.
This results in a cleaner grouping of the device setup.

Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2013-04-15 10:05:27 -07:00
Gregory CLEMENT
74898364e7 ARM: dts: mvebu: Convert mvebu device tree files to 64 bits
In order to be able to use more than 4GB of RAM when the LPAE is
activated, the dts must be converted in 64 bits.

Only Armada XP is LPAE capable, but as it shares a common dtsi file
with Armada 370, then the common file include the skeleton64. Thanks
to the use of the overload capability of the device tree format,
armada-370 include the 32 bit skeleton and all the armada 370 based
dts can remain the same.

This was heavily based on the work of Lior Amsalem.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 15:00:29 +00:00
Gregory CLEMENT
467f54b215 ARM: dts: mvebu: introduce internal-regs node
Introduce a 'internal-regs' subnode, under which all devices are
moved. This is not really needed for now, but will be for the
mvebu-mbus driver. This generates a lot of code movement since it's
indenting by one more tab all the devices.  So it was a good
opportunity to fix all the bad indentation.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 15:00:24 +00:00
Gregory CLEMENT
82a682676c ARM: dts: mvebu: Convert all the mvebu files to use the range property
This conversion will allow to keep 32 bits addresses for the internal
registers whereas the memory of the system will be 64 bits.
Later it will also ease the move of the mvebu-mbus driver to the
device tree support.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 15:00:21 +00:00
Thomas Petazzoni
b18ea4dc77 ARM: dts: mvebu: move all peripherals inside soc
reorganize the .dts and .dtsi files so that all devices are under the
soc { } node (currently some devices such as the interrupt controller,
the L2 cache and a few others are outside).

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 15:00:17 +00:00
Thomas Petazzoni
1b2529d018 ARM: dts: mvebu: fix cpus section indentation
Align the cpu node indentation with the rest of the file

[gc]: added a commit description
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 15:00:12 +00:00
Jason Cooper
b757f17e91 mvebu soc changes for v3.10
- use the mvebu-mbus driver
  - prep for LPAE support
 
 Depends:
  - mvebu/cleanup (tags/cleanup_for_v3.10)
  - mvebu/drivers (tags/drivers_for_v3.10)
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Merge tag 'tags/soc_for_v3.10' into mvebu/dt

Pulling in mvebu branches which contain changes to armada*.dts? files for LPAE
conversion.

mvebu soc changes for v3.10

 - use the mvebu-mbus driver
 - prep for LPAE support

Depends:
 - mvebu/cleanup (tags/cleanup_for_v3.10)
 - mvebu/drivers (tags/drivers_for_v3.10)
2013-04-15 14:55:23 +00:00
Jason Cooper
3c76a8a95d mvebu fixes for v3.9 round 3
- Kirkwood
     - a couple of small fixes for the Iomega ix2-200 board (ether and led)
  - mvebu
     - allow GPIO button to work on Mirabox when running SMP
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Merge tag 'tags/mvebu_fixes_for_v3.9_round3' into mvebu/dt

pulling in mvebu branches which changes armada*.dts? files for LPAE changes

mvebu fixes for v3.9 round 3

 - Kirkwood
    - a couple of small fixes for the Iomega ix2-200 board (ether and led)
 - mvebu
    - allow GPIO button to work on Mirabox when running SMP
2013-04-15 14:54:05 +00:00
Thomas Petazzoni
513a7917b1 arm: mvebu: PCIe Device Tree informations for Armada XP GP
The Marvell Armada XP GP board has 3 physical full-size PCIe slots, so
we enable the corresponding PCIe interfaces in the Device Tree.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:53:53 +00:00
Thomas Petazzoni
3b723ae8c6 arm: mvebu: PCIe Device Tree informations for Armada 370 DB
The Marvell evaluation board (DB) for the Armada 370 SoC has 2
physical full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:53:46 +00:00
Thomas Petazzoni
488d1a6ff9 arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox
The Globalscale Mirabox platform uses one PCIe interface for an
available mini-PCIe slot, and the other PCIe interface for an internal
USB 3.0 controller. We add the necessary Device Tree informations to
enable those two interfaces.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:53:40 +00:00
Thomas Petazzoni
bf4f9c6346 arm: mvebu: PCIe Device Tree informations for Armada XP DB
The Marvell evaluation board (DB) for the Armada XP SoC has 6
physicals full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:53:34 +00:00
Thomas Petazzoni
95999cf098 arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4
The PlatHome OpenBlocks AX3-4 has an internal mini-PCIe slot that can
be used to plug mini-PCIe devices. We therefore enable the PCIe
interface that corresponds to this slot.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:53:25 +00:00
Thomas Petazzoni
9d8f44f02d arm: mvebu: add PCIe Device Tree informations for Armada XP
The Armada XP SoCs have multiple PCIe interfaces. The MV78230 has 2
PCIe units (one 4x or quad 1x, the other 1x only), the MV78260 has 3
PCIe units (two 4x or quad 1x and one 4x/1x), the MV78460 has 4 PCIe
units (two 4x or quad 1x and two 4x/1x). We therefore add the
necessary Device Tree informations to make those PCIe interfaces
usable.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:53:19 +00:00
Thomas Petazzoni
a09a0b7c6f arm: mvebu: add PCIe Device Tree informations for Armada 370
The Armada 370 SoC has two 1x PCIe 2.0 interfaces, so we add the
necessary Device Tree informations to make these interfaces availabel.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:53:03 +00:00
Lior Amsalem
da497f6fba ARM: mvebu: Align the internal registers virtual base to support LPAE
In order to be able to support the LPAE, the internal registers
virtual base must be aligned to 2MB. In LPAE section size is 2MB, in
earlyprintk we map the internal registers and it must be section
aligned.

Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:59 +00:00
Gregory CLEMENT
99ff056193 ARM: mvebu: Limit the DMA zone when LPAE is selected
When LPAE is activated on Armada XP, all registers and IOs are still
32bit, the 40bit extension is on the CPU to DRAM path (windows) only.
That means that all the DMA transfer are restricted to the low 32 bits
address space. This is limitation is achieved by selecting ZONE_DMA.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:53 +00:00
Thomas Petazzoni
7ad2a78342 arm: plat-orion: remove addr-map code
Now that all Marvell EBU platforms have been converted to use the
mvebu-mbus driver, we can remove the common plat-orion/addr-map.c code
that isn't compiled anymore.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:46 +00:00
Thomas Petazzoni
95b80e0a9a arm: mach-mv78xx0: convert to use the mvebu-mbus driver
This commit convers the mach-mv78xx0 sub-architecture to use the
mvebu-mbus driver. We simply have to call mvebu_mbus_init() in the
->init_early() function, and modify the PCIe code so that it uses the
new functions provided by mvebu-mbus to create the needed PCIe
windows.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:39 +00:00
Thomas Petazzoni
5d1190ea69 arm: mach-orion5x: convert to use mvebu-mbus driver
This commit migrates the mach-orion5x platforms to use the mvebu-mbus
driver and therefore removes the Orion5x-specific addr-map code.

The dove_init_early() function now initializes the mvebu-mbus driver
by calling mvebu_mbus_init().

We also convert a number of orion5x_setup_xyz_win() calls to the
appropriate mvebu_mbus_add_window() calls, as each board was doing its
own setup for the NOR window or other devices. Ultimately, those
devices will be probed from the DT.

The common address decoding windows are now registered in the
orion5x_setup_wins() function. It is worth noting that the four PCIe
address decoding windows will ultimately no longer have to be
registered here: it will be done automatically by the PCIe driver once
Dove has been migrated to use the upcoming mvebu PCIe driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:34 +00:00
Thomas Petazzoni
7d55490277 arm: mach-dove: convert to use mvebu-mbus driver
This commit migrates the mach-dove platforms to use the mvebu-mbus
driver and therefore removes the Dove-specific addr-map code.

The dove_init_early() function now initializes the mvebu-mbus driver
by calling mvebu_mbus_init().

The address decoding windows are now registered in the
dove_setup_cpu_wins() function. It is worth noting that the four PCIe
address decoding windows will ultimately no longer have to be
registered here: it will be done automatically by the PCIe driver once
Dove has been migrated to use the upcoming mvebu PCIe driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:27 +00:00
Thomas Petazzoni
5cc0673a67 arm: mach-kirkwood: convert to use mvebu-mbus driver
This commit migrates the mach-kirkwood platforms to use the mvebu-mbus
driver and therefore removes the Kirkwood-specific addr-map code.

The kirkwood_init_early() function is now responsible for initializing
the mvebu-mbus driver by calling mvebu_mbus_init().

The address decoding windows are now registered in the
kirkwood_setup_wins() function. It is worth noting that the four PCIe
address decoding windows will ultimately no longer have to be
registered here: it will be done automatically by the PCIe driver once
Kirkwood has been migrated to use the upcoming mvebu PCIe driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:22 +00:00
Thomas Petazzoni
87e1bed406 arm: mach-mvebu: convert to use mvebu-mbus driver
The changes needed to migrate the mach-mvebu (Armada 370 and Armada
XP) to the mvebu-mbus driver are fairly minimal, since not many
devices currently supported on those SoCs use address decoding
windows. The only one being the BootROM window, used to bring up
secondary CPUs.

However, this BootROM window needed for SMP brings an important
requirement: the mvebu-mbus driver must be initialized at the
->early_init() time, otherwise the BootROM window cannot be setup
early enough to be ready before the secondary CPUs are started.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:16 +00:00
Tomi Valkeinen
cf2585a482 fbdev: Merge fbdev topic branches
Merge branches '3.10/auo-k190x', '3.10/misc', '3.10/videomode' and '3.10/vt8500' into for-next
2013-04-15 12:00:38 +03:00
Emilio López
92fd6e066a ARM: sunxi: unify osc24M_fixed and osc24M
Now that the clock driver supports the gatable oscillator as one single
clock, drop osc24M_fixed and move the relevant properties to osc24M

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-04-15 10:24:54 +02:00
Philip Avinash
64fa59c472 ARM: davinci: da850: add EHRPWM & ECAP DT node
Add da850 EHRPWM & ECAP DT node along with pin-mux details.
Also adds OF_DEV_AUXDATA for EHRPWM & ECAP driver to use EHRPWM & ECAP
clock.

Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-04-15 11:39:14 +05:30
Jon Hunter
8d30662aac dmaengine: OMAP: Register SDMA controller with Device Tree DMA driver
If the device-tree blob is present during boot, then register the SDMA
controller with the device-tree DMA driver so that we can use device-tree
to look-up DMA client information.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-04-15 09:51:19 +05:30
Olof Johansson
6e527d000f Some minor fixes for MSM for 3.10
- Fix a timer problem that causes missed ticks and hangs.
 
   - Fix a problem with the decompressor UART dropping characters.
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Merge tag 'msm-fix-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/fixes-non-critical

From David Brown:
Some minor fixes for MSM for 3.10

  - Fix a timer problem that causes missed ticks and hangs.

  - Fix a problem with the decompressor UART dropping characters.

* tag 'msm-fix-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
  ARM: msm: Fix uncompess.h tx underrun check
  ARM: msm: Stop counting before reprogramming clockevent

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-14 20:53:53 -07:00
Olof Johansson
e1b1655a58 Defconfig updates for MSM
The msm_defconfig is quite out of date.  This allows the targets we
 are actively working on to be more easily build and run tested.
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Merge tag 'msm-defconfig-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/boards

From David Brown:
Defconfig updates for MSM

The msm_defconfig is quite out of date.  This allows the targets we
are actively working on to be more easily build and run tested.

* tag 'msm-defconfig-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
  ARM: msm: enable SSBI driver in defconfig
  ARM: msm: Concentrate defconfig on DT supported devices
2013-04-14 20:51:02 -07:00
Olof Johansson
b56a7f9206 Patches for MSM core
These patches are changes to the MSM timer code that will be for
 upcoming targets, including a generalization of the binding and
 preventing a missing timer interrupt.
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Merge tag 'msm-core-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/soc

From David Brown:
Patches for MSM core

These patches are changes to the MSM timer code that will be for
upcoming targets, including a generalization of the binding and
preventing a missing timer interrupt.

* tag 'msm-core-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
  ARM: msm: Wait for timer clear to complete
  ARM: msm: Rework timer binding to be more general

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-14 20:49:28 -07:00
Olof Johansson
5ed3ebe3be Cleanups for MSM for 3.10
These are some patches for various parts of MSM that gradually bring
 us closer to being part of single zimage.
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Merge tag 'msm-cleanup-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/cleanup

From David Brown:
Cleanups for MSM for 3.10

These are some patches for various parts of MSM that gradually bring
us closer to being part of single zimage.

* tag 'msm-cleanup-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
  ARM: msm: Remove unused cpu.h header file
  gpio: Make gpio-msm-v1 into a platform driver
  mmc: msm_sdcc: Remove unnecessary include
  ARM: msm: Move dma.h #defines that are private to dma.c

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-14 20:41:39 -07:00
Dinh Nguyen
56c5c13f70 ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entries
With this patch, the socfpga clk driver is able to query the clock and clock
rates appropriately.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-14 20:18:13 -07:00
Dinh Nguyen
042000b003 ARM: socfpga: Add clock entries into device tree
Adds the main PLL clock groups for SOCFPGA into device tree file
so that the clock framework to query the clock and clock rates
appropriately.

$cat /sys/kernel/debug/clk/clk_summary
   clock                        enable_cnt  prepare_cnt  rate
---------------------------------------------------------------------
 osc1                           2           2            25000000
    sdram_pll                   0           0            400000000
       s2f_usr2_clk             0           0            66666666
       ddr_dq_clk               0           0            200000000
       ddr_2x_dqs_clk           0           0            400000000
       ddr_dqs_clk              0           0            200000000
    periph_pll                  2           2            500000000
       s2f_usr1_clk             0           0            50000000
       per_base_clk             4           4            100000000
       per_nand_mmc_clk         0           0            25000000
       per_qsi_clk              0           0            250000000
       emac1_clk                1           1            125000000
       emac0_clk                0           0            125000000
    main_pll                    1           1            1600000000
       cfg_s2f_usr0_clk         0           0            100000000
       main_nand_sdmmc_clk      0           0            100000000
       main_qspi_clk            0           0            400000000
       dbg_base_clk             0           0            400000000
       mainclk                  0           0            400000000
       mpuclk                   1           1            800000000
          smp_twd               1           1            200000000

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-14 20:17:59 -07:00
Dinh Nguyen
5c04b57fe3 ARM: socfpga: Enable soft reset
Enable a cold or warm reset to the HW from userspace.

Also fix a few sparse errors:

warning: symbol 'sys_manager_base_addr' was not declared. Should it be static?
warning: symbol 'rst_manager_base_addr' was not declared. Should it be static?

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-14 20:17:33 -07:00
Greg Kroah-Hartman
11b397e6eb Merge 3.9-rc7 intp tty-next
We want the fixes here.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-14 19:13:28 -07:00
Greg Kroah-Hartman
2f093e2aa4 Merge 3.9-rc7 into char-misc-next
We want the fixes in there.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-14 18:21:35 -07:00
Lad, Prabhakar
89cdbba841 [media] ARM: daVinci: dm644x/dm355/dm365: replace V4L2_STD_525_60/625_50 with V4L2_STD_NTSC/PAL
This patch replaces V4L2_STD_525_60/625_50 with V4L2_STD_NTSC/PAL
respectively as this are the proper video standards.

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Reported-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2013-04-14 20:10:59 -03:00
Lad, Prabhakar
8775617701 [media] ARM: davinci: dm355 EVM: add support for VPBE display
add support for V4L2 video display to DM355 EVM.
Support for SD modes is provided, along with Composite
output

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2013-04-14 20:10:30 -03:00
Lad, Prabhakar
62a2d6cd56 [media] ARM: davinci: dm355: add support for v4l2 video display
Create platform devices for various video modules like venc,osd,
vpbe and v4l2 driver for dm355.

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2013-04-14 20:10:13 -03:00
Lad, Prabhakar
542b5bd226 [media] ARM: davinci: dm365 EVM: add support for VPBE display
add support for V4L2 video display to DM365 EVM.
Support for SD and ED modes is provided, along with Composite
and Component outputs.

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2013-04-14 20:09:50 -03:00
Lad, Prabhakar
120c66046c [media] ARM: davinci: dm365: add support for v4l2 video display
Create platform devices for various video modules like venc,osd,
vpbe and v4l2 driver for dm365.

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2013-04-14 20:09:26 -03:00
Lad, Prabhakar
9a3e89b10f [media] media: davinci: vpss: enable vpss clocks
By default the VPSS clocks were enabled in capture driver
for davinci family which creates duplicates for dm355/dm365/dm644x.
This patch adds support to enable the VPSS clocks in VPSS driver,
which avoids duplication of code and also adding clock aliases.
This patch uses PM runtime API to enable/disable clock, instead
of DaVinci clock framework. con_ids for master and slave clocks of
vpss is added in pm_domain.
This patch cleanups the VPSS clock enabling in the capture driver,
and also removes the clock alias in machine file. Along side adds
a vpss slave clock for DM365 as mentioned by Sekhar
(https://patchwork.kernel.org/patch/1221261/).
The Suspend/Resume in dm644x_ccdc.c which enabled/disabled the VPSS clock
is now implemented as part of the VPSS driver.

Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2013-04-14 20:08:09 -03:00
Olof Johansson
567b1b0839 The imx soc changes for 3.10:
* Enable anatop, well bisa and RBC for suspend to optimize the power
   consumption a little bit
 * Clock changes for TVE, LDB, PATA, SRTC support
 * Add System Reset Controller (SRC) support for imx5 and imx6
 * Add initial imx6dl support based on imx6q code
 * Kconfig for cpufreq-cpu0, defconfig updates and few other changes
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Merge tag 'imx-soc-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc2

From Shawn Guo:
The imx soc changes for 3.10:

* Enable anatop, well bisa and RBC for suspend to optimize the power
  consumption a little bit
* Clock changes for TVE, LDB, PATA, SRTC support
* Add System Reset Controller (SRC) support for imx5 and imx6
* Add initial imx6dl support based on imx6q code
* Kconfig for cpufreq-cpu0, defconfig updates and few other changes

* tag 'imx-soc-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (275 commits)
  ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
  ARM i.MX53: tve_di clock is not part of the CCM, but of TVE
  ARM i.MX53: make tve_ext_sel propagate rate change to PLL
  ARM i.MX53: Remove unused tve_gate clkdev entry
  ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree
  ARM: i.MX5: Add PATA and SRTC clocks
  ARM: imx: do not bring up unavailable cores
  ARM: imx: add initial imx6dl support
  ARM: imx1: mm: add call to mxc_device_init
  ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS
  ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS
  ARM: i.MX53 Add the cko1, cko2 clock outputs.
  staging: drm/imx: Use SRC to reset IPU
  ARM i.MX6q: Add GPU, VPU, IPU, and OpenVG resets to System Reset Controller (SRC)
  ARM: imx: do not use regmap_read for ANADIG_DIGPROG
  ARM i.MX6q: set the LDB serial clock parent to the video PLL
  ARM i.MX6q: Add audio/video PLL post dividers for i.MX6q rev 1.1
  ARM i.MX6q: fix ldb di divider and selector clocks
  ARM i.MX53: fix ldb di divider and selector clocks
  ARM i.MX: Add imx_clk_divider_flags and imx_clk_mux_flags
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>

Trivial change/change conflict in arch/arm/mach-imx/mach-imx6q.c resolved.
2013-04-12 23:55:05 -07:00
Olof Johansson
bf049ded36 update device tree for exynos4 and exynos5
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Merge tag 'dt-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt2

update device tree for exynos4 and exynos5

* tag 'dt-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (125 commits)
  ARM: dts: add PDMA0 changes for exynos5440
  ARM: dts: Add cpufreq controller node for Exynos5440 SoC
  ARM: dts: Fix gmac clock ids due to changes in Exynos5440
  ARM: dts: add device tree file for SD5v1 board
  ARM: dts: update bootargs to boot from sda2 for exynos5440-ssdk5440
  ARM: dts: add PMU support in exynos5440
  ARM: dts: Add node for GMAC for exynos5440
  ARM: dts: list the interrupts generated by pin-controller on Exynos5440
  ARM: dts: Add FIMD DT binding Documentation
  ARM: dts: Add FIMD node and display timing node to exynos4412-origen.dts
  ARM: dts: Add FIMD node to exynos4
  ARM: dts: Add SYSREG block node for S5P/Exynos4 SoC series
  ARM: dts: Add display timing node to exynos5250-smdk5250.dts
  ARM: dts: Add FIMD node to exynos5
  ARM: dts: Add virtual GIC DT bindings for exynos5440
  ARM: dts: Document usb clocks in samsung,exynos4210-ehci/ohci bindings
  ARM: dts: add usb 2.0 clock references to exynos5250 device tree
  ARM: dts: Add architected timer nodes for exynos5250
  ARM: dts: Declare the gic as a15 compatible for exynos5250
  ARM: dts: Add HDMI HPD and regulator node for Arndale board
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-12 23:05:08 -07:00
Tony Prisk
06ff14c054 irqchip: vt8500: Convert arch-vt8500 to new irqchip infrastructure
This patch moves the arch-vt8500 irq code to drivers/irqchip and converts
it to use the new IRQCHIP_DECLARE and irqchip_init. This allows the removal
of some more functions from common.h

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-12 22:43:24 -07:00
Tony Prisk
3e87515a2f arm: vt8500: Add SDHC support to WM8505 DT
This patch adds the required node for the SDHC controller on WM8505 SoCs.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-12 22:40:28 -07:00
Mark Brown
df00b71fbd Merge remote-tracking branch 'asoc/topic/samsung' into asoc-next 2013-04-12 13:57:13 +01:00
Arnd Bergmann
788437273f spi: s3c64xx: move to generic dmaengine API
The spi-s3c64xx uses a Samsung proprietary interface for
talking to the DMA engine, which does not work with
multiplatform kernels.

This version of the patch leaves the old code in place,
behind an #ifdef. This can be removed in the future,
after the s3c64xx platform start supporting the regular
dmaengine interface. An earlier version of this patch was
tested successfully on exynos5250 by Padma Venkat.

The conversion was rather mechanical, since the samsung
interface is just a shallow wrapper around the dmaengine
interface.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-12 13:54:58 +01:00
Philipp Zabel
80f72d2d33 ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
Use imx_clk_mux_flags to set the appropriate flags for the TVE
selector clock. This is needed so tve_clk rate changes can propagate
up to pll4_sw.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:17 +08:00
Philipp Zabel
d24de49523 ARM i.MX53: tve_di clock is not part of the CCM, but of TVE
Remove the tve_di clock from the CCM clock tree. It will be provided
by the Television Encoder driver, as this clock is an output signal
of the TVE module.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:16 +08:00
Philipp Zabel
f550e70175 ARM i.MX53: make tve_ext_sel propagate rate change to PLL
This is needed so the Television Encoder driver can set the rate
on tve_clk and have it propagated up to pll4_sw.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:16 +08:00
Philipp Zabel
866f2f0d8d ARM i.MX53: Remove unused tve_gate clkdev entry
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:16 +08:00
Philipp Zabel
3f487bed1b ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree
On i.MX53, there is only tve_ext_sel.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:16 +08:00
Sascha Hauer
5d530bb0ad ARM: i.MX5: Add PATA and SRTC clocks
This adds the clock gates and the binding documentation
for PATA and SRTC.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:15 +08:00
Shawn Guo
dc13ba2950 ARM: imx: do not bring up unavailable cores
The i.MX6 Quad can be fused as i.MX6 Dual chip, and similarly i.MX6
DualLite can be fused as i.MX6 Solo.  The actual number of available
cores can be found out from SCU.

Since we do not reflect the fusing thing in device tree, the function
arm_dt_init_cpu_maps() will always call set_cpu_possible(true) for 4
cores on i.MX6 Quad/Dual and 2 cores for i.MX6 DualLite/Solo.  This
causes failures when kernel tries to bring those unavailable cores
online.  For example, the following failure message will be seen when
booting an i.MX6 Solo chip.

  CPU1: failed to come online

Though kernel will still boot fine, the message is somehow annoying.
Let's get rid of it by calling set_cpu_possible(false) on those
unavailable cores.

While at it, the set_cpu_possible(true) for available cores is removed,
since it's already been done in arm_dt_init_cpu_maps().

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:15 +08:00
Shawn Guo
3c03a2fed6 ARM: imx: add initial imx6dl support
The i.MX6 DualLite/Solo is another i.MX6 family SoC, which is highly
compatible with i.MX6 Quad/Dual.  And that's why we choose to support
it using imx6q code with cpu_is_imx6dl() check when necessary.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:15 +08:00
Gwenhael Goavec-Merou
9a37ac481a ARM: imx1: mm: add call to mxc_device_init
mxc_device_init() is mandatory for mxc_aips and mxc_ahb bus registration, needed
as parents, at least, for gpio and dma.

Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:15 +08:00
Fabio Estevam
7c3e48b5a4 ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS
Add CONFIG_GPIO_SYSFS as it is helpful for accessing GPIO from userspace.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:14 +08:00
Fabio Estevam
e72f745c46 ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS
Select CONFIG_PERF_EVENTS so that oprofile can be used.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:14 +08:00
Martin Fuzzey
04b41e84ff ARM: i.MX53 Add the cko1, cko2 clock outputs.
These two clocks connect to external pins and can be muxed to
various internal clocks.
They are typically used either for debugging or to provide
clocks to external chips (eg audio codecs).

Currently only the selectable clocks that already exist in the clock tree
have been added.

Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:14 +08:00
Philipp Zabel
02985b9463 ARM i.MX6q: Add GPU, VPU, IPU, and OpenVG resets to System Reset Controller (SRC)
The SRC has auto-deasserting reset bits that control reset lines to
the GPU, VPU, IPU, and OpenVG IP modules. This patch adds a reset
controller that can be controlled by those devices using the
reset controller API.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:13 +08:00
Shawn Guo
7006ba24c2 ARM: imx: do not use regmap_read for ANADIG_DIGPROG
Function imx_anatop_get_digprog() that reads register ANADIG_DIGPROG is
called to identify silicon version.  Users might query silicon version
earlier than regmap subsystem is ready.  For example, imx6q clock driver
query revision in mx6q_clocks_init(), where regmap is not initialized
yet.

Change imx_anatop_get_digprog() to map anatop block and read
ANADIG_DIGPROG in the native way, so that the function can work at very
early stage.

While at it, let's move imx_print_silicon_rev() back to
imx6q_timer_init() to have the message show up a little earlier.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:13 +08:00
Philipp Zabel
32f3b8da22 ARM i.MX6q: set the LDB serial clock parent to the video PLL
On i.MX6q revision 1.1 and later, set the video PLL as parent for
the LDB clock branch. On revision 1.0, the video PLL is useless
due to missing dividers, so keep the default parent (mmdc_ch1_axi).

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:13 +08:00
Philipp Zabel
2df1d026ed ARM i.MX6q: Add audio/video PLL post dividers for i.MX6q rev 1.1
Query silicon revision to determine clock tree and add post
dividers for newer revisions.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:12 +08:00
Philipp Zabel
d19dacb732 ARM i.MX6q: fix ldb di divider and selector clocks
Use imx_clk_mux_flags and imx_clk_divider_flags to set the appropriate
flags for the LDB display interface divider and selector clocks.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:45 +08:00
Philipp Zabel
cc7b633909 ARM i.MX53: fix ldb di divider and selector clocks
Use imx_clk_mux_flags and imx_clk_divider_flags to set the appropriate
flags for the LDB display interface divider and selector clocks.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:45 +08:00
Philipp Zabel
3ce921702b ARM i.MX: Add imx_clk_divider_flags and imx_clk_mux_flags
The default is for dividers to set CLK_SET_PARENT_RATE and for muxes to
not set that flag. In the LDB clock tree, we need the opposite, so add
functions to create divider and mux clocks with configurable flags.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Philipp Zabel
b1a3582dc6 ARM i.MX6q: export imx6q_revision
So it can be used in clk-imx6q.c for revision dependent clock tree setup.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Markus Pargmann
6866310423 ARM: imx27, imx5: Add kconfig selects for cpufreq-cpu0
There are some config options not selected by imx27 and imx5 that are
necessary to use the cpufreq-cpu0 driver.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Philipp Zabel
8ecb167f49 ARM i.MX53: Add GPU clocks to clock tree
This patch adds the missing GPU2D and GPU3D mux and gate clocks,
and the graphics arbiter gate clock.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Fabio Estevam
fcc4f9fc5b ARM: mach-imx: anatop: Include "common.h"
Fix the following sparse warnings:

arch/arm/mach-imx/anatop.c:56:6: warning: symbol 'imx_anatop_pre_suspend' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:62:6: warning: symbol 'imx_anatop_post_resume' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:68:6: warning: symbol 'imx_anatop_usb_chrg_detect_disable' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:78:5: warning: symbol 'imx_anatop_get_digprog' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:86:13: warning: symbol 'imx_anatop_init' was not declared. Should it be static?

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:43 +08:00
Anson Huang
263475d4e0 ARM: imx: enable RBC to support anatop LPM mode
RBC is to control whether some ANATOP sub modules
can enter lpm mode when SOC is into STOP mode, if
RBC is enabled and PMIC_VSTBY_REQ is set, ANATOP
will have below behaviors:

1. Digital LDOs(CORE, SOC and PU) are bypassed;
2. Analog LDOs(1P1, 2P5, 3P0) are disabled;

As the 2P5 is necessary for DRAM IO pre-drive in
STOP mode, so we need to enable weak 2P5 in STOP
mode when 2P5 LDO is disabled.

For RBC settings, there are some rules as below
due to hardware design:

1. All interrupts must be masked during operating
   RBC registers;
2. At least 2 CKIL(32K) cycles is needed after the
   RBC setting is changed.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:43 +08:00
Anson Huang
e7b82d645d ARM: imx: enable periphery well bias for suspend
Enable periphery charge pump for well biasing
at suspend to reduce periphery leakage.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:43 +08:00
Anson Huang
e95dddb34c ARM: imx: enable anatop suspend/resume
Anatop module have sereval configurations for user
to reduce the power consumption in suspend, provide
suspend/resume interface for further use and enable
fet_odrive to reduce CORE LDO leakage during suspend.

As we have a common anatop file, remove all the operations
of anatop module in other files, use anatop interfaces to
do that.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:42 +08:00
Shawn Guo
a862d88d3f The imx cleanup for 3.10:
* Clean up a couple of unneeded function declarations
 * Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well
   as the replacement
 * Remove platform ahci support
 * Clean up unused ARCH/MACH Kconfig symbols
 * Remove a couple of unused files
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Merge tag 'imx-cleanup-3.10' into imx/soc

The imx cleanup for 3.10:

* Clean up a couple of unneeded function declarations
* Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well
  as the replacement
* Remove platform ahci support
* Clean up unused ARCH/MACH Kconfig symbols
* Remove a couple of unused files
2013-04-12 19:00:28 +08:00
Arnd Bergmann
cccfc53626 usb: exynos: do not include plat/usb-phy.h
The definitions have moved to include/linux/usb/samsung-usb-phy.h,
and plat/usb-phy.h is unavailable from drivers in a multiplatform
configuration.

Also fix up the plat/usb-phy.h header file to use the definitions
from the new header instead of providing a separate copy.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-11 14:27:55 -07:00
Arnd Bergmann
9ee51f01ee tty: serial/samsung: make register definitions global
The registers for the Samsung S3C serial port are currently defined in
the platform specific arch/arm/plat-samsung/include/plat/regs-serial.h
file, which is not visible to multiplatform capable drivers.

Unfortunately, it is not possible to move the file into a more local
place as we should normally try to, because the same registers
may be used in one of four places:

* In the driver itself
* In platform-independent ARM code for early debug output
* In platform_data definitions
* In the Samsung platform power management code

I have also found no way to logically split out a platform_data
file, other than possibly move everything into
include/linux/platform_data, which also felt wrong. The only
part of this file that makes sense to keep specific to the s3c24xx
platform are the virtual and physical addresses defined here,
which are needed in no other location.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-04-11 13:14:36 -07:00
Rob Herring
870e2928cf ARM: integrator-cp: convert use CLKSRC_OF for timer init
Move the integrator-cp timer init to timer-sp.c and use CLKSRC_OF. There is
no reason to use the aliases, so drop them from the init code.

The integrator-cp timers are mistakenly called sp804 timers in the dts, but
in fact they are not sp804 dual timers, but single timers with the same
programming model. Fix the dts to reflect this.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-11 15:11:21 -05:00
Rob Herring
818270d573 ARM: versatile: use OF init for sp804 timer
Enable DT based init for the sp804 timers on versatile DT platform.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-04-11 15:11:21 -05:00
Rob Herring
cc8e9ad884 ARM: versatile: add versatile dtbs to dtbs target
Add the versatile platform dtbs to the dtbs make rule.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-04-11 15:11:20 -05:00
Rob Herring
b2a93b1d6b ARM: vexpress: remove extra timer-sp control register clearing
The timer-sp initialization code clears the control register before
initializing the timers, so every platform doing this is redundant.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-04-11 15:11:19 -05:00
Rob Herring
34c2e5feeb ARM: dts: vexpress: disable CA9 core tile sp804 timer
The motherboard sp804 timer is used, but core tile sp804 timer is not.
According to Russell King, the clock configuration is undocumented and
defaults to 32kHz which is not desireable. So mark core tile sp804 timer
as disabled.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-04-11 15:11:19 -05:00