2 Commits

Author	SHA1	Message	Date
Hans de Goede	1b422ecd27	irqchip: sun7i/sun6i: Disable NMI before registering the handler ... It is advisable to disable the NMI before registering the IRQ handler as registering the IRQ handler unmasks the IRQ on the GIC, so if U-Boot has left the NMI enabled and the NMI pin is active we will immediately get an interrupt before any driver has claimed the downstream interrupt of the NMI. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Carlo Caione <carlo@caione.org> Cc: maxime.ripard@free-electrons.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sunxi@googlegroups.com Link: http://lkml.kernel.org/r/1395939759-11135-3-git-send-email-carlo@caione.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>	2014-03-31 11:12:57 +02:00
Carlo Caione	6058bb3628	ARM: sun7i/sun6i: irqchip: Add irqchip driver for NMI controller ... Allwinner A20/A31 SoCs have special registers to control / (un)mask / acknowledge NMI. This NMI controller is separated and independent from GIC. This patch adds a new irqchip to manage NMI. Signed-off-by: Carlo Caione <carlo@caione.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sunxi@googlegroups.com Cc: mark.rutland@arm.com Cc: hdegoede@redhat.com Link: http://lkml.kernel.org/r/1395256879-8475-2-git-send-email-carlo@caione.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>	2014-03-26 01:00:50 +01:00