Commit Graph

1034 Commits

Author SHA1 Message Date
Sean Paul
bc537a9cc4 Merge drm/drm-next into drm-misc-next
Now that 4.19-rc1 is cut, backmerge it into -misc-next.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-08-27 10:00:03 -04:00
Daniel Vetter
e43b9082ab drm/msm: Remove unecessary dma_fence_ops
dma_fence_default_wait is the default now, same for the trivial
enable_signaling implementation.

v2: Also remove the relase hook, dma_fence_free is the default.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Rob Clark <robdclark@gmail.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: freedreno@lists.freedesktop.org
Link: https://patchwork.freedesktop.org/patch/msgid/20180704092909.6599-3-daniel.vetter@ffwll.ch
2018-08-17 11:22:25 +02:00
Colin Ian King
546907de99 drm/msm: a6xx: fix spelling mistake: "initalization" -> "initialization"
Trivial fix to spelling mistake in dev_err message and comment

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-10 18:49:18 -04:00
Jordan Crouse
4b565ca5a2 drm/msm: Add A6XX device support
Add support for the A6XX family of Adreno GPUs. The biggest addition
is the GMU (Graphics Management Unit) which takes over most of the
power management of the GPU itself but in a ironic twist of fate
needs a goodly amount of management itself. Add support for the
A6XX core code, the GMU and the HFI (hardware firmware interface)
queue that the CPU uses to communicate with the GMU.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-10 18:49:18 -04:00
Rob Clark
2d75632253 drm/msm: update generated headers
Resync generated headers to pull in a6xx registers.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-10 18:49:18 -04:00
Jordan Crouse
2c087a3366 drm/msm/adreno: Load the firmware before bringing up the hardware
Failure to load firmware is the primary reason to fail adreno_load_gpu().
Try to load it first before going into the hardware initialization code and
unwinding it. This is important for a6xx because the GMU gets loaded from
the runtime power code and it is more costly to fail in that path because
of missing firmware.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-10 18:49:18 -04:00
Jordan Crouse
8e54eea503 drm/msm: Add a helper function to parse clock names
Add a helper function to parse the clock names and set up
the bulk data so we can take advantage of the bulk clock
functions instead of rolling our own. This is added
as a helper function so the upcoming a6xx GMU code can
also take advantage of it.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-10 18:49:18 -04:00
Jeykumar Sankaran
77a209cd71 drm/msm/disp/dpu: fix early dereference of physical encoder
This change validates the physical encoder before it
is dereferenced.

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-10 18:49:18 -04:00
Kees Cook
bec2dd6969 drm/msm/adreno: Remove VLA usage
In the quest to remove all stack VLA usage from the kernel[1], this
switches to using a kasprintf()ed buffer. Return paths are updated
to free the allocation.

[1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.com

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-05 10:07:09 -04:00
Souptick Joarder
a5f74ec7d3 gpu: drm: msm: Change return type to vm_fault_t
Use new return type vm_fault_t for fault handler. For
now, this is just documenting that the function returns
a VM_FAULT value rather than an errno. Once all instances
are converted, vm_fault_t will become a distinct type.

Ref- commit 1c8f422059 ("mm: change return type to vm_fault_t")

Previously vm_insert_mixed() returns err which driver
mapped into VM_FAULT_* type. The new function
vmf_insert_mixed() will replace this inefficiency by
returning VM_FAULT_* type.

vmf_error() is the newly introduce inline function
in 4.17-rc6.

Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com>
Reviewed-by: Matthew Wilcox <mawilcox@microsoft.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-03 09:53:36 -04:00
Colin Ian King
3e91a8b5c1 drm/msm/disp/dpu: fix two spelling mistakes
Trivial fix to spelling mistake in error messages
"diable" -> "disable"
"cliend" -> "client"

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-31 09:25:02 -04:00
Jordan Crouse
fba33cae6a drm/msm/disp/dpu: Mark a handful of functions as static
Mark a number of static functions that are only unsed in the file
that defines them and remove the prototypes from the headers where
needed.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
Jordan Crouse
f2c9a924c1 drm/msm/disp/dpu: Remove unused functions from dpu_formats.c
Remove dpu_format_get_block_size, dpu_format_get_framebuffer_size,
dpu_set_scaler_v2 and dpu_copy_formats they are unused and unneeded.

Signed-off-by: Jordan Crouse <jcrouse@codeauorora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
Jordan Crouse
d9c7440dad drm/msm/disp/dpu: Remove dpu_kms_utils
None of the functions in dpu_kms_utils.c seem to be used so
remove them all.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
Jordan Crouse
c17aeda0b0 drm/msm/disp/dpu: Remove unused code from drm_crtc.c
Remove a chunk of unused code from drm_crtc.c, namely
dpu_crtc_res_add, dpu_crtc_res_get, dpu_crtc_res_put
and associated static functions.

Also zap dpu_crtc_event_queue(), helper functions
and members.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
Jordan Crouse
2c7b48e726 drm/msm/disp/dpu: Remove unused code from drm_encoder.c
Remove dpu_encoder_check_mode and dpu_encoder_helper_hw_release
frmo drm_encoder.c as they appear to be unused.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
Gustavo A. R. Silva
aff24cd1f5 drm/msm: Replace PTR_RET with PTR_ERR_OR_ZERO
PTR_RET is deprecated, use PTR_ERR_OR_ZERO instead.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
Arnd Bergmann
78918cd0ee drm/msm: mark PM functions as __maybe_unused
The suspend/resume functions are not referenced when power
management is disabled:

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c:1288:12: error: 'dpu_runtime_resume' defined but not used [-Werror=unused-function]
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c:1261:12: error: 'dpu_runtime_suspend' defined but not used [-Werror=unused-function]

This marks them as __maybe_unused to let the compiler
drop the functions without complaining.

Fixes: 591225291ca2 ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
zhong jiang
f4b0f66daf drm/msm/dpu: fix mismatch in function argument.
Fix the sparse error. the dpu_rm_init declaration is not consistent
with the implement.

Signed-off-by: zhong jiang <zhongjiang@huawei.com>
[robclark un-typo'd subject line]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
Arnd Bergmann
3530a17f4d drm/msm/gpu: avoid deprecated do_gettimeofday
All users of do_gettimeofday() have been removed, but this one recently
crept in, along with an incorrect printing of the microseconds portion.

This converts it to using ktime_get_real_timespec64() as a direct
replacement, and adds the leading zeroes. I considered using monotonic
times (ktime_get()) instead, but as this timestamp appears to only
be used for humans rather than compared with other timestamps, the
real time domain is probably good enough.

Fixes: e43b045e2c82 ("drm/msm/gpu: Capture the state of the GPU")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
Sean Paul
a6bcddbc2e drm/msm: dsi: Handle dual-channel for 6G as well
This fixes up a collision between introducing dual-channel support and
the dsi refactors. This patch applies the same dual-channel
considerations and pclk calculations to both v2 and 6G, with a bit of
abstracting for good measure.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
Sean Paul
41a8e8865a drm/msm: dpu: Use clock-names instead of assigned-clock-names
In these cases, we want to enumerate _all_ clocks, not just the ones
that are assigned a rate.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
Sean Paul
2c1f748d00 drm/msm: dpu: Use 'vsync' instead of 'vsync_clk' in cmdmode encoder
Should work with the legacy handling in of, but we shouldn't rely on
that.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:12 -04:00
Jordan Crouse
cdb95931de drm/msm/gpu: Add the buffer objects from the submit to the crash dump
For hangs, dump copy out the contents of the buffer objects attached to the
guilty submission and print them in the crash dump report.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:10 -04:00
Jordan Crouse
50f8d21863 drm/msm/adreno: Add a5xx specific registers for the GPU state
HLSQ, SP and TP registers are only accessible from a special
aperture and to make matters worse the aperture is blocked from
the CPU on targets that can support secure rendering. Luckily the
GPU hardware has its own purpose built register dumper that can
access the registers from the aperture. Add a5xx specific code
to program the crashdumper and retrieve the wayward registers
and dump them for the crash state.

Also, remove a block of registers the regular CPU accessible
list that aren't useful for debug which helps reduce the size
of the crash state file by a goodly amount.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:06 -04:00
Jordan Crouse
43a56687d1 drm/msm/adreno: Add ringbuffer data to the GPU state
Add the contents of each ringbuffer to the GPU state and dump the
data in the crash file encoded with ascii85. To save space only
the used portions of the ringbuffer are dumped.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:03 -04:00
Jordan Crouse
bcf1d9fa5d drm/msm/adreno: Convert the show/crash file format
Convert the format of the 'show' debugfs file and the crash
dump to a  format resembling YAML. This should be easier to
parse and be more flexible for future changes and expansions.

v2: Use a standard .rst for the msm crashdump documentation

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:50:00 -04:00
Jordan Crouse
c0fec7f562 drm/msm/gpu: Capture the GPU state on a GPU hang
Capture the GPU state on a GPU hang and store it for later playback
via the devcoredump facility. Only one crash state is stored at a
time on the assumption that the first hang is usually the most
interesting. The existing crash state can be cleared after capturing
it and then a new one will be captured on the next hang.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:49:56 -04:00
Jordan Crouse
65a3c2748e drm/msm/gpu: Rearrange the code that collects the task during a hang
Do a bit of cleanup to prepare for upcoming changes to pass the
hanging task comm and cmdline to the crash dump function.

v2: Use GFP_ATOMIC while holding the rcu lock per Chris Wilson

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:49:52 -04:00
Jordan Crouse
4f776f4511 drm/msm/gpu: Convert the GPU show function to use the GPU state
Convert the existing GPU show function to use the GPU state to
dump the information rather than reading it directly from the hardware.
This will require an additional step to capture the state before
dumping it for the existing nodes but it will greatly facilitate reusing
the same code for dumping a previously captured state from a GPU hang.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:49:48 -04:00
Jordan Crouse
e00e473d98 drm/msm/gpu: Capture the state of the GPU
Add the infrastructure to capture the current state of the GPU and
store it in memory so that it can be dumped later.

For now grab the same basic ringbuffer information and registers
that are provided by the debugfs 'gpu' node but obviously this should
be extended to capture a much larger set of GPU information.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-30 08:49:45 -04:00
Rajesh Yadav
2f2eb723b5 drm/msm: rework vblank event handling in dpu_crtc
The vblank on/off calls were missing in dpu_crtc
leading to "driver forgot to call drm_crtc_vblank_off()"
warning while entering suspend state.
Also handle the state update completion event for
a crtc being disabled in current atomic commit.

This patch depends on https://www.spinics.net/lists/dri-devel/msg182402.html

Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:45:05 -04:00
Jeykumar Sankaran
25fdd5933e drm/msm: Add SDM845 DPU support
SDM845 SoC includes the Mobile Display Sub System (MDSS) which is a
top level wrapper consisting of Display Processing Unit (DPU) and
display peripheral modules such as Display Serial Interface (DSI)
and DisplayPort (DP).

MDSS functions essentially as a back-end composition engine. It blends
video and graphic images stored in the frame buffers and scans out the
composed image to a display sink (over DSI/DP).

The following diagram represents hardware blocks for a simple pipeline
(two planes are present on a given crtc which is connected to a DSI
connector):

       MDSS
      +---------------------------------+
      | +-----------------------------+ |
      | | DPU                         | |
      | |  +--------+  +--------+     | |
      | |  |  SSPP  |  |  SSPP  |     | |
      | |  +----+---+  +----+---+     | |
      | |       |           |         | |
      | |  +----v-----------v---+     | |
      | |  |  Layer Mixer (LM)  |     | |
      | |  +--------------------+     | |
      | |  +--------------------+     | |
      | |  |    PingPong (PP)   |     | |
      | |  +--------------------+     | |
      | |  +--------------------+     | |
      | |  |  INTERFACE (VIDEO) |     | |
      | |  +---+----------------+     | |
      | +------|----------------------+ |
      |        |                        |
      | +------|---------------------+  |
      | |      | DISPLAY PERIPHERALS |  |
      | |  +---v-+      +-----+      |  |
      | |  | DSI |      |  DP |      |  |
      | |  +-----+      +-----+      |  |
      | +----------------------------+  |
      +---------------------------------+

The number of DPU sub-blocks (i.e. SSPPs, LMs, PP blocks and INTFs)
depends on SoC capabilities.

Overview of DPU sub-blocks:
---------------------------
* Source Surface Processor (SSPP):
 Refers to any of hardware pipes like ViG, DMA etc. Only ViG pipes are
 capable of performing format conversion, scaling and quality improvement
 for source surfaces.

* Layer Mixer (LM):
 Blend source surfaces together (in requested zorder)

* PingPong (PP):
 This block controls frame done interrupt output, EOL and EOF generation,
 overflow/underflow control.

* Display interface (INTF):
 Timing generator and interface connecting the display peripherals.

DRM components mapping to DPU architecture:
------------------------------------------
PLANEs maps to SSPPs
CRTC maps to LMs
Encoder maps to PPs, INTFs

Data flow setup:
---------------
MDSS hardware can support various data flows (e.g.):
  - Dual pipe: Output from two LMs combined to single display.
  - Split display: Output from two LMs connected to two separate
                   interfaces.

The hardware capabilities determine the number of concurrent data paths
possible. Any control path (i.e. pipeline w/i DPU) can be routed to any
of the hardware data paths. A given control path can be triggered,
flushed and controlled independently.

Changes in v3:
- Move msm_media_info.h from uapi to dpu/ subdir
- Remove preclose callback dpu (it's handled in core)
- Fix kbuild warnings with parent_ops
- Remove unused functions from dpu_core_irq
- Rename mdss_phys to mdss
- Rename mdp_phys address space to mdp
- Drop _phys from vbif and regdma binding names

Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org>
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[robclark minor rebase]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:45:04 -04:00
Jeykumar Sankaran
036bfeb33b drm/msm: Add pm_suspend/resume callbacks to msm_kms
Used by the dpu driver for custom suspend/resume.

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul split this out of the megapatch]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:16 -04:00
Jeykumar Sankaran
2b7ac1a898 drm/msm: Add .commit() callback to msm_kms functions
Called right before wait_for_commit_done() to perform kickoff for
active crtcs.

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul split this out of the megapatch]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:16 -04:00
Jeykumar Sankaran
7305a0ceec drm/msm: #define MAX_<OBJECT> in msm_drv.h
dpu uses these elsewhere in the driver (in addition to increasing
MAX_PLANES, that'll come later), so pull them out into #define.

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul pulled this out of the dpu megapatch]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:16 -04:00
Jeykumar Sankaran
77050c3feb drm/msm: Use labels for unwinding in the error path
This simplifies cleanup, to make sure nothing drops out in case of
error.

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul split out of dpu megapatch and renamed labels]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:16 -04:00
Jeykumar Sankaran
aaded2e3a1 drm/msm: #define MDP version numbers
Useful for incoming DPU support

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul split this from the dpu megapatch]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:16 -04:00
Sean Paul
74312fc734 drm/msm: Clean up dangling atomic_wq
I missed this during the atomic conversion

Changes in v3:
- None

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:15 -04:00
Abhinav Kumar
2d0b10fc51 drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor
Make the pclk_rate u64 to accommodate higher pixel clock
rates.

Changes in v3:
- Converted pclk_rate to u32 (Archit)
- Rebase on dsi cleanup set in msm-next

Cc: Sibi Sankar <sibis@codeaurora.org>
Cc: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:15 -04:00
Jeykumar Sankaran
bb676df12b drm/msm: enable zpos normalization
Enable drm core zpos normalization for planes.

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:15 -04:00
Rajesh Yadav
bc3220be22 drm/msm/mdp5: subclass msm_mdss for mdp5
SoCs having mdp5 or dpu have identical tree like
device hierarchy where MDSS top level wrapper manages
common power resources for all child devices.

Subclass msm_mdss so that msm_mdss includes common defines
and mdp5/dpu mdss derivations to include any extensions.

Add mdss helper interface (msm_mdss_funcs) to msm_mdss
base for mdp5/dpu mdss specific implementation calls.

This change subclasses msm_mdss for mdp5, dpu specific
changes will be done separately.

Changes in v3:
- Added Archit's R-b

Reviewed-by: Archit Taneja <architt@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org>
[seanpaul rebased on msm-next and resolved conflicts]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:15 -04:00
Sean Paul
a5c6b59904 drm/msm: Move wait_for_vblanks into mdp complete_commit() hooks
DPU doesn't use this, so push it into the mdp drivers.

Changes in v3:
- None

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:15 -04:00
Abhinav Kumar
425a2d24d5 drm/msm/dsi: set encoder mode for DRM bridge explicitly
Currently, DRM bridge for DPU relies on the default video
mode setting to set the encoder mode.

Add an explicit call to set the encoder mode for bridges.

Changes in v3:
- None

Reviewed-by: Archit Taneja <architt@codeauorora.org>
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:14 -04:00
Rajesh Yadav
7a296796fd drm/msm/dsi: initialize postdiv_lock before use for 10nm pll
postdiv_lock spinlock was used before initialization
for 10nm pll. It causes following spin_bug:
	"BUG: spinlock bad magic on CPU#0".
Initialize spinlock before its usage.

Changes in v3:
- Added Archit's R-b

Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:14 -04:00
Chandan Uddaraju
8b03ad30e3 drm/msm/dsi: Use one connector for dual DSI mode
Current DSI driver uses two connectors for dual DSI case even
though we only have one panel. Fix this by implementing one
connector/bridge for dual DSI use case. Use master DSI
controllers to register one connector/bridge.

Changes in v3:
- None

Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
[seanpaul removed unused local var causing a build warning]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:14 -04:00
Chandan Uddaraju
ed9976a09b drm/msm/dsi: adjust dsi timing for dual dsi mode
For dual dsi mode, the horizontal timing needs
to be divided by half since both the dsi controllers
will be driving this panel. Adjust the pixel clock and
DSI timing accordingly.

Changes in v3:
- Added Archit's R-b
- Rebase on dsi cleanup set in msm-next

Cc: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-26 10:40:14 -04:00
Carsten Behling
23f9455157 drm/msm/mdp5: negative x/y in cursor move
modesetting X11 driver may provide negative x/y cordinates in
mdp5_crtc_cursor_move call when rotation is enabled.

Cursor buffer can overlap down to its negative width/height.

ROI has to be recalculated for negative x/y indicating using the
lower/right corner of the cursor buffer and hotspot must be set
in MDP5_LM_CURSOR_XY_SRC_Y MDP5_LM_CURSOR_XY_SRC_X.

Signed-off-by: Carsten Behling <carsten.behling@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-25 07:51:05 -04:00
Sibi Sankar
8f7ca54090 drm/msm/dsi: replace version checks with helper functions
Replace version checks with the helper functions bound to
cfg_handler for DSI v2, DSI 6G 1.x and DSI 6G v2.0+ controllers

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-25 07:51:05 -04:00
Sibi Sankar
c4d8cfe516 drm/msm/dsi: add implementation for helper functions
Add dsi host helper function implementation for DSI v2
DSI 6G 1.x and DSI 6G v2.0+ controllers

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-07-25 07:51:04 -04:00