1. Enable accelerated AES (Security SubSystem) on Exynos4412-based boards.
2. Enable HDMI CEC on Exynos4412-based Odroid.
3. Add regulator supplies for eMMC/SD on Odroid XU3/XU4.
4. Fix DTC unit name warnings.
5. Merge topic branch of new Artik5 board.
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Merge tag 'samsung-dt-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "Samsung Device Tree updates and improvements for v4.7" from Krzysztof Kozlowski:
1. Enable accelerated AES (Security SubSystem) on Exynos4412-based boards.
2. Enable HDMI CEC on Exynos4412-based Odroid.
3. Add regulator supplies for eMMC/SD on Odroid XU3/XU4.
4. Fix DTC unit name warnings.
5. Merge topic branch of new Artik5 board.
* tag 'samsung-dt-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s5p: Fix DTC unit name warnings in SMDKv210 board
ARM: dts: exynos: Fix DTC unit name warnings in Exynos5440
ARM: dts: exynos: Fix DTC unit name warnings in SMDK5420
ARM: dts: exynos: Fix DTC unit name warnings in Peach Pit
ARM: dts: exynos: Fix DTC unit name warnings in Exynos542x
ARM: dts: exynos: Fix DTC unit name warnings in Exynos5250
ARM: dts: exynos: Fix DTC unit name warnings in Exynos4x12
ARM: dts: exynos: Fix DTC unit name warnings in Trats2 board
ARM: dts: exynos: Fix DTC unit name warnings in Exynos4
ARM: dts: exynos: Fix DTC unit name warnings in Exynos3250
ARM: dts: exynos: Fix DTC unit name warnings in cros-adc-thermistors
ARM: dts: exynos: Add eMMC and SD regulator supplies to Odroid XU3/XU4
ARM: dts: exynos: Enable the HDMI CEC device on Exynos4412 Odroid boards
ARM: dts: exynos: Add node for the HDMI CEC device to exynos4
ARM: dts: exynos: Add HDMI CEC pin definition to exynos4 pinctrl
ARM: dts: exynos: Enable SSS on Odroid X/X2/U3 family
ARM: dts: exynos: Enable SSS on Trats2
ARM: dts: exynos: Add Security SubSystem node to Exynos4
Merge necessary new clocks from Sylwester (used by new board) and add support
for Exynos3250-based Artik5 board.
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Merge tag 'samsung-dt-exynos3250-artik5-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "Topic branch for Device Tree changes for Exynos 3250 for v4.7" from Krzysztof Kozlowski:
Merge necessary new clocks from Sylwester (used by new board) and add support
for Exynos3250-based Artik5 board.
* tag 'samsung-dt-exynos3250-artik5-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add MSHC2 DT node for SD card for exynos3250-artik5-eval board
ARM: dts: exynos: Add exynos3250-artik5 dtsi file for ARTIK5 module
ARM: dts: exynos: Add MSHC2 DT node for Exynos3250 SoC
ARM: dts: exynos: Add UART2 DT node for Exynos3250 SoC
ARM: dts: exynos: Add initial gpio setting of MMC2 device for exynos3250-monk
ARM: dts: exynos: Add initial pin configuration for exynos3250-rinato
clk: samsung: exynos3250: Add MMC2 clock
clk: samsung: exynos3250: Add UART2 clock
dt-bindings: Add the clock id of UART2 and MMC2 for Exynos3250
DT changes for 4.7.
Also included is a DRM patch necessary to prevent regressions when
simplefb and vc4 drivers are both present. The patch was suggested by
the simplefb maintainer as the solution agreed upon at ELCE 2014, and
was acked by the DRM maintainer for merging through this tree.
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Merge tag 'bcm2835-dt-next-2016-04-20' into devicetree/next
This pull request brings in VC4 devicetree support and the other minor
DT changes for 4.7.
Also included is a DRM patch necessary to prevent regressions when
simplefb and vc4 drivers are both present. The patch was suggested by
the simplefb maintainer as the solution agreed upon at ELCE 2014, and
was acked by the DRM maintainer for merging through this tree.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Controller is present on every BCM4708* board but only few devices have
serial flash attached so mark it as disabled by default.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The SSP0/SPI1 and SSP1/SPI2 shared pinout and should be disable by
default.
Board specific dts should enable them, as needed.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Preparatory change prior to disabling SSPx controllers
by default in the shared LPC32xx DTSI file.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change adds clock properties to spi peripheral devices,
clock ids are taken from dt-bindings/clock/lpc32xx-clock.h
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Taken from the datasheet.
Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for battery level reading on the Nexus7 by
enabling the bq27541 driver in the nexus7 dts
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Arnd Bergmann <arnd.bergmann@linaro.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Andy Gross <agross@codeaurora.org>
Cc: Vinay Simha BN <simhavcs@gmail.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Stephen Boyd <stephen.boyd@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to on board LIS3MDLTR magnetometer.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds spi nodes required to provide spi bus support on LS
expansion.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds nodes required to enable 4 i2c buses on the board which
are connected to various sensors and eeprom.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to 4 user leds, wlan and bt led on board.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch enables sata and regulators required to get on board sata
working.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds pcie and regulators required to get on board ATL1C
ethernet working.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds usb host and otg support on board with required
regulators.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds eMMC and SD card support with card detect and adding
required regulators.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds pmic regulator supplies connected on the board.
Rest of the invidual regulators would be added as and when required by
the devices.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to DB600c with basic serial ports.
DB600c is based on APQ8064.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to gsbi7 i2c which is used in some of the new
boards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to gsbi1 uart and its pinctrls nodes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch fixes pinctrls for spi and i2c nodes whose default and sleep
states are together, which is incorrect.
Without this patch i2c/spi would not be functional.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
One part of the efs memory region is used specifically for sharing file system
buffers between the apps and modem cpus (aka rmtfs), so better reflect this
split.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the blsp_dma node to the device tree and the required
properties for using DMA with serial
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the crypto nodes to the ipq4019 device tree, it also adds the
BAM node used by crypto as well which the driver currently requires to
operate properly
The crypto driver itself depends on some other patches to qcom_bam_dma
to function properly:
https://lkml.org/lkml/2015/12/1/113
CC: Stanimir Varbanov <svarbanov@mm-sol.com>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds some operating points for cpu frequeny scaling
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This will allow boards to enable the I2C bus
CC: Sricharan R <srichara@qti.qualcomm.com>
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This will allow boards to enable the SPI bus
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This will allow these types of boards to be rebooted.
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This will allow boards to enable watchdog support
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the required device tree nodes to bring up the
secondary cores on the ipq4019 SoC.
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Initial board support dts files for DK01 board.
Signed-off-by: Senthilkumar N L <snlakshm@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add initial dts files and SoC support for IPQ4019
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds the CPU node of the BCM2835 into the DT.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
The ARM TWD interrupt is a private peripheral interrupt (PPI), and per
the ARM GIC documentation, whether the type for PPIs can be set is
IMPLEMENTATION DEFINED.
For R-Car H1 devices the PPI type cannot be set, and so when we attempt
to set the type for the ARM TWD interrupt it fails. This has gone
unnoticed because it fails silently, and because we cannot re-configure
the type it has had no impact. Nevertheless fix the type for the TWD
interrupt so that it matches the hardware configuration.
Based on patches by Jon Hunter for Tegra20/30 and OMAP4.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The ARM TWD interrupt is a private peripheral interrupt (PPI), and per
the ARM GIC documentation, whether the type for PPIs can be set is
IMPLEMENTATION DEFINED.
For SH-Mobile AG5 devices the PPI type cannot be set, and so when we
attempt to set the type for the ARM TWD interrupt it fails. This has
gone unnoticed because it fails silently, and because we cannot
re-configure the type it has had no impact. Nevertheless fix the type
for the TWD interrupt so that it matches the hardware configuration.
Based on patches by Jon Hunter for Tegra20/30 and OMAP4.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add IIC nodes to r8a7794 device tree.
Based on similar work for the r8a7793 by Laurent Pinchart.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add IIC clocks to r8a7794 device tree.
Based on similar work for the r8a7790 by Wolfram Sang.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
The R-Car CAN controllers can derive the CAN bus clock not only from their
peripheral clock input (clkp1) but also from the other internal clock
(clkp2) and external clock fed on CAN_CLK pin. Describe those clocks in
the device tree along with the USB_EXTAL clock from which clkp2 is
derived.
Based on work by Sergei Shtylyov for the r8a7791 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add CAN nodes to r8a7794 device tree.
Based on work by Sergei Shtylyov for the r8a7791 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Add CAN nodes to r8a7794 device tree.
Based on work by Sergei Shtylyov for the r8a7791 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Based on Rev. 2.00 of the R-Car Gen2 datasheet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This reverts commit 19417bd9c5 ("ARM: dts: porter: Enable SCIF_CLK
frequency and pins") as according to
http://elinux.org/File:R-CarM2-KOELSCH_PORTER-B_PORTER_C_Comparison.pdf
the external oscillator for SCIF_CLK is not mounted on the porter boards.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
clk_get on a disabled clock node will return EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their clocks property.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them to prevent this.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The official UDOO board kit has 7 and 15.6 inch touchscreen LCD panels
as options.
This patch adds support for 7 inch panel only, but the 15.6 inch one
should be easy to add using the same regulator, backlight device and
LVDS channel.
Since this panel is an option for UDOO board it is disabled by default
and can be enabled (for example) by the following U-Boot commands:
fdt set backlight status okay
fdt set panelchan status okay
fdt set panel7 status okay
fdt set touchscreenp7 status okay
The LVDS channels is also disabled by default to avoid warning from its
driver.
Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the Keypad Port (KPP) devicetree nodes for IMX31 and IMX35 SOC.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Probably most of NXP LPC32xx boards have 13MHz main oscillator and
therefore for HCLK PLL and ARM core clock rate default hardware
setting is 16 * 13MHz = 208MHz, however a user may vary HCLK PLL/ARM
core rate from 156MHz to about 266MHz for 13MHz clock source.
The change explicitly defines HCLK PLL output rate to default 208MHz
to overwrite any settings done by a bootloader, if needed it can be
redefined in a board DTS file.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
DRA72-EVM now has an upgrade to Rev C with SR2.0 silicon. As part of
this change, a few updates were factored in that were software
incompatible with previous board in few areas:
- We now use DP83867 ethernet phy instead of older DP838865 which fails
in certain use cases.
- Two Ethernet ports now instead of the single one in rev B.
- polarities changed for certain pcf gpios
- Due to SoC phy current requirements, VDDA supplies are split between
ldo3 and ldo2 (ldo2 was previously unused). NOTE: DSS (VDDA_VIDEO) is
still supplied by ldo5, HDMI is now supplied by LDO2 instead of using
LDO3.
NOTE: It does not make much sense to spin off a new board compatible
flag since there is no real benefit for the same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ChiliSOM has TPS65217's PWR_EN pin connected to AM335x PMIC_POWER_EN
pin. Processor's PMIC_POWER_EN is controlled by it's internal RTC, hence
RTC subsystem is responsible for proper board poweroff sequence.
This change enables complete poweroff sequence for ChiliBoard, switching
PMIC's state from ACTIVE to SLEEP.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ChiliSOM has 2 Ethernet subsystems with different types of possibly used
PHY interfaces (i.e. MII, RMII, GMII, RGMII). Current code configured
pinmux for RMII on 1st Ethernet subsystem and enabled Ethernet MAC with
1 slave for all boards which use ChiliSOM.
This change moves pinmux configuration of 1st Ethernet subsystem to
ChiliBoard description, as this is board-specific.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
uart0 configuration code has been in SOM. However, it is possible to
use all (or none) of 6 uart's of AM335x processor present on ChiliSOM.
This fix moves declaration of uart0 from ChiliSOM to ChiliBoard, because
use of uart is strictly board-specific.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds the DMA engine to the Nomadik and assigns the UART
DMA channels. Both slave DMA for UARTs and the memcpy engine
works fine, tested on the Nomadik NHK15.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The LIS3LV02DL accelerometer on the Nomadik NHK15 can generate
IRQs by the DRDY line. Map this in the DTS file and set up the
pin as input to the SoC.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This platform is based on a Marvell 88E6282 SoC and 88E6171 switch.
[gregory.clement@free-electrons.com: fix block comment style]
Signed-off-by: Bert Vermeulen <bert@biot.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add dts file to support Buffalo/Revogear Kurobox-Pro, which is marvell
orion5x based 3.5" HDD NAS.
It's a quite old product and already discontinued. So there's no
official website for it. But it was an early product which used marvell
orion5x 88F5182 chipset, it's popular in the community.
Some unofficial site:
- http://buffalo.nas-central.org/wiki/Category:KuroboxPro
- http://nice.kaze.com/KUROPRO_ProductSpecifications.pdf
This device tree is based on the board file:
arch/arm/mach-orion5x/kurobox_pro-setup.c
However, the probing order of NAND and JEDEC-Flash are different from
the original board file, this results in incompatible minor number
for a few /dev/mtdX and /dev/mtdblockX devices.
So I still want to keep the board file for the time being.
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The regulator has a reg property so include it in the unit name.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
gpio-i2c does not have a reg property, just a list of gpios.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
PCIe has a range property, so the unit name should contain an address.
Make use of the label to enable individual PCIe busses. Also, fixup
the synology dtsi file which added a label pcie2 rather than using the
existing pcie1 label.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
PHYs have an address on the mdio bus. So the unit name should contain
an address. This is complicated in that some .dtsi files contain the
node, but the reg is set in the .dts file. In this case, use the
abstract address X.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The dsa node does not have a reg property, so remove the address from
the unit name.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
leds don't have a reg property, so remove the address from the unit name.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The DT compiler is now warning about unit names with addresses but not
reg property. Fix all the gpio-key buttons which causes warnings.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
da850 has two I2C controllers, but the node for i2c1 was missing.
Add node for i2c1 controller and i2c1 pinmux pins.
Signed-off-by: Petr Kulhavy <petr@barix.com>
[nsekhar@ti.com: fix indentation]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
TI has been using the physical address in DT after the @ in device nodes.
The device tree convention is to use the same address that is used for
the reg property. This updates all davinci DT files to use the proper
convention.
Signed-off-by: David Lechner <david@lechnology.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The gpio node is missing the mandatory property #gpio-cells, which is
causing runtime errors when using GPIOs e.g. with gpio-leds or gpio-keys:
"could not get #gpio-cells for /soc/gpio@1e26000"
This fixes the problem and adds the missing parameter.
The value is 2 according to the gpio-davinci.txt binding.
Signed-off-by: Petr Kulhavy <petr@barix.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
as well as general display+hdmi support on rk3036. With the Analogix
DP support, Veyron Chromeboks can now finally use their internal
display.
Other than this big improvement we have thermal support on the rk3228,
a long time missing binding document for the General Register Files
block, better operating points for Veyron devices and a bunch of fixes
with parts stemming from warnings that new dtc version can generate.
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Merge tag 'v4.7-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
A lot display-controller nodes for DSI and the Analogix DP on rk3288
as well as general display+hdmi support on rk3036. With the Analogix
DP support, Veyron Chromeboks can now finally use their internal
display.
Other than this big improvement we have thermal support on the rk3228,
a long time missing binding document for the General Register Files
block, better operating points for Veyron devices and a bunch of fixes
with parts stemming from warnings that new dtc version can generate.
* tag 'v4.7-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (27 commits)
ARM: dts: rockchip: move rk3036 memory definition to board files
ARM: dts: rockchip: enable the eDP on rk3288 veyron devices
ARM: dts: rockchip: simple panel and backlight supplies on veyron boards
ARM: dts: rockchip: override edp hpd handling on veyron-pinky and speedy
ARM: dts: rockchip: add rk3288-veyron-minnie backlight and panel settings
ARM: dts: rockchip: add rk3288-veyron-jaq backlight and panel overrides
ARM: dts: rockchip: add core rk3288-veyron backlight and panel nodes
ARM: dts: rockchip: add startup delay to rk3288-veyron panel-regulators
ARM: dts: rockchip: move edp-hpd pin definition into common location
ARM: dts: rockchip: add rk3288 displayport controller node
ARM: dts: rockchip: add rk3288 edp-phy node
ARM: dts: rockchip: add missing unitname to cpu_leakage efuse
ARM: dts: rockchip: drop unneeded properties from mipi node
ARM: dts: rockchip: clean up gpio-keys nodes
ARM: dts: rockchip: fix missing usbphy unit-names
ARM: dts: rockchip: fix rk3288 power-domain unit names
ARM: dts: rockchip: update rk3288-veyron cpu operating points
ARM: dts: rockchip: remove broken-cd from emmc and sdio
ARM: dts: rockchip: enable the tsadc for rk3228 evb
ARM: dts: rockchip: add the thermal main info found on rk3228
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Update SD/MMC node for Arria10
- Update Arria10 with clock and interrupt fields for DMA
- Remove 'phy-addr' from stmmac node
- Remove ethernet node from Cyclone5 DTSI
- Add LEDs/KEYs/SWs support on Sockit
- Add L2 and OCRAM EDAC dts entries
- Add reset control for USB
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Merge tag 'socfpga_dts_for_v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v4.7
- Update SD/MMC node for Arria10
- Update Arria10 with clock and interrupt fields for DMA
- Remove 'phy-addr' from stmmac node
- Remove ethernet node from Cyclone5 DTSI
- Add LEDs/KEYs/SWs support on Sockit
- Add L2 and OCRAM EDAC dts entries
- Add reset control for USB
* tag 'socfpga_dts_for_v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: add reset control for USB
ARM: dts: socfpga: Add Altera Arria10 OCRAM EDAC devicetree entry
ARM: dts: socfpga: Add Altera Arria10 L2 Cache EDAC devicetree entry
ARM: dts: socfpga: Add support for HPS KEYs/SWs on SoCKit
ARM: dts: socfpga: Add support for HPS LEDs on SoCKit
ARM: dts: socfpga: Drop gmac0 from CV dtsi
ARM: dts: socfpga: Drop phy-addr OF property from CV dtsi
ARM: dts: socfpga: Add missing clock and interrupt fields for Arria10 DMA
ARM: dts: socfpga: add the clk-phase property for sd/mmc clock
ARM: dts: socfpga: add cap-sd-highspeed for SD/MMC node
Signed-off-by: Olof Johansson <olof@lixom.net>
- CREG clock controller
- Real Time Clock (RTC)
- Analog peripherals (ADC/DAC)
- Warning fixes for the new dtc compiler
With the CREG clock controller in place it is now possible
to enable the internal RTC on LPC18xx/43xx platforms. The
analog peripherals (ADC/DAC) has also been added here and
enabled on both the EA4357 dev kit and Hitex eval board.
In addition to the new entries there are a fixes for the
DT warnings generated by the new dtc.
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Merge tag 'lpc18xx_dts_for_4.7' of https://github.com/manabian/linux-lpc into next/dt
Device Tree additions for LPC18xx platform
- CREG clock controller
- Real Time Clock (RTC)
- Analog peripherals (ADC/DAC)
- Warning fixes for the new dtc compiler
With the CREG clock controller in place it is now possible
to enable the internal RTC on LPC18xx/43xx platforms. The
analog peripherals (ADC/DAC) has also been added here and
enabled on both the EA4357 dev kit and Hitex eval board.
In addition to the new entries there are a fixes for the
DT warnings generated by the new dtc.
* tag 'lpc18xx_dts_for_4.7' of https://github.com/manabian/linux-lpc:
dt-bindings: phy-lpc18xx-usb-otg: remove unit address from binding
ARM: dts: lpc4350-hitex-eval: fix unit name warnings from dtc
ARM: dts: lpc4357-ea4357: fix unit name warnings from dtc
ARM: dts: lpc18xx: remove unit addresses from creg childs
ARM: dts: armv7-m: add unit name to interrupt-controller
ARM: dts: lpc4350-hitex-eval: add adc1
ARM: dts: lpc4357-ea4357: add dac
ARM: dts: lpc4357-ea4357: add adc0
ARM: dts: lpc18xx: add dac node
ARM: dts: lpc18xx: add adc nodes
ARM: dts: lpc18xx: add rtc node
ARM: dts: lpc18xx: add creg-clk node
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add CLCD panel nodes to PB1176 and PB11MPCore
- Add a DT binding blurb for the Versatile IB2 syscon
- Add DTS files for the (QEMU supported) RealView EB
boards in all variants.
- Add DTS files for the (QEMU supported) RealView PBA8
and PBX-A9 board variants.
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Merge tag 'versatile-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt
Versatile DTS changes, baseline for the v4.7 series:
- Add CLCD panel nodes to PB1176 and PB11MPCore
- Add a DT binding blurb for the Versatile IB2 syscon
- Add DTS files for the (QEMU supported) RealView EB
boards in all variants.
- Add DTS files for the (QEMU supported) RealView PBA8
and PBX-A9 board variants.
* tag 'versatile-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: realview: DT support for the PBA8 and PBX-A9
ARM: dts: realview: support all the RealView EB board variants
ARM: dts: realview: PB1176: define a standard VGA panel
ARM: dts: realview: PB11MPCore: define a standard VGA panel
Documentation/DT: add blurb for IB2 syscon to Versatile
Signed-off-by: Olof Johansson <olof@lixom.net>
clkout1 clock node and its generation tree was missing. Add this based
on the data on TRM and PRCM functional spec.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are few devices that have USB power controlled using GPIO. Linux
USB host driver (bcma-hcd) already supports this by reading vcc-gpio
from DT. Set it properly for all known devices.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit adds definition for cpu_on, cpu_off and cpu_suspend commands.
These definitions must match the corresponding PSCI definitions in
boot monitor.
Having those command and corresponding PSCI support in boot monitor allows
run time CPU hot plugin.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add aliases for SPI nodes, this is required to probe the SPI devices in
U-Boot.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
As reported in [1], rename the k2* dts files to keystone-* files
this will force consistency throughout.
Script for the same (and hand modified for Makefile and MAINTAINERS
files):
for i in arch/arm/boot/dts/k2*
do
b=`basename $i`;
git mv $i arch/arm/boot/dts/keystone-$b;
sed -i -e "s/$b/keystone-$b/g" arch/arm/boot/dts/*[si]
done
NOTE: bootloaders that depend on older dtb names will need to be
updated as well.
[1] http://marc.info/?l=linux-arm-kernel&m=145637407804754&w=2
Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The DCU IP has distinct clock inputs for register access and the
pixel clocks, at least in some implementations. LS1021a seems to
use the same clock, therefore specify the same clock for "dcu"
and "pix".
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Both DSPI have signals SPIn_PCS[0:5] so in summary 6 chip-selects, not 5.
Fix that.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add gpio nodes for ls1021a platform dts file. The gpio
IP block of the ls1021a can be supported by the code
drivers/gpio/gpio-mpc8xxx.c.
The compatible "fsl,qoriq-gpio" is used by gpio driver:
drivers/gpio/gpio-mpc8xxx.c to implement general gpio
functionalities.
The chip-specific compatible "fsl,ls1021a-gpio" may be
used to fix potential gpio IP block errata or other
chip-specific gpio issues.
Signed-off-by: Liu Gang <Gang.Liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The vqmmc supply is not connected to bio supply on the BA16 module.
Hence remove vqmmc-supply property in usdhc3 node.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add SCFG MSI dts node and add msi-parent property to PCIe dts node
that points to the corresponding MSI node.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Tested-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to Documentation/devicetree/bindings/net/fsl-fec.txt the polarity
of "phy-reset-gpios" is assumed to be active-low unless a separate property
"phy-reset-active-high" is available. So replace the inconsistent polarity
description to make the correct active-low reset behavior more obvious.
Signed-off-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit adds support for Rev. B of a Zodiac Inflight Innovations
development board, mainly intended for DSA and ARINC 429 development
work.
Signed-off-by: Cory Tusar <cory.tusar@pid1solutions.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add missing reg properties to AIPS bus and Cortex-A5's PMU unit.
This change avoids the following warnings:
Warning (unit_address_vs_reg): Node /soc/aips-bus@40000000 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@40080000 has a unit
name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@40080000/pmu@40089000
has a unit name, but no reg property
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
