Commit Graph

25110 Commits

Author SHA1 Message Date
Martin Fuzzey
04b41e84ff ARM: i.MX53 Add the cko1, cko2 clock outputs.
These two clocks connect to external pins and can be muxed to
various internal clocks.
They are typically used either for debugging or to provide
clocks to external chips (eg audio codecs).

Currently only the selectable clocks that already exist in the clock tree
have been added.

Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:14 +08:00
Philipp Zabel
02985b9463 ARM i.MX6q: Add GPU, VPU, IPU, and OpenVG resets to System Reset Controller (SRC)
The SRC has auto-deasserting reset bits that control reset lines to
the GPU, VPU, IPU, and OpenVG IP modules. This patch adds a reset
controller that can be controlled by those devices using the
reset controller API.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:13 +08:00
Shawn Guo
7006ba24c2 ARM: imx: do not use regmap_read for ANADIG_DIGPROG
Function imx_anatop_get_digprog() that reads register ANADIG_DIGPROG is
called to identify silicon version.  Users might query silicon version
earlier than regmap subsystem is ready.  For example, imx6q clock driver
query revision in mx6q_clocks_init(), where regmap is not initialized
yet.

Change imx_anatop_get_digprog() to map anatop block and read
ANADIG_DIGPROG in the native way, so that the function can work at very
early stage.

While at it, let's move imx_print_silicon_rev() back to
imx6q_timer_init() to have the message show up a little earlier.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:13 +08:00
Philipp Zabel
32f3b8da22 ARM i.MX6q: set the LDB serial clock parent to the video PLL
On i.MX6q revision 1.1 and later, set the video PLL as parent for
the LDB clock branch. On revision 1.0, the video PLL is useless
due to missing dividers, so keep the default parent (mmdc_ch1_axi).

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:13 +08:00
Philipp Zabel
2df1d026ed ARM i.MX6q: Add audio/video PLL post dividers for i.MX6q rev 1.1
Query silicon revision to determine clock tree and add post
dividers for newer revisions.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:12 +08:00
Philipp Zabel
d19dacb732 ARM i.MX6q: fix ldb di divider and selector clocks
Use imx_clk_mux_flags and imx_clk_divider_flags to set the appropriate
flags for the LDB display interface divider and selector clocks.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:45 +08:00
Philipp Zabel
cc7b633909 ARM i.MX53: fix ldb di divider and selector clocks
Use imx_clk_mux_flags and imx_clk_divider_flags to set the appropriate
flags for the LDB display interface divider and selector clocks.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:45 +08:00
Philipp Zabel
3ce921702b ARM i.MX: Add imx_clk_divider_flags and imx_clk_mux_flags
The default is for dividers to set CLK_SET_PARENT_RATE and for muxes to
not set that flag. In the LDB clock tree, we need the opposite, so add
functions to create divider and mux clocks with configurable flags.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Philipp Zabel
b1a3582dc6 ARM i.MX6q: export imx6q_revision
So it can be used in clk-imx6q.c for revision dependent clock tree setup.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Markus Pargmann
6866310423 ARM: imx27, imx5: Add kconfig selects for cpufreq-cpu0
There are some config options not selected by imx27 and imx5 that are
necessary to use the cpufreq-cpu0 driver.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Philipp Zabel
8ecb167f49 ARM i.MX53: Add GPU clocks to clock tree
This patch adds the missing GPU2D and GPU3D mux and gate clocks,
and the graphics arbiter gate clock.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Fabio Estevam
fcc4f9fc5b ARM: mach-imx: anatop: Include "common.h"
Fix the following sparse warnings:

arch/arm/mach-imx/anatop.c:56:6: warning: symbol 'imx_anatop_pre_suspend' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:62:6: warning: symbol 'imx_anatop_post_resume' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:68:6: warning: symbol 'imx_anatop_usb_chrg_detect_disable' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:78:5: warning: symbol 'imx_anatop_get_digprog' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:86:13: warning: symbol 'imx_anatop_init' was not declared. Should it be static?

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:43 +08:00
Anson Huang
263475d4e0 ARM: imx: enable RBC to support anatop LPM mode
RBC is to control whether some ANATOP sub modules
can enter lpm mode when SOC is into STOP mode, if
RBC is enabled and PMIC_VSTBY_REQ is set, ANATOP
will have below behaviors:

1. Digital LDOs(CORE, SOC and PU) are bypassed;
2. Analog LDOs(1P1, 2P5, 3P0) are disabled;

As the 2P5 is necessary for DRAM IO pre-drive in
STOP mode, so we need to enable weak 2P5 in STOP
mode when 2P5 LDO is disabled.

For RBC settings, there are some rules as below
due to hardware design:

1. All interrupts must be masked during operating
   RBC registers;
2. At least 2 CKIL(32K) cycles is needed after the
   RBC setting is changed.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:43 +08:00
Anson Huang
e7b82d645d ARM: imx: enable periphery well bias for suspend
Enable periphery charge pump for well biasing
at suspend to reduce periphery leakage.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:43 +08:00
Anson Huang
e95dddb34c ARM: imx: enable anatop suspend/resume
Anatop module have sereval configurations for user
to reduce the power consumption in suspend, provide
suspend/resume interface for further use and enable
fet_odrive to reduce CORE LDO leakage during suspend.

As we have a common anatop file, remove all the operations
of anatop module in other files, use anatop interfaces to
do that.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:42 +08:00
Shawn Guo
a862d88d3f The imx cleanup for 3.10:
* Clean up a couple of unneeded function declarations
 * Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well
   as the replacement
 * Remove platform ahci support
 * Clean up unused ARCH/MACH Kconfig symbols
 * Remove a couple of unused files
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Merge tag 'imx-cleanup-3.10' into imx/soc

The imx cleanup for 3.10:

* Clean up a couple of unneeded function declarations
* Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well
  as the replacement
* Remove platform ahci support
* Clean up unused ARCH/MACH Kconfig symbols
* Remove a couple of unused files
2013-04-12 19:00:28 +08:00
Paul Bolle
3442a7b51d ARM: i.MX: remove unused ARCH_* configs
This removes the unused Kconfig options ARCH_MX5, ARCH_MX51,
ARCH_MX53 and MACH_MX21.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 21:07:36 +08:00
Sascha Hauer
e27da53bae ARM i.MX53: remove platform ahci support
The i.MX53 ahci platform support is unused in mainline. To demotivate
people using it just remove it from the tree.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 21:07:20 +08:00
Dirk Behme
e8094b2c17 ARM i.MX6: Fix ldb_di clock selection
According to the recent i.MX6 Quad technical reference manual, mode 0x4 (100b)
of the CCM_CS2DCR register (address 0x020C402C) bits [11-9] and [14-12] select
the PLL3 clock, and not the PLL3 PFD1 540M clock. In our code, the PLL3 root
clock is named 'pll3_usb_otg', select this instead of the 540M clock.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 19:48:09 +08:00
Shawn Guo
2bb4b70b1d ARM: imx: provide twd clock lookup from device tree
While booting from device tree, imx6q used to provide twd clock lookup
by calling clk_register_clkdev() in clock driver.  However, the commit
bd60345 (ARM: use device tree to get smp_twd clock) forces DT boot to
look up the clock from device tree.  It causes the failure below when
twd driver tries to get the clock, and hence kernel has to calibrate the
local timer frequency.

 smp_twd: clock not found -2
 ...
 Calibrating local timer... 396.13MHz.

Fix the regression by providing twd clock lookup from device tree, and
remove the unused twd clk_register_clkdev() call from clock driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 19:46:31 +08:00
Markus Pargmann
75498083e2 ARM: imx35 Bugfix admux clock
The admux clock seems to be the audmux clock as tests show. audmux does
not work without this clock enabled. Currently imx35 does not register a
clock device for audmux. This patch adds this registration. imx-audmux
driver already handles a clock device, so no changes are necessary
there.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Cc: stable@vger.kernel.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 19:46:30 +08:00
Markus Pargmann
cab1e0a36c ARM: clk-imx35: Bugfix iomux clock
This patch enables iomuxc_gate clock. It is necessary to be able to
reconfigure iomux pads. Without this clock enabled, the
clk_disable_unused function will disable this clock and the iomux pads
are not configurable anymore. This happens at every boot. After a reboot
(watchdog system reset) the clock is not enabled again, so all iomux pad
reconfigurations in boot code are without effect.

The iomux pads should be always configurable, so this patch always
enables it.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Cc: stable@vger.kernel.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 19:46:30 +08:00
Linus Torvalds
66ade47423 Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King:
 "Another round of ARM fixes, which include:
   - Fixing a problem with LPAE mapping sections
   - Reporting of some hwcaps on Krait CPUs
   - Avoiding repetitive warnings in the breakpoint code
   - Fixing a build error noticed on Dove platforms with PJ4 CPUs
   - Fix masking of level 2 cache revision.
   - Fixing timer-based udelay()
   - A larger fix for an erratum causing people major grief with Cortex
     A15 CPUs"

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7690/1: mm: fix CONFIG_LPAE typos
  ARM: 7689/1: add unwind annotations to ftrace asm
  ARM: 7685/1: delay: use private ticks_per_jiffy field for timer-based delay ops
  ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB operations)
  ARM: 7682/1: cache-l2x0: fix masking of RTL revision numbering and set_debug init
  ARM: iWMMXt: always enable iWMMXt support with PJ4 CPUs
  ARM: 7681/1: hw_breakpoint: use warn_once to avoid spam from reset_ctrl_regs()
  ARM: 7678/1: Work around faulty ISAR0 register in some Krait CPUs
  ARM: 7680/1: Detect support for SDIV/UDIV from ISAR0 register
  ARM: 7679/1: Clear IDIVT hwcap if CONFIG_ARM_THUMB=n
  ARM: 7677/1: LPAE: Fix mapping in alloc_init_section for unaligned addresses
  ARM: KVM: vgic: take distributor lock on sync_hwstate path
  ARM: KVM: vgic: force EOIed LRs to the empty state
2013-04-03 16:15:17 -07:00
Paul Bolle
4e1db26a0b ARM: 7690/1: mm: fix CONFIG_LPAE typos
CONFIG_LPAE doesn't exist: the correct option is CONFIG_ARM_LPAE, so fix
up the two typos under arch/arm/.

The fix to head.S is slightly scary, but this is just for setting up
an early io-mapping for the serial port when running on a big-endian,
LPAE system. Since these systems don't exist in the wild (at least, I
have no access to one outside of kvmtool, which doesn't provide a serial
port suitable for earlyprintk), then we can revisit the code later if it
causes any problems.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-03 16:45:51 +01:00
Rabin Vincent
b21e023ba4 ARM: 7689/1: add unwind annotations to ftrace asm
Add unwind annotations to the ftrace assembly code so that the function
tracer's stacktracing options (func_stack_trace, etc.) work when
CONFIG_ARM_UNWIND is enabled.

Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-03 16:45:50 +01:00
Will Deacon
6f3d90e556 ARM: 7685/1: delay: use private ticks_per_jiffy field for timer-based delay ops
Commit 70264367a2 ("ARM: 7653/2: do not scale loops_per_jiffy when
using a constant delay clock") fixed a problem with our timer-based
delay loop, where loops_per_jiffy is scaled by cpufreq yet used directly
by the timer delay ops.

This patch fixes the problem in a more elegant way by keeping a private
ticks_per_jiffy field in the delay ops, independent of loops_per_jiffy
and therefore not subject to scaling. The loop-based delay continues to
use loops_per_jiffy directly, as it should.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-03 16:45:50 +01:00
Catalin Marinas
93dc68876b ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB operations)
On Cortex-A15 (r0p0..r3p2) the TLBI/DSB are not adequately shooting down
all use of the old entries. This patch implements the erratum workaround
which consists of:

1. Dummy TLBIMVAIS and DSB on the CPU doing the TLBI operation.
2. Send IPI to the CPUs that are running the same mm (and ASID) as the
   one being invalidated (or all the online CPUs for global pages).
3. CPU receiving the IPI executes a DMB and CLREX (part of the exception
   return code already).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-03 16:45:49 +01:00
Rob Herring
6e7aceeb7c ARM: 7682/1: cache-l2x0: fix masking of RTL revision numbering and set_debug init
Commit b8db6b8 (ARM: 7547/4: cache-l2x0: add support for Aurora L2 cache
ctrl) moved the masking of the part ID which caused the RTL version to be
lost. Commit 6248d06 (ARM: 7545/1: cache-l2x0: make outer_cache_fns a
field of l2x0_of_data) changed how .set_debug is initialized. Both commits
break commit 74ddcdb (ARM: 7608/1: l2x0: Only set .set_debug
on PL310 r3p0 and earlier) which uses the RTL version to conditionally set
.set_debug function pointer. Commit b8db6b8 also caused the printed cache
ID to be missing the version information.

Fix this by reverting how the part number is masked so the RTL version
info is maintained. The cache-id-part DT property does not set the RTL
bits so masking them should have no effect. Also, re-arrange the order
of the function pointer init so the .set_debug function can be overridden.

Reported-by: Paolo Pisati <paolo.pisati@canonical.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-03 16:45:48 +01:00
Russell King
698613b638 ARM: iWMMXt: always enable iWMMXt support with PJ4 CPUs
Jason Cooper reports these build errors:
arch/arm/kernel/built-in.o: In function `iwmmxt_do':
/.../arch/arm/kernel/pj4-cp0.c:36: undefined reference to `iwmmxt_task_release'
/.../arch/arm/kernel/pj4-cp0.c:40: undefined reference to `iwmmxt_task_switch'
make: *** [vmlinux] Error 1

This is caused because the PJ4 code explicitly references the iWMMXt
code, but doesn't require it to be built.  Fix this by ensuring that
iWMMXt is always enabled with PJ4.

Reported-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-03 16:40:33 +01:00
Linus Torvalds
118c9a45fd arm-soc: bug fixes for 3.9-rc5
After a quiet set of fixes for 3.9-rc4, a lot of people woke up and sent
 urgent fixes for 3.9. I pushed back on a number of them that got
 deferred to 3.10, but these are the ones that seemed important.
 
 Regression in 3.9:
 
 - Multiple regressions in OMAP2+ clock cleanup
 - SH-Mobile frame buffer bug fix that merged here because of maintainer MIA
 - ux500 prcmu changes broke DT booting
 - MMCI duplicated regulator setup on ux500
 - New ux500 clock driver broke ethernet on snowball
 - Local interrupt driver for mvebu broke ethernet
 - MVEBU GPIO driver did not get set up right on Orion DT
 - incorrect interrupt number on Orion crypto for DT
 
 Long-standing bugs, including candidates for stable:
 
 - Kirkwood MMC needs to disable invalid card detect pins
 - MV SDIO pinmux was wrong on Mirabox
 - GoFlex Net board file needs to set NAND chip delay
 - MSM timer restart race
 - ep93xx early debug code broke in 3.7
 - i.MX CPU hotplug race
 - Incorrect clock setup for OMAP1 USB
 - Workaround for bad clock setup by some old OMAP4 boot loaders
 - Static I/O mappings on cns3xxx since 3.2
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Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC bug fixes from Arnd Bergmann:
 "After a quiet set of fixes for 3.9-rc4, a lot of people woke up and
  sent urgent fixes for 3.9.  I pushed back on a number of them that got
  deferred to 3.10, but these are the ones that seemed important.

  Regression in 3.9:

   - Multiple regressions in OMAP2+ clock cleanup
   - SH-Mobile frame buffer bug fix that merged here because of
     maintainer MIA
   - ux500 prcmu changes broke DT booting
   - MMCI duplicated regulator setup on ux500
   - New ux500 clock driver broke ethernet on snowball
   - Local interrupt driver for mvebu broke ethernet
   - MVEBU GPIO driver did not get set up right on Orion DT
   - incorrect interrupt number on Orion crypto for DT

  Long-standing bugs, including candidates for stable:

   - Kirkwood MMC needs to disable invalid card detect pins
   - MV SDIO pinmux was wrong on Mirabox
   - GoFlex Net board file needs to set NAND chip delay
   - MSM timer restart race
   - ep93xx early debug code broke in 3.7
   - i.MX CPU hotplug race
   - Incorrect clock setup for OMAP1 USB
   - Workaround for bad clock setup by some old OMAP4 boot loaders
   - Static I/O mappings on cns3xxx since 3.2"

* tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: cns3xxx: fix mapping of private memory region
  arm: mvebu: Fix pinctrl for Armada 370 Mirabox SDIO port.
  arm: orion5x: correct IRQ used in dtsi for mv_cesa
  arm: orion5x: fix orion5x.dtsi gpio parameters
  ARM: Kirkwood: fix unused mvsdio gpio pins
  arm: mvebu: Use local interrupt only for the timer 0
  ARM: kirkwood: Fix chip-delay for GoFlex Net
  ARM: ux500: Enable the clock controlling Ethernet on Snowball
  ARM: ux500: Stop passing ios_handler() as an MMCI power controlling call-back
  ARM: ux500: Apply the TCPM and TCDM locations and sizes to dbx5x0 DT
  fbdev: sh_mobile_lcdc: fixup B side hsync adjust settings
  ARM: OMAP: clocks: Delay clk inits atleast until slab is initialized
  ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill
  ARM: msm: Stop counting before reprogramming clockevent
  ARM: ep93xx: Fix wait for UART FIFO to be empty
  ARM: OMAP4: PM: fix PM regression introduced by recent clock cleanup
  ARM: OMAP3: hwmod data: keep MIDLEMODE in force-standby for musb
  ARM: OMAP4: clock data: lock USB DPLL on boot
  ARM: OMAP1: fix USB host on 1710
2013-04-02 08:35:03 -07:00
Arnd Bergmann
06d1d8c857 Merge tag 'v3.9-rc1_cns3xxx_fixes' of git://git.infradead.org/users/cbou/linux-cns3xxx into fixes
From Anton Vorontsov <anton@enomsg.org>:

This tag includes Mac Lin's work to revive CNS3xxx booting:

 "Since commit 0536bdf33f (ARM: move iotable mappings within the vmalloc
 region), [...] the pre-defined iotable mappings is not in the vmalloc
 region. [...] move the iotable mappings into the vmalloc region, and
 merge the MPCore private memory region (containing the SCU, the GIC and
 the TWD) as a single region."

Plus there is a small cosmetic fix, also from Mac Lin.

* tag 'v3.9-rc1_cns3xxx_fixes' of git://git.infradead.org/users/cbou/linux-cns3xxx:
  ARM: cns3xxx: fix mapping of private memory region

[arnd: dropped the cosmetic fix from the merge as it is not needed for 3.9]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-02 16:09:45 +02:00
Shawn Guo
50dc3ef536 ARM: imx: remove mx6q.h
Those stuff defined in mx6q.h is used nowhere now.  Remove the header.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 22:06:01 +08:00
Shawn Guo
585b9f0bfd ARM: imx: remove Makefile.boot
Since we have converted IMX to multiplatform build, Makefile.boot is not
used anyway.  Remove it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 21:51:27 +08:00
Fabio Estevam
9591b8204b ARM: imx: clk-imx27: Do not register peripheral clock for SSI
imx ssi block has two types of clocks:

- ipg: bus clock, the clock needed for accessing registers.
- per: peripheral clock, the clock needed for generating the bit rate.

Currently ssi driver only supports slave mode and thus need only to handle
the ipg clock, because the peripheral clock comes from the master codec.

Only register the ipg clock and do not register the peripheral clock for ssi

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 20:43:21 +08:00
Fabio Estevam
5fe839d997 ARM: imx: avic: Move avic_saved_mask_reg under CONFIG_PM
When building a kernel with CONFIG_PM undefined, the following warning happens:

arch/arm/mach-imx/avic.c:57:12: warning: 'avic_saved_mask_reg' defined but not used [-Wunused-variable]

Move avic_saved_mask_reg definition inside the '#ifdef CONFIG_PM' block to
avoid the warning.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-02 20:43:07 +08:00
Markus Pargmann
180cb7d6ab ARM: imx: Remove cpufreq driver
The old cpufreq driver is not necessary anymore with DT and
cpufreq-cpu0.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-01 16:17:34 +08:00
Shawn Guo
fda7f2267d ARM: imx: remove pl310_get_save_ptr() declaration
Commit a1f1c7e (arm/imx6q: add suspend/resume support) added
declaration for a non-existing function pl310_get_save_ptr() by
mistake.  Remove it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-01 16:17:34 +08:00
Shawn Guo
4e33a0634c ARM: imx: remove duplicated function declaration
Commit 13eed98 (arm/imx6q: add device tree machine support) added
duplicated function declaration for imx_enable_cpu() and
imx_set_cpu_jump().  Remove them.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-01 16:17:34 +08:00
Mac Lin
a3d9052c62 ARM: cns3xxx: fix mapping of private memory region
Since commit 0536bdf33f (ARM: move iotable mappings within the vmalloc
region), the Cavium CNS3xxx cannot boot anymore.

This is caused by the pre-defined iotable mappings is not in the vmalloc
region. This patch move the iotable mappings into the vmalloc region, and
merge the MPCore private memory region (containing the SCU, the GIC and
the TWD) as a single region.

Signed-off-by: Mac Lin <mkl0301@gmail.com>
Signed-off-by: Anton Vorontsov <anton@enomsg.org>
Cc: stable@vger.kernel.org [v3.3+]
2013-03-30 12:05:26 -07:00
Arnd Bergmann
76a254f764 mvebu fixes for v3.9 (round 2)
- mvebu
     - interrupt fix
     - DT pinctrl definition for sdio
 
  - kirkwood
     - chip-delay for GoFlex Net (fix reading nand)
     - set mvsdio unused pins to invalid value for legacy boards (0 is valid)
 
  - orion5x
     - fix typo in gpio parameters
     - use correct irq in dtsi
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Merge tag 'mvebu_fixes_for_v3.9_round2' of git://git.infradead.org/users/jcooper/linux into fixes

From Jason Cooper <jason@lakedaemon.net>:

mvebu fixes for v3.9 (round 2)

 - mvebu
    - interrupt fix
    - DT pinctrl definition for sdio

 - kirkwood
    - chip-delay for GoFlex Net (fix reading nand)
    - set mvsdio unused pins to invalid value for legacy boards (0 is valid)

 - orion5x
    - fix typo in gpio parameters
    - use correct irq in dtsi

* tag 'mvebu_fixes_for_v3.9_round2' of git://git.infradead.org/users/jcooper/linux:
  arm: mvebu: Fix pinctrl for Armada 370 Mirabox SDIO port.
  arm: orion5x: correct IRQ used in dtsi for mv_cesa
  arm: orion5x: fix orion5x.dtsi gpio parameters
  ARM: Kirkwood: fix unused mvsdio gpio pins
  arm: mvebu: Use local interrupt only for the timer 0
  ARM: kirkwood: Fix chip-delay for GoFlex Net

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-03-29 00:04:23 +01:00
Ryan Press
879d68a445 arm: mvebu: Fix pinctrl for Armada 370 Mirabox SDIO port.
The previous configuration used the wrong "clk" pin.  Without this
change mv_sdio worked because the bootloader would set the pin up, but
with a bootloader that does not set the pin, mv_sdio fails to detect any
card.

I have tested this change using a mwifiex_sdio wireless network adapter
over the SDIO interface.

Signed-off-by: Ryan Press <ryan@presslab.us>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-28 17:29:23 +00:00
Alexander Clouter
e0656a9cbb arm: orion5x: correct IRQ used in dtsi for mv_cesa
The crypto functionality in the orion5x dtsi uses the Ethernet IRQ and
so things do not work and there is much grumbling at boot time.
The IRQ for the crypto should be 28, and not 22, and that is what this
patch corrects.

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-28 17:22:10 +00:00
Alexander Clouter
835f6322c6 arm: orion5x: fix orion5x.dtsi gpio parameters
orion5x.dtsi is missing the gpio alias as well as including a typo
('ngpio' instead of 'ngpios') that prevented the orion-gpio driver
from loading.  Also missing were the interrupt-controller properties.
This patches resolves those glitches.

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-28 17:21:20 +00:00
Sebastian Hesselbarth
0d0644ebc6 ARM: Kirkwood: fix unused mvsdio gpio pins
mvsdio_platform_data allows to pass card detect and write protect gpio
numbers to the driver. Some kirkwood boards don't use both pins as they
are not connected, and don't set the corresponding value in platform_data.

This will leave the unset values in platform_data initialized as 0, which
is in fact a valid gpio pin. mvsdio will grab that pin and configure it as
gpio, which in turn breaks nand controller as mpp0 also carries nand_io2.

This patch fixes the above by initializing unused gpio functions in the
platform_data with an invalid (-1) value.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reported-by: Soeren Moch <smoch@web.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-28 16:56:31 +00:00
Gregory CLEMENT
7f23f62fc3 arm: mvebu: Use local interrupt only for the timer 0
The commit 3a6f08a37 "arm: mvebu: Add support for local interrupt",
managed the 28th first interrupts as local interrupt to match the
hardware specification. Among these interrupts there are the Gigabits
Ethernet ones used by the mvneta driver. Unfortunately the state of
the percpu_irq API prevents the driver to use it.

Indeed the interrupts have to be freed when the .stop() function is
called. As the free_percpu_irq() function don't disable the interrupt
line, we have to do it on each CPU before calling this. The function
disable_percpu_irq() only disable the percpu on the current CPU and
there is no function which allows to disable a percpu irq on a given
CPU. Waiting for the extension of the percpu_irq API, this fix allows
to use again the mvneta driver.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-28 16:45:42 +00:00
Eric Hutter
2992714d43 ARM: kirkwood: Fix chip-delay for GoFlex Net
This fixes "Too few good blocks within range" issues on GoFlex Net by setting
chip-delay to 40.

The basic problem was discussed at http://forum.doozan.com/read.php?2,7451

Signed-off-by: Eric Hutter <hutter.eric@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Cc: <stable@vger.kernel.org> # v3.6.x
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-28 16:19:22 +00:00
Arnd Bergmann
d5b1598c12 Merge tag 'ep93xx-fixes-for-3.9-rc5' of git://github.com/RyanMallon/linux-ep93xx into fixes
From Ryan Mallon <rmallon@gmail.com>:

It is a regression fix for some ep93xx boards which are failing to boot
on current mainline. The patch has been tested in next over the last
few days.

* tag 'ep93xx-fixes-for-3.9-rc5' of git://github.com/RyanMallon/linux-ep93xx:
  ARM: ep93xx: Fix wait for UART FIFO to be empty

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-03-28 11:56:15 +01:00
Arnd Bergmann
fb5d932ac2 The imx fixes for 3.9, take 4:
Running suspend/resume without no_console_suspend setting on kernel
 cmdline will likely makes system hang.  It causesd by the sync issue
 between imx_cpu_die() and imx_cpu_kill() call.  Fix the issue by
 synchronizing the calls using cpu jumping argument register which is
 free to use in kernel.
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Merge tag 'imx-fixes-3.9-4' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes

From Shawn Guo <shawn.guo@linaro.org>:

The imx fixes for 3.9, take 4:

Running suspend/resume without no_console_suspend setting on kernel
cmdline will likely makes system hang.  It causesd by the sync issue
between imx_cpu_die() and imx_cpu_kill() call.  Fix the issue by
synchronizing the calls using cpu jumping argument register which is
free to use in kernel.

* tag 'imx-fixes-3.9-4' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill
  ARM: imx: add dependency check for DEBUG_IMX_UART_PORT

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-03-28 11:55:23 +01:00
Arnd Bergmann
cba26c5ab9 Fixes boot regressions on Device Tree:
- Get TCPM and TCDM locations from the device tree
 - Skip passing the ios_handler for the MMCI
 - Enable the ethernet clock for Snowball
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Merge tag 'ux500-fixes-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes

From Linus Walleij <linus.walleij@stericsson.com>:

Fixes boot regressions on Device Tree:
- Get TCPM and TCDM locations from the device tree
- Skip passing the ios_handler for the MMCI
- Enable the ethernet clock for Snowball

* tag 'ux500-fixes-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: Enable the clock controlling Ethernet on Snowball
  ARM: ux500: Stop passing ios_handler() as an MMCI power controlling call-back
  ARM: ux500: Apply the TCPM and TCDM locations and sizes to dbx5x0 DT

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-03-27 22:36:26 +01:00
Lee Jones
265c3c0a64 ARM: ux500: Enable the clock controlling Ethernet on Snowball
This fixes a regression introduced by common clk enablement.

On some u8500 based boards, the FMSC clock which is usually used
for flash, is wired up to the SMSC911x Ethernet driver. However,
the SMSC911x doesn't have common clk support yet, rendering it
unusable. Prior to the introduction of common clk the FMSC clock
was default on; however, common clk disables all clocks by default
and insists drivers take responsibility to enable theirs.

This fix enables the FMSC clock on Snowball, subsequently turning
on the SMSC911x Ethernet chip. It will be removed when the driver
is compatible with common clk.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-27 20:20:40 +01:00