As usual, this is where the bulk of our changes end up landing each
merge window.
The individual updates are too many to enumerate, many many platforms
have seen additions of device descriptions such that they are
functionally more complete (in fact, this is often the bulk of updates
we see).
Instead I've mostly focused on highlighting the new platforms below as
they are introduced. Sometimes the introduction is of mostly a fragment,
that later gets filled in on later releases, and in some cases it's
near-complete platform support. The latter is more common for derivative
platforms that already has similar support in-tree.
Two SoCs are slight outliers from the usual range of additions. Allwinner
support for F1C100s, a quite old SoC (ARMv5-based) shipping in the
Lychee Pi Nano platform. At the other end is NXP Layerscape LX2160A,
a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O aimed at
infrastructure/networking.
TI updates stick out in the diff stats too, in particular because they
have moved the description of their L4 on-chip interconnect to devicetree,
which opens up for removal of even more of their platform-specific
'hwmod' description tables over the next few releases.
SoCs:
- Qualcomm QCS404 (4x Cortex-A53)
- Allwinner T3 (rebranded R40) and f1c100s (armv5)
- NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4)
- NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72)
New platforms:
- Rockchip: Gru Scarlet (RK3188 Tablet)
- Amlogic: Phicomm N1 (S905D), Libretech S805-AC
- Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708)
- Qualcomm: QCS404 base platform and EVB
- Qualcomm: Remove of Arrow SD600
- PXA: First PXA3xx DT board: Raumfeld
- Aspeed: Facebook Backpack-CMM BMC
- Renesas iWave G20D-Q7 (RZ/G1N)
- Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s)
- Allwinner Emlid Neutis N5, Mapleboard MP130
- Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE)
- i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
- VF610: Liebherr's BK4 device, ZII SCU4 AIB board
- i.MX7D PICO Hobbit baseboard
- i.MX7ULP EVK board
- NXP LX2160AQDS and LX2160ARDB boards
Other:
- Coresight binding updates across the board
- CPU cooling maps updates across the board
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlwqgVYPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3ybAQAKAhd7XI5oY/wgdZZmxwcX+p7sU6LXeIlpWU
XsPN1c14KU0siQv/znVA5OpF+fgn9eRqfWnMoDPlvdScTq07FM2NBmOJfVJYDPJa
uvsll5m+84FCYanIR//YybS0tCM0b0BHoHo2DoyIxWeAwmw7BBVslddBdNg6R7hG
S9rU9rUeqfCj7HbcPLqVn0DecMtEe7R8zmDtG1CSMqrhncifmoV4gtUnbYAg0GGT
cSvj/zT8A1j0oJcU2Upl/Fr+7WJ7XB9pnku91nUOSXLv5VkyctLGomKq5F7O2/Xs
2DhpH2yKwQt7S7TDiDd0jy64Of6+Xup35wEHevCeKrzGXcVRqqHwCkanLz9FdjVt
yg4UrI/P1nY7h4ifZPplgigv+kA+IjRGiMrTRIEgSE5YK9U5AYkgembTWksRDikd
5EpeJcMj2tBv4SDellNNtzh6GGTPBf3GJw3P9uRuxnQY/T31N2eX0XGeRikL+Lzf
9nbQdJealmql3rCa5oFEJwSxrSaAv/ub7/294kPdEmXj8+3qUuH3hZAZOI9LSXGW
GCuxsgccB2GF1M48x48/QpHgxb93okyXmndONZnU8uN8ba0zS4b8QLwvIY5rqv5Z
kqD1VPBQf9kGVyzDyABRjFmGCDJcoOJf4QrzvNk9+xo8fXVk1xNtxu4MUsHvc2lS
cU2RYWm/
=sFVi
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Device-tree updates from Olof Johansson:
"As usual, this is where the bulk of our changes end up landing each
merge window.
The individual updates are too many to enumerate, many many platforms
have seen additions of device descriptions such that they are
functionally more complete (in fact, this is often the bulk of updates
we see).
Instead I've mostly focused on highlighting the new platforms below as
they are introduced. Sometimes the introduction is of mostly a
fragment, that later gets filled in on later releases, and in some
cases it's near-complete platform support. The latter is more common
for derivative platforms that already has similar support in-tree.
Two SoCs are slight outliers from the usual range of additions.
Allwinner support for F1C100s, a quite old SoC (ARMv5-based) shipping
in the Lychee Pi Nano platform. At the other end is NXP Layerscape
LX2160A, a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O
aimed at infrastructure/networking.
TI updates stick out in the diff stats too, in particular because they
have moved the description of their L4 on-chip interconnect to
devicetree, which opens up for removal of even more of their
platform-specific 'hwmod' description tables over the next few
releases.
SoCs:
- Qualcomm QCS404 (4x Cortex-A53)
- Allwinner T3 (rebranded R40) and f1c100s (armv5)
- NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4)
- NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72)
New platforms:
- Rockchip: Gru Scarlet (RK3188 Tablet)
- Amlogic: Phicomm N1 (S905D), Libretech S805-AC
- Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708)
- Qualcomm: QCS404 base platform and EVB
- Qualcomm: Remove of Arrow SD600
- PXA: First PXA3xx DT board: Raumfeld
- Aspeed: Facebook Backpack-CMM BMC
- Renesas iWave G20D-Q7 (RZ/G1N)
- Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s)
- Allwinner Emlid Neutis N5, Mapleboard MP130
- Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE)
- i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
- VF610: Liebherr's BK4 device, ZII SCU4 AIB board
- i.MX7D PICO Hobbit baseboard
- i.MX7ULP EVK board
- NXP LX2160AQDS and LX2160ARDB boards
Other:
- Coresight binding updates across the board
- CPU cooling maps updates across the board"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (648 commits)
ARM: dts: suniv: Fix improper bindings include patch
ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards
arm64: dts: allwinner: a64: bananapi-m64: Add Bluetooth device node
ARM: dts: suniv: Fix improper bindings include patch
arm64: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
arm64: dts: Remove unused properties from FSL QSPI driver nodes
ARM: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
ARM: dts: imx6sx-sdb: Fix the reg properties for the FSL QSPI nodes
ARM: dts: Remove unused properties from FSL QSPI driver nodes
arm64: dts: ti: k3-am654: Enable main domain McSPI0
arm64: dts: ti: k3-am654: Add McSPI DT nodes
arm64: dts: ti: k3-am654: Populate power-domain property for UART nodes
arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM
arm64: dts: ti: k3-am65-main: Add ECAP PWM node
arm64: dts: ti: k3-am654-base-board: Add I2C nodes
arm64: dts: ti: am654-base-board: Add pinmux for main uart0
arm64: dts: ti: k3-am65: Add pinctrl regions
dt-bindings: pinctrl: k3: Introduce pinmux definitions
ARM: dts: exynos: Specify I2S assigned clocks in proper node
ARM: dts: exynos: Add missing CPUs in cooling maps for Odroid X2
...
Enable the USB3 peripheral that is wired to CON2 on the Clearfog GT-8K
board.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add DT support for the Macchiatobin Single Shot board from SolidRun,
which is similar to the Double Shot board, but does not have the
10G 3310 PHYs - the two ethernet ports are instead connected directly
to the SFP+ cages.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The ESPRESSObin board has a emmc interface available on U11: declare it
and let the bootloader enable it if the emmc is present.
[gregory.clement@bootlin.com: disable the emmc by default]
Signed-off-by: Ding Tao <miyatsu@qq.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This reverts commit 8ed4636877.
This commit breaks boot on Armada 8K based systems. Reverting it makes
affected systems boot again.
Reported-by: Sergey Matyukevich <geomatsi@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Deassert the reset and wireless disable signals on the CON2 mini-PCIe
socket. That allows the host to detect USB devices on the mini-PCIe
socket.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This reset signal controls the Marvell 1512 1G PHY.
Note that current implementation queries the PHY over the MDIO bus
(get_phy_device() call from of_mdiobus_register_phy()) before reset
signal deassert. If the PHY reset signal is asserted at boot time, PHY
registration fails. So current code relies on the bootloader to deassert
the reset signal.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The fixed regulator driver ignores the gpio flags, so this change has
no practical effect in the current implementation. Fix it anyway to
correct the hardware description.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This adds support for the PCIe interface on the CON4 mini-PCIe
connector.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The ICU handles several interrupt groups, each of them being a subpart
of the ICU node.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Create an ICU subnode for the NSR interrupts. This subnode becomes the
CP110 interrupt parent, removing the need for the ICU_GRP_NSR parameter.
Move all DT110 nodes to use these new bindings.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add the System Error Interrupt node, representing an IRQ chip which is
part of the GIC. The SEI node aggregates interrupts from the AP through
wired interrupts, and from the CPs through MSIs.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds CPU deep Idle and Cluster deep Idle states BUT it defines
the idle state for each cpu (defined under cpu-idle-states parameter)
only for the quad version therefore it does NOT activate CPU Idle
capability for the other version.
[gregory: extract from a larger patch]
Signed-off-by: orenbh <orenbh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Aligned with what we have done for the others nodes. It will also allow
to easily modify the cpu configuration at board (or sub-SoC) level.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This adds the system controller node for CPU Miscellaneous Registers
(which is needed for the watchdog node) and the watchdog node.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch describes 3 additional interrupts per PPv2 port. Those
interrupts will be used later in future versions of the Marvell PPv2
driver, and now the device tree description matches the hardware
capabilities.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch changes the PPv2 IRQ names in the CP110 device tree to match
a corresponding change in the Marvell PPv2 driver. The reason this was
updated is the IRQ where names after Tx/Rx interrupts, but this is not
true and can be configured. A following patch will add more of them and
the names wouldn't make sense.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The SolidRun Clearfog GT-8K is based on Marvell Armada 8040 SoC.
https://wiki.solid-run.com/doku.php?id=products:a8040:clearfoggt8k
The following devices were tested with this DT on top of kernel
v4.19-rc4:
* 1GB Ethernet WAN
* 4 ports 1GB Ethernet switch (2.5GB uplink)
* SFP port
* SATA on CON3 PCIe slot
* USB3 type A port
* SD card and eMMC
* 2 LEDs
* 2 push buttons
[gregory: fix block comment alignement]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add a thermal-zone node and fill in all the sensors available in a
cp110 (only one in the thermal IP).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Because the label is different between CPs, the full path of a node is
unique. However, when referring to the end of the path only (the node
name), this name is not unique anymore.
The *thermal_zone_of_sensor_register() functions of the thermal core
present this limitation and prevent having a thermal-zone per CP.
Add a macro to make the distinction between node names to solve this
situation.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Add a thermal-zone node and fill in all the sensors available in an
ap806 (one in the IC plus one per CPU).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
New bindings impose to declare the thermal IP from within a new syscon.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use more specific compatible for the Inside Secure SafeXcel on the
Armada 37xx and the Armada 7K/8K SoCs.
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCW1GhYAAKCRALBhiOFHI7
1UYeAKCZvsX0evzDYPCmL32CSuArmJ+OKwCdFYn7QoXQIYwGP60bK2UZzhcWROs=
=V7S+
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.19-2' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt64 for 4.19 (part 2)
Use more specific compatible for the Inside Secure SafeXcel on the
Armada 37xx and the Armada 7K/8K SoCs.
* tag 'mvebu-dt64-4.19-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: armada-37xx: update the crypto engine compatible
arm64: dts: marvell: armada-cp110: update the crypto engine compatible
Signed-off-by: Olof Johansson <olof@lixom.net>
Armada 3700
- Add default memory reservation for ATF
- Add a node for AVS support
Fix eth3 connector name on the Macchiatobin
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCW0hwpQAKCRALBhiOFHI7
1WtcAKCGbi1l3gHxOT0WdMtx3vjxIlySYgCgknnIsyIO3uDuujsEOH9nGhzyDAo=
=KfNs
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.19-1' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt64 for 4.19 (part 1)
Armada 3700
- Add default memory reservation for ATF
- Add a node for AVS support
Fix eth3 connector name on the Macchiatobin
* tag 'mvebu-dt64-4.19-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: armada-37xx: reserve memory for ATF
arm64: dts: marvell: armada-37xx: add the node allowing AVS support
arm64: dts: marvell: mcbin: fix eth3 connector name
Signed-off-by: Olof Johansson <olof@lixom.net>
New compatibles are now supported by the Inside Secure SafeXcel driver.
As they are more specific than the old ones, they should be used
whenever possible. This patch updates the Marvell Armada 37xx device
tree accordingly.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
New compatibles are now supported by the Inside Secure SafeXcel driver.
As they are more specific than the old ones, they should be used
whenever possible. This patch updates the Marvell cp110 device tree
accordingly.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The PSCI area should be reserved in Linux for PSCI operations such as
suspend/resume.
Reserve 2MiB of memory which matches the area used by ATF (BL1, BL2,
BL3x, see [1] in ATF source code). This covers all PSCI code and data
area and is 2MiB aligned, which is required by Linux for huge pages
handling.
Please note that this is a default setup allowing to perform PSCI
operations with legacy bootloaders. Recent bootloaders should update the
region size/position accordingly.
[1] plat/marvell/a3700/common/include/platform_def.h
Signed-off-by: Victor Gu <xigu@marvell.com>
[miquel.raynal@bootlin.com: reword of commit message, comment in the DTSI]
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
In order to be able to use Adaptive Voltage Scaling, we need to add a
reference to these registers.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The right most SFP connector on the Macchiatobin board and schematics is
marked as CON13/CON14.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
- Use correct size for ICU nodes (irq controller) on Armada 7K/8K
- Fix "#cooling-cells" property's name on Synology DS116 (Armada 385)
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWwwZggAKCRALBhiOFHI7
1RZ3AJ4wjqNwkBmHpxD5DDQgNcO1WxYhFgCffMYB3qCIdYW6ROiFCs79bq/8Ldc=
=HA77
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.17-2' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 4.17 (part 2)
- Use correct size for ICU nodes (irq controller) on Armada 7K/8K
- Fix "#cooling-cells" property's name on Synology DS116 (Armada 385)
* tag 'mvebu-fixes-4.17-2' of git://git.infradead.org/linux-mvebu:
arm: dts: armada: Fix "#cooling-cells" property's name
arm64: dts: marvell: fix CP110 ICU node size
Signed-off-by: Olof Johansson <olof@lixom.net>
As always, a large number of DT updates. Too many to enumerate them all,
but at a glance:
New SoCs introduced in this release:
- Amlogic:
+ Meson 8M2 SoC, a.k.a. S812. A quad Cortex-A9 SoC used in some set
top boxes and other products.
- Mediatek:
+ MT7623A, which is a flavor of the MT7623 family with other on-chip
ethernet options.
- Qualcomm:
+ SDM845, a.k.a Snapdragon 845, an 4+4-core Kryo 385/845
(Cortex-A75/A55 derivative) SoC that's one of the current high-end
mobile SoCs.
It's great to see mainline support for it. So far, you
can't do much with it, since a lot of peripherals are not yet in the
DTs but driver support for USB, GPU and other pieces are starting to
trickle in. This might end up being a well-supported SoC upstream if
the momentum keeps up.
- Renesas:
+ R8A77990, a.k.a R-Car E3, a new automotive entertainment-targeted
SoC. Currently only one Cortex-A53 CPU is enabled, we are eagerly
awaiting more. So far, basic drivers such as serial, gpios, PMU and
ethernet are enabled.
+ R8A77470, a.k.a. RZ/G1C, a new dual Cortex-A7 SoC with PowerVR
GPU. Same here, basic set of drivers such as serial, gpios and ethernet
enabled, and SMP support is also forthcoming.
- STMicroelectronics:
+ STM32F469, very similar tih STM32F429 but with display support
Enhancements to SoCs/platforms (DTS contents, some driver portions might
not be in yet):
- Allwinner sun8i (h3/a33/a83t) SMP, DVFS tweaks, misc
- Amlogic Meson: I2C, UFS, TDM, GPIO external interrupts, MMC resets
- Hisilicon hi3660: Thermal cooling, CPU frequency scaling, mailbox interfaces
- Marvell Berlin2CD: SMP support, thermal sensors
- Mediatek MT7623: Highspeed DMA, audio support
- Qualcomm IPQ8074 PCIe support, MSM8996 UFS support
- Renesas: Watchdog and PMU support across many platforms
- Rockchip RK3399: USB3 OTG support
- Samsung Exynos: Audio-over-HDMI on Odroid X/X2/U3
- STMicro STM32: Lots of peripherals added to STM32MP175C
- Uniphier: Ethernet support
New boards:
- Allwinner A20: Olimex A20-SOM-EVB-eMMC variant
- Allwinner H2+: Libre Computer ALL-H3-CC (h2+ version)
- Allwinner A33: Nintendo NES/SuperNES Classic Edition
- Aspeed: S2600WF, Inventec Lanyang BMC, Portwell Neptune
- Berlin2CD: Valve Steam Link
- Broadcom BCM5301X: Luxul XAP-1610 and XWR-3150 V1
- Broadcom: Raspberry Pi 3 B+
- Mediatek MT7623N and MT7623A: reference boards
- Meson 8M2: Tronsmart MXIII Plus
- NXP i.MX: Engicam i.CoreM6, DHCOM iMX6 SOM, BTicino i.MX6DL Mamoj
- Qualcomm MSM8974: Sony Xperia Z1 Compact support
- Qualcomm SDM845: MTP development board
- Renesas: Ebisu R8A77990 board
- Renesas RZ/G1C: iwg23s: iWave G235-SDB
- TI am335x: Pocketbeagle support
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlsfBtUPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3wfYQAI1hlPhRx7H1zbc59zdlW6daY7y1+dXuqoCs
K5Hxsurlsbnx9fjeGcBp/razL5YtdZmBYII8IBhKzhLKp/A0gqmX7W9pTNQj9/Sp
SOIl8dci/yr0HUpgwc4IdVhJBdpplv48GK3q8opSocI/J9dnD873NHLlvTpCB+Jy
GCD9tB56JnOfTO+n0Yg+tyuig1jIQCc52Iwnmxv2vYPbsHUaEmqz1Z+wBe0BaDk+
eVsohNQI/2xxRzv8PE13H/ojcZ532rF45aw6ypRwCvg1MzCYXSdKLJlIWx8Ci581
YmRPlCOWai+AxSATgJhIR9n9dxn6hqxEgVyu7AOxPVa0O4DKB3oy8PPo5wlOCKcU
J1n5zJwnULWw4eVa1ag/cEMbz95QMC1F9MmyiLUfz3esHwyD/Gl3ks9v1gwn9XYp
xsI+oGnMy/Uz4oZ1/XM5CO5UUDXyixVD3pYEF8wLaYX2JY8zETI5qfvNL0bwZX3P
lLFCI7Xdwsk3+HCp7aHs4KkWHLVGq65SxrXKTIpU+vEq+0RYiV/cWP9Swa/RNrMH
gB00oZ2TBRuIr/KxsCKyCkKApocW4J4WtZ2sMY7QDXzW68lq8oIbefY+6Abgk4/7
6J7D5n0gmTB38wrzZCY5UF0eQrLjPwnxuLywEll5oLFbNTr/7Aruk2kFYEMGjM9E
QmXGoHXU
=jLvk
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates from Olof Johansson:
"As always, a large number of DT updates. Too many to enumerate them
all, but at a glance:
New SoCs introduced in this release:
- Amlogic:
+ Meson 8M2 SoC, a.k.a. S812. A quad Cortex-A9 SoC used in some
set top boxes and other products.
- Mediatek:
+ MT7623A, which is a flavor of the MT7623 family with other
on-chip ethernet options.
- Qualcomm:
+ SDM845, a.k.a Snapdragon 845, an 4+4-core Kryo 385/845
(Cortex-A75/A55 derivative) SoC that's one of the current
high-end mobile SoCs.
It's great to see mainline support for it. So far, you can't do
much with it, since a lot of peripherals are not yet in the DTs
but driver support for USB, GPU and other pieces are starting to
trickle in. This might end up being a well-supported SoC
upstream if the momentum keeps up.
- Renesas:
+ R8A77990, a.k.a R-Car E3, a new automotive
entertainment-targeted SoC. Currently only one Cortex-A53 CPU is
enabled, we are eagerly awaiting more. So far, basic drivers
such as serial, gpios, PMU and ethernet are enabled.
+ R8A77470, a.k.a. RZ/G1C, a new dual Cortex-A7 SoC with PowerVR
GPU. Same here, basic set of drivers such as serial, gpios and
ethernet enabled, and SMP support is also forthcoming.
- STMicroelectronics:
+ STM32F469, very similar tih STM32F429 but with display support
Enhancements to SoCs/platforms (DTS contents, some driver portions
might not be in yet):
- Allwinner sun8i (h3/a33/a83t) SMP, DVFS tweaks, misc
- Amlogic Meson: I2C, UFS, TDM, GPIO external interrupts, MMC resets
- Hisilicon hi3660: Thermal cooling, CPU frequency scaling, mailbox interfaces
- Marvell Berlin2CD: SMP support, thermal sensors
- Mediatek MT7623: Highspeed DMA, audio support
- Qualcomm IPQ8074 PCIe support, MSM8996 UFS support
- Renesas: Watchdog and PMU support across many platforms
- Rockchip RK3399: USB3 OTG support
- Samsung Exynos: Audio-over-HDMI on Odroid X/X2/U3
- STMicro STM32: Lots of peripherals added to STM32MP175C
- Uniphier: Ethernet support
New boards:
- Allwinner A20: Olimex A20-SOM-EVB-eMMC variant
- Allwinner H2+: Libre Computer ALL-H3-CC (h2+ version)
- Allwinner A33: Nintendo NES/SuperNES Classic Edition
- Aspeed: S2600WF, Inventec Lanyang BMC, Portwell Neptune
- Berlin2CD: Valve Steam Link
- Broadcom BCM5301X: Luxul XAP-1610 and XWR-3150 V1
- Broadcom: Raspberry Pi 3 B+
- Mediatek MT7623N and MT7623A: reference boards
- Meson 8M2: Tronsmart MXIII Plus
- NXP i.MX: Engicam i.CoreM6, DHCOM iMX6 SOM, BTicino i.MX6DL Mamoj
- Qualcomm MSM8974: Sony Xperia Z1 Compact support
- Qualcomm SDM845: MTP development board
- Renesas: Ebisu R8A77990 board
- Renesas RZ/G1C: iwg23s: iWave G235-SDB
- TI am335x: Pocketbeagle support"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (448 commits)
ARM: dts: aspeed: Fix hwrng register address
arm64: dts: sprd: whale2: Add the rtc enable clock for watchdog
arm64: dts: sprd: Add GPIO and GPIO keys device nodes
arm64: dts: sprd: fix typo in 'remote-endpoint'
arm64: dts: apq8096-db820c: Removed bt-en-1-8v regulator
arm64: dts: fix regulator property name for wlan pcie endpoint
arm64: dts: qcom: msm8996: Use UFS_GDSC for UFS
ARM: dts: pxa3xx: fix MMC clocks
ARM: pxa: dts: add pin definitions for extended GPIOs
ARM: pxa: dts: add gpio-ranges to gpio controller
ARM: dts: ipq8074: Enable few peripherals for hk01 board
ARM: dts: ipq8074: Add pcie nodes
ARM: dts: ipq8074: Add peripheral nodes
ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c2 board file
ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c1 board file
ARM: dts: ipq4019: Add ipq4019-ap.dk07.1 common data
ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk04.1-c3 board file
ARM: dts: ipq4019: Add ipq4019-ap.dk04.1-c1 board file
ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi
ARM: dts: ipq4019: Change the max opp frequency
...
-----BEGIN PGP SIGNATURE-----
iQJHBAABCgAxFiEE2MW6uuYZ+0zBfpF41kg+k28NbwgFAlsGU58THGpzemhhbmcz
QGdtYWlsLmNvbQAKCRDWSD6Tbw1vCOOzD/4wBhoFn/97yrZSJeOpbctEFmqjWuls
d1ogSCRTOvmlG6FwBXFoZiatF6DwMjkv0hKxuhW4wjmV6n9HwlgonAYXurHMAD0a
xSHbjEqvu1aX8XGPRq0WKa/oyQrCLCiiO6/9+hIfIZbGoRVkkLWBQ7KB+1UMpgPb
Y9BCoPaOrFR78emcNDjBVkZ+QWCnOm2MkQO7CZa8DOrgsNEW5247hE0c6H2fwRa1
5kulVElAs2XVlx9HXxiNbrhDA7kwvxCSJiFkCB/w3YsSdSk7RUN/cSXj5xSnFdPW
74gD/fCzLyL3vVkogegqBmpSh6NavppZlw0yJlDeszQGO/YXjDpu2Tol+Mp7KH0W
LdIJltdc/kqe7bw8eSm3cWwJiXtSIzFX5Rn456DxvezWUF4rjSZgUu41bnBR7KHw
Kq/w1800pU6pHFvx57Kq/zIid5usB83BoOVuMz0Ul86b/dbBvxQdzZlHbT0/ZVkD
l5UcaoCvNh4NzDbx5fRGLwTLcaUz0ZJb0M6MxM/Dm/+qebU/0tMowPsV9hk7G7Vb
QyfdU8b4dUYZAlFp+sSvEXXo1qfAREofdIpDsVYvTQqepdoelk8K93uzTUUdqWCc
INBpe0sZpT82vq1Rc2svyMysQhFKboyWwjR0DHOTOU64g8tC280M1ozB1eptf0N0
BQrlrw1ttJWmJA==
=corl
-----END PGP SIGNATURE-----
Merge tag 'berlin64-dt-for-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin into next/dt
Berlin64 DT changes for v4.18
* tag 'berlin64-dt-for-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin:
arm64: dts: move berlin SoC files from marvell dir to synaptics dir
arm64: dts: berlin4ct-*.dts: use SPDX-License-Identifier
arm64: dts: berlin4ct: use SPDX-License-Identifier
Signed-off-by: Olof Johansson <olof@lixom.net>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
ICU size in CP110 is not 0x10 but at least 0x440 bytes long (from the
specification).
Fixes: 6ef84a827c ("arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K")
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This allows to reference these gpio controller as interrupt parent. Also
add a comment which cpu line names are managed by the controllers
because "nb" and "sb" usually doesn't appear in schematics, but MPPX_Y
do.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds a fixed-link node to the 10G interface of the 7040-db
board. This is required as the mvpp2 driver now uses phylink. The best
solution would have been to describe the SFP cage but they are not
wired correctly, and thus unusable, so we chose to use fixed-link
instead.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds a fixed-link node to both 10G interfaces of the 8040-db
board. This is required as the mvpp2 driver now uses phylink. The best
solution would have been to describe the SFP cages but they are not
wired correctly, and thus unusable, so we chose to use fixed-link
instead.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch enables the fourth network interface on the Marvell
Macchiatobin. It is configured in the 2500Base-X PHY mode. The SFP cage
is also described.
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds the SFP cage description in the Marvell Armada 8040
mcbin, for both 10G interfaces.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
[Antoine: small reworks, commit message]
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Marvell PPv2.2 controller present on CP-110 need the extra "mg_core_clk"
clock to avoid system hangs when powering some network interfaces up.
This issue appeared after a recent clock rework on Armada 7K/8K platforms.
This commit adds the new clock and updates the documentation accordingly.
[gregory.clement: use the real first commit to fix and add the cc:stable
flag]
Fixes: e3af9f7c6e ("RM64: dts: marvell: armada-cp110: Fix clock resources for various node")
Cc: <stable@vger.kernel.org>
Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The Marvell XSMI controller needs 3 clocks to operate correctly :
- The MG clock (clk 5)
- The MG Core clock (clk 6)
- The GOP clock (clk 18)
This commit adds them, to avoid system hangs when using these
interfaces.
[gregory.clement: use the real first commit to fix and add the cc:stable
flag]
Fixes: f66b2aff46 ("arm64: dts: marvell: add xmdio nodes for 7k/8k")
Cc: <stable@vger.kernel.org>
Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The hardware is clearly DMA coherent and not marking it as such leads
to cache coherency problems, at least with the OpenBSD kernel.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This is the storage the machine boots from by default. The partitioning
is taken from the U-Boot that is shipped with the board. There is some
more space on the flash that isn't used.
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Ellie Reeves <ellierevves@gmail.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The schematic of the espressobin is publicly available, add a comment
where to find it.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the PCIe host
controller used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "PCI: armada8k: Fix clock resource by adding
a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the NAND controller
used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "mtd: nand: marvell: Fix clock resource by adding
a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the safexcel EIP97
used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "crypto: inside-secure - fix clock resource by
adding a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
