In the new format the "CSS section" has the same TLV type
as the "mem section". So we need to run the secured flow
for all the 8000 products.
Signed-off-by: Eran Harary <eran.harary@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
A few slave bus devices show better performance when we
reduce the size of the Tx A-MPDU.
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
The sharing model will differ in new hardware. Define the
non shared antenna based on the device so that different
devices can have different names for the non shared antenna.
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
The firwmare now allows the driver to disable dummy
notifications. These notifications sent by the firmware
are an overhead for slow buses. They are still useful for
fast buses.
Add a hardware switch to prevent these notifications only
on devices that work on slow buses.
Signed-off-by: Eran <eran.harary@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Edit some 8000 series PCI IDs and add configuration to
Dual Band Wireless N 8260 devices.
Signed-off-by: Oren Givon <oren.givon@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Use LDPC for Tx and publish support for Rx in case the chip
supports LDPC. Enable it for the 7265 family.
Signed-off-by: Eyal Shapira <eyalx.shapira@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
This change does the following:
1) Add a new 7265 series PCI ID
2) Add two new 3160 series PCI IDs
3) Add the new 3165 series PCI IDs and configurations
Signed-off-by: Oren Givon <oren.givon@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
The chip is able to transmit up to 22dBm, so set
the constant appropriately.
CC: <stable@vger.kernel.org> [3.13+]
Signed-off-by: Eliad Peller <eliadx.peller@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
The nvm_file should be loaded by default for SDIO
procucts only. Change the configuration accordingly.
While at it, fix a typo in the device name.
Signed-off-by: Eran Harary <eran.harary@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Fix a bug in nvm_read_section function if size of the section
is a multiple of 2K:
- if the size of the section is *not* multiple of 2K,
then we will have: read(2K) - return 2K ... read(2K) - return 2K
read(2K) - return the rest (in bytes) and exit the while loop.
- else, if the size of the section is a multiple of 2K,
then we have: read(2K) - return 2K read(2K) - return 2K read(2K) -
return 2K read(2K) - return 0 and exit the while with an error.
We should not return an error in the latter case, because it
might well be that the section was completely read.
Also, we try now to read all the sections as this is needed
for new devices.
Signed-off-by: Eran Harary <eran.harary@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
The 8000 family products need a file on the file system
which is used as NVM. This file is a must, if no filename
is supplied as module parameter, use a default filename.
Signed-off-by: Eran Harary <eran.harary@intel.com>
Reviewed-by: Dor Shaish <dor.shaish@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
A few devices aren't allowed to be powered up at driver
load time. Add "power_up_nic_in_init" flag to iwl_cfg
structure to customize the load flow according to the
device.
Signed-off-by: Eran Harary <eran.harary@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
OTP size changed in family 7000 and in family 8000.
Signed-off-by: Eran Harary <eran.harary@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
7000 device series have a fix for this hardware feature.
Stop disabling it, and get an improvement in Tx throughput.
This feature allows the scheduler to fetch more frames on
the fly while an A-MPDU is being built - which means that
we can get larger A-MPDU. This, of course, give an
improvement in the Tx throughput.
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
A hardware bug had been discovered on 7260 / 3160 and 7265
and the workaround for this bug is to force the NIC to stay
awake as long as we have host commands in flight. This
workaround has been introduced for all NICs in a previous
patch:
b943949105 ("iwlwifi: pcie: keep the NIC awake when commands are in flight")
In newer NICs, this bug is solved, so we can let the NIC go
to sleep even when we send commands. The hardware will wake
up when we increment the scheduler write pointer.
Make the workaround conditional to only use it on affected
hardware.
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
1. Enable LP XTAL to avoid HW bug where device may consume much
power if FW is not loaded after device reset. LP XTAL is
disabled by default after device HW reset. Configure device's
"persistence" mode to avoid resetting XTAL again when SHRD_HW_RST
occurs in S3.
2. Add methods to access SHR (shared block memory space) directly from PCI
bus w/o need to power up MAC HW.
Shared internal registers (e.g. SHR_APMG_GP1, SHR_APMG_XTAL_CFG)can be
accessed directly from PCI bus through SHR arbiter even when MAC HW is
powered down. This is possible due to indirect read/write via
HEEP_CTRL_WRD_PCIEX_CTRL (0xEC) and HEEP_CTRL_WRD_PCIEX_DATA (0xF4)
registers.
Use iwl_write32()/iwl_read32() family to access these registers. The MAC HW
need not be powered up so no "grab inc access" is required.
For example, to read from SHR_APMG_GP1 register (0x1DC),
first, write to the control register:
HEEP_CTRL_WRD_PCIEX_CTRL[15:0] = 0x1DC (offset of the SHR_APMG_GP1 register)
HEEP_CTRL_WRD_PCIEX_CTRL[29:28] = 2 (read access)
second, read from the data register HEEP_CTRL_WRD_PCIEX_DATA[31:0].
To write the register, first, write to the data register
HEEP_CTRL_WRD_PCIEX_DATA[31:0] and then:
HEEP_CTRL_WRD_PCIEX_CTRL[15:0] = 0x1DC (offset of the SHR_APMG_GP1 register)
HEEP_CTRL_WRD_PCIEX_CTRL[29:28] = 3 (write access)
Signed-off-by: Alexander Bondar <alexander.bondar@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
The 8000 family includes devices that don't support 11ac.
Add an iwl_cfg structure for them.
Signed-off-by: Ariej Marjieh <ariej.marjieh@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
D0i3 is bus power saving feature. It involves the
firmware - the driver needs to send a list of commands
to the firmware before entering this state. Wake up from
d0i3 also requires a few commands to the firmware.
The trigger to enter D0i3 is an idle timeout that will be
implemented later and will most probably rely on RUNTIME_PM
infrastructure.
In order to prevent entrance to D0i3 in critical flows, we
implement here a reference infrastructure. When a ref is
taken, we can't enter D0i3.
PCIe does't support D0i3.
Signed-off-by: Eliad Peller <eliad@wizery.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
The tx backoff settings used by the thermal throttling mechanism can
also be used for enforcing a limit on the power consumption of the module.
Handle the platform PCIe power limitation by translating the limit
(measured in mw) to its respective tx backoff value. The translation is
module specific.
The resulting tx backoff value is sent to the ucode, and also serves as the
minimal backoff value that can be set by the thermal throttling mechanism.
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
The identification of the hardware section in the NVM
of new devices has been changed, hence the need to add it
to iwl_cfg and adapt the code that uses this value
accordingly.
Signed-off-by: Eran Harary <eran.harary@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Not all chips support STBC so allow this to be
another config parameter per chip type. If STBC
is supported then publish it in the HT caps.
Since 7260/7265/3160 chips support it - set the stbc
support bit.
Signed-off-by: Eyal Shapira <eyal@wizery.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
valid_rx_ant is a bitmask of available antennas and not the number
of Rx antennas. Use num_of_ant and remove duplicate definitions
in both dvm and mvm.
Signed-off-by: Eyal Shapira <eyal@wizery.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
We changed the timeout for the interrupt coealescing for
calibration, but that wasn't effective since we changed
that value back before loading the firmware. Since
calibrations are notification from firmware and not Rx
packets, this doesn't change anyway - the firmware will
fire an interrupt straight away regardless of the interrupt
coalescing value.
Also, a HW issue has been discovered in 7000 devices series.
The work around is to disable the new interrupt coalescing
timeout feature - do this by setting bit 31 in
CSR_INT_COALESCING.
This has been fixed in 7265 which means that we can't rely
on the device family and must have a hint in the iwl_cfg
structure.
Cc: stable@vger.kernel.org [3.10+]
Fixes: 99cd471423 ("iwlwifi: add 7000 series device configuration")
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
7265 is a very similar device to 7260, so just add
the definitions based on 7260 for it.
Signed-off-by: Eran Harary <eran.harary@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Add some new PCI IDs to the table for 6000, 6005 and 6235 series.
Cc: stable@vger.kernel.org
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
When the NIC is expected to operate in high temperature,
it is advisable to put more aggresive thermal throttling
parameters, in order to prevent CT-kill.
Signed-off-by: eytan lifshitz <eytan.lifshitz@intel.com>
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
In newest NICs (7000 family and up), L1 is supported, so
avoid to disable it.
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
1x1 products will need a special LUT.
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
The older devices (pre-7000/3000 series) all only work with the
DVM opmode due to firmware availability, while newer ones will
only work with the MVM opmode for the same reason.
When building a driver that only has one of MVM or DVM, there's
no reason to build the device support and have the PCIe IDs for
all devices since they can't be used anyway, so avoid that.
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
There are a number of parameters that aren't really hardware
specific but rather define how the DVM firmware is used.
Move these into the DVM configuration.
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Add new device IDs and configurations to support
all the devices.
Signed-off-by: Oren Givon <oren.givon@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Newer devices can work on different buses. This means that
their configuration can be shared between different buses.
Hence the configuration structures should exported to all
the buses and not only to PCIE. Change this.
Note that this requires all the fields to be the same
amongst the buses. If differences will appear, we can always
define a part that is bus dependent. Today, this is not
needed.
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
7000.c was released as GPL only by mistake: it should be
dual licensed - GPL / BSD.
The file that contains the license in the kernel is COPYING
and not LICENSE.GPL.
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Since we will have several forms of NVM (EEPROM, OTP, etc.)
and they will have different layouts, make the parsed data
more generic. This allows functional code to be independent
of a specific layout.
Also change some variables and function names from having
"eeprom" to "nvm" in their name.
Signed-off-by: Eytan Lifshitz <eytan.lifshitz@intel.com>
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Functions that implement the transport API are prefixed by
iwl_trans_pcie_, the others by iwl_pcie_.
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Newer devices use 32 bit for boost register,
set the correct value for it.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Commit 7c5ba4a830 ("iwlwifi: move queue
watchdog into transport") introduced the named constant
'IWL_WATCHHDOG_DISABLED'. Rename it to 'IWL_WATCHDOG_DISABLED'.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
The EEPROM reading/parsing code is all mixed in
the driver today, and the EEPROM is parsed only
when we access data from it. This is problematic
because the NVM needs to be parsed and that is
independent of reading it. Also, the NVM format
for new devices will be different and probably
require a new parser.
Therefore refactor the reading and parsing and
create two independent components. Reading the
EEPROM requires direct hardware accesses and
therefore access to the transport, but parsing
is independent and can be done on an NVM blob.
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
There's no need to dynamically fill the HT40
band bitmap as it's a device parameter, just
put it into the HT configuration.
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Add a debugging log when using shadow
registers. Also fix a minor typo in this
connection.
Signed-off-by: Meenakshi Venkataraman <meenakshi.venkataraman@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Since they're used in the config, they
should be declared in iwl-config.h.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
Since they're used in the config, they
should be declared in iwl-config.h.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
Since they're used in the config, they
should be declared in iwl-config.h.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
