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perf test: Add test case for pmu event new style format
Add test case in automated tests suite. It checks not only the two types of pmu event stytle formats "pmu_event_name" and "cpu/pmu_event_name/", but also the different formats mixtures which are more likely to trigger parse issue. The patch set including this one has been tested by the perf automated test: ./perf test parse -v" On haswell, ivybridge and Romley platform. The patch set also has been tested on haswell by the following script. Note: please make sure that your test system support TSX and L1-dcache-loads events. Otherwise, you may want to change the events to other pmu events. [lk@localhost ~]$ cat perf_style_test.sh # hardware events + kernel pmu event with different style perf stat -x, -e cycles,mem-stores,tx-start sleep 2 perf stat -x, -e cpu-cycles,cycles-ct,cycles-t sleep 2 perf stat -x, -e cycles,cpu/cycles-ct/,cpu/cycles-t/ sleep 2 perf stat -x, -e instructions,cpu/tx-start/ sleep 2 perf stat -x, -e '{cycles,tx-start}' sleep 2 perf stat -x, -e '{cycles,cpu/tx-start/}' sleep 2 # HW Cache event + kernel pmu event with different style perf stat -x, -e L1-dcache-loads,cpu/mem-stores/,tx-start sleep 2 perf stat -x, -e L1-dcache-loads,mem-stores,cpu/tx-start/ sleep 2 perf stat -x, -e '{L1-dcache-loads,mem-stores}' sleep 2 perf stat -x, -e '{L1-dcache-loads,cpu/tx-start/}' sleep 2 # Raw event + kernel pmu event with different style: perf stat -x, -e cpu/event=0xc0,umask=0x00/,mem-loads,cpu/mem-stores/ sleep 2 perf stat -x, -e cpu/event=0xc0,umask=0x00/,tx-start,cpu/el-start/ sleep 2 perf stat -x, -e '{cpu/event=0xc0,umask=0x00/,tx-start}' sleep 2 Signed-off-by: Kan Liang <kan.liang@intel.com> Acked-by: Jiri Olsa <jolsa@redhat.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Link: http://lkml.kernel.org/r/1412694532-23391-5-git-send-email-kan.liang@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -457,6 +457,36 @@ static int test__checkevent_pmu_events(struct perf_evlist *evlist)
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return 0;
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}
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static int test__checkevent_pmu_events_mix(struct perf_evlist *evlist)
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{
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struct perf_evsel *evsel = perf_evlist__first(evlist);
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/* pmu-event:u */
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TEST_ASSERT_VAL("wrong number of entries", 2 == evlist->nr_entries);
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TEST_ASSERT_VAL("wrong exclude_user",
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!evsel->attr.exclude_user);
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TEST_ASSERT_VAL("wrong exclude_kernel",
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evsel->attr.exclude_kernel);
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TEST_ASSERT_VAL("wrong exclude_hv", evsel->attr.exclude_hv);
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TEST_ASSERT_VAL("wrong precise_ip", !evsel->attr.precise_ip);
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TEST_ASSERT_VAL("wrong pinned", !evsel->attr.pinned);
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/* cpu/pmu-event/u*/
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evsel = perf_evsel__next(evsel);
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TEST_ASSERT_VAL("wrong number of entries", 2 == evlist->nr_entries);
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TEST_ASSERT_VAL("wrong type", PERF_TYPE_RAW == evsel->attr.type);
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TEST_ASSERT_VAL("wrong exclude_user",
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!evsel->attr.exclude_user);
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TEST_ASSERT_VAL("wrong exclude_kernel",
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evsel->attr.exclude_kernel);
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TEST_ASSERT_VAL("wrong exclude_hv", evsel->attr.exclude_hv);
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TEST_ASSERT_VAL("wrong precise_ip", !evsel->attr.precise_ip);
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TEST_ASSERT_VAL("wrong pinned", !evsel->attr.pinned);
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return 0;
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}
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static int test__checkterms_simple(struct list_head *terms)
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{
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struct parse_events_term *term;
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@ -1554,6 +1584,12 @@ static int test_pmu_events(void)
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e.check = test__checkevent_pmu_events;
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ret = test_event(&e);
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if (ret)
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break;
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snprintf(name, MAX_NAME, "%s:u,cpu/event=%s/u", ent->d_name, ent->d_name);
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e.name = name;
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e.check = test__checkevent_pmu_events_mix;
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ret = test_event(&e);
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#undef MAX_NAME
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}
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