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drm/i915/gvt: Reduce rcs mocs switch latency

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Use I915_WRITE_FW instead of I915_WRITE to reduce overhead.
The overall mmio switch latency lowers from ~600us to ~180us.

Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
This commit is contained in:
Changbin Du 2017-10-30 14:19:15 +08:00 committed by Zhenyu Wang
parent 0bde438b7e
commit ffe2a503b0
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/i915/gvt/render.c
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@ -209,7 +209,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id)
offset.reg = regs[ring_id];
for (i = 0; i < 64; i++) {
gen9_render_mocs[ring_id][i] = I915_READ_FW(offset);
I915_WRITE(offset, vgpu_vreg(vgpu, offset));
I915_WRITE_FW(offset, vgpu_vreg(vgpu, offset));
offset.reg += 4;
}