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ARM: dts: alpine: add valid clock-frequency values

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Update the Alpine clock-frequency values with valid default values. The
bootloader can still update these values if needed, but at least we can
boot if it does not.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
This commit is contained in:
Antoine Tenart 2017-03-29 11:38:27 +02:00
parent 5254588801
commit ffdc394e1b
1 changed files with 7 additions and 7 deletions
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14
arch/arm/boot/dts/alpine.dtsi
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@ -41,28 +41,28 @@ cpu@0 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <0>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <1700000000>;
};
cpu@1 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <1>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <1700000000>;
};
cpu@2 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <2>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <1700000000>;
};
cpu@3 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <3>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <1700000000>;
};
};
@ -81,7 +81,7 @@ arch-timer {
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <50000000>;
};
/* Interrupt Controller */
@ -123,7 +123,7 @@ pmu {
uart0: uart@fd883000 {
compatible = "ns16550a";
reg = <0x0 0xfd883000 0x0 0x1000>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <375000000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@ -132,7 +132,7 @@ uart0: uart@fd883000 {
uart1: uart@fd884000 {
compatible = "ns16550a";
reg = <0x0 0xfd884000 0x0 0x1000>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <375000000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;