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drm/i915/icl: apply Display WA #1178 to fix type C dongles
Display WA #1178 is meant to fix Aux channel voltage swing too low with some type C dongles. It applies to external ports on combo phy. On Icelake this is port A and B when those are not eDP. v2: follow the spec to the letter: include Aux A and just check if it's not eDP instead of checking only for Aux B. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181012215758.25342-1-lucas.demarchi@intel.com
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@ -8934,6 +8934,15 @@ enum skl_power_gate {
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#define CNL_AUX_ANAOVRD1_ENABLE (1 << 16)
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#define CNL_AUX_ANAOVRD1_LDO_BYPASS (1 << 23)
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#define _ICL_AUX_REG_IDX(pw_idx) ((pw_idx) - ICL_PW_CTL_IDX_AUX_A)
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#define _ICL_AUX_ANAOVRD1_A 0x162398
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#define _ICL_AUX_ANAOVRD1_B 0x6C398
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#define ICL_AUX_ANAOVRD1(pw_idx) _MMIO(_PICK(_ICL_AUX_REG_IDX(pw_idx), \
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_ICL_AUX_ANAOVRD1_A, \
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_ICL_AUX_ANAOVRD1_B))
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#define ICL_AUX_ANAOVRD1_LDO_BYPASS (1 << 7)
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#define ICL_AUX_ANAOVRD1_ENABLE (1 << 0)
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/* HDCP Key Registers */
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#define HDCP_KEY_CONF _MMIO(0x66c00)
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#define HDCP_AKSV_SEND_TRIGGER BIT(31)
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@ -436,6 +436,15 @@ icl_combo_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
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I915_WRITE(ICL_PORT_CL_DW12(port), val | ICL_LANE_ENABLE_AUX);
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hsw_wait_for_power_well_enable(dev_priv, power_well);
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/* Display WA #1178: icl */
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if (IS_ICELAKE(dev_priv) &&
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pw_idx >= ICL_PW_CTL_IDX_AUX_A && pw_idx <= ICL_PW_CTL_IDX_AUX_B &&
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!intel_bios_is_port_edp(dev_priv, port)) {
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val = I915_READ(ICL_AUX_ANAOVRD1(pw_idx));
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val |= ICL_AUX_ANAOVRD1_ENABLE | ICL_AUX_ANAOVRD1_LDO_BYPASS;
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I915_WRITE(ICL_AUX_ANAOVRD1(pw_idx), val);
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}
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}
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static void
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