mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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[ARM] rpc: acornscsi: convert hardware accessors to take 'AS_Host *'
Acked-by: James Bottomley <James.Bottomley@HansenPartnership.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
Russell King
parent
324b9337f2
commit
ffd7858dd8
@ -203,44 +203,41 @@ static void acornscsi_abortcmd(AS_Host *host, unsigned char tag);
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* Miscellaneous
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*/
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static inline void
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sbic_arm_write(unsigned int io_port, int reg, int value)
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static inline void sbic_arm_write(AS_Host *host, unsigned int reg, unsigned int value)
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{
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__raw_writeb(reg, io_port);
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__raw_writeb(value, io_port + 4);
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__raw_writeb(reg, host->scsi.io_port);
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__raw_writeb(value, host->scsi.io_port + 4);
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}
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#define sbic_arm_writenext(io,val) \
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__raw_writeb((val), (io) + 4)
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#define sbic_arm_writenext(host,val) \
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__raw_writeb((val), (host)->scsi.io_port + 4)
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static inline
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int sbic_arm_read(unsigned int io_port, int reg)
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static inline int sbic_arm_read(AS_Host *host, unsigned int reg)
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{
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if(reg == SBIC_ASR)
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return __raw_readl(io_port) & 255;
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__raw_writeb(reg, io_port);
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return __raw_readl(io_port + 4) & 255;
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return __raw_readl(host->scsi.io_port) & 255;
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__raw_writeb(reg, host->scsi.io_port);
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return __raw_readl(host->scsi.io_port + 4) & 255;
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}
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#define sbic_arm_readnext(io) \
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__raw_readb((io) + 4)
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#define sbic_arm_readnext(host) \
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__raw_readb((host)->scsi.io_port + 4)
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#ifdef USE_DMAC
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#define dmac_read(io_port,reg) \
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inb((io_port) + (reg))
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#define dmac_read(host,reg) \
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inb((host)->dma.io_port + (reg))
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#define dmac_write(io_port,reg,value) \
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({ outb((value), (io_port) + (reg)); })
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#define dmac_write(host,reg,value) \
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({ outb((value), (host)->dma.io_port + (reg)); })
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#define dmac_clearintr(io_port) \
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({ outb(0, (io_port)); })
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#define dmac_clearintr(host) \
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({ outb(0, (host)->dma.io_intr_clear); })
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static inline
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unsigned int dmac_address(unsigned int io_port)
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static inline unsigned int dmac_address(AS_Host *host)
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{
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return dmac_read(io_port, DMAC_TXADRHI) << 16 |
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dmac_read(io_port, DMAC_TXADRMD) << 8 |
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dmac_read(io_port, DMAC_TXADRLO);
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return dmac_read(host, DMAC_TXADRHI) << 16 |
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dmac_read(host, DMAC_TXADRMD) << 8 |
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dmac_read(host, DMAC_TXADRLO);
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}
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static
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@ -248,15 +245,15 @@ void acornscsi_dumpdma(AS_Host *host, char *where)
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{
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unsigned int mode, addr, len;
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mode = dmac_read(host->dma.io_port, DMAC_MODECON);
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addr = dmac_address(host->dma.io_port);
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len = dmac_read(host->dma.io_port, DMAC_TXCNTHI) << 8 |
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dmac_read(host->dma.io_port, DMAC_TXCNTLO);
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mode = dmac_read(host, DMAC_MODECON);
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addr = dmac_address(host);
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len = dmac_read(host, DMAC_TXCNTHI) << 8 |
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dmac_read(host, DMAC_TXCNTLO);
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printk("scsi%d: %s: DMAC %02x @%06x+%04x msk %02x, ",
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host->host->host_no, where,
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mode, addr, (len + 1) & 0xffff,
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dmac_read(host->dma.io_port, DMAC_MASKREG));
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dmac_read(host, DMAC_MASKREG));
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printk("DMA @%06x, ", host->dma.start_addr);
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printk("BH @%p +%04x, ", host->scsi.SCp.ptr,
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@ -272,9 +269,9 @@ unsigned long acornscsi_sbic_xfcount(AS_Host *host)
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{
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unsigned long length;
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length = sbic_arm_read(host->scsi.io_port, SBIC_TRANSCNTH) << 16;
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length |= sbic_arm_readnext(host->scsi.io_port) << 8;
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length |= sbic_arm_readnext(host->scsi.io_port);
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length = sbic_arm_read(host, SBIC_TRANSCNTH) << 16;
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length |= sbic_arm_readnext(host) << 8;
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length |= sbic_arm_readnext(host);
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return length;
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}
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@ -285,7 +282,7 @@ acornscsi_sbic_wait(AS_Host *host, int stat_mask, int stat, int timeout, char *m
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int asr;
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do {
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asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR);
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asr = sbic_arm_read(host, SBIC_ASR);
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if ((asr & stat_mask) == stat)
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return 0;
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@ -304,7 +301,7 @@ int acornscsi_sbic_issuecmd(AS_Host *host, int command)
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if (acornscsi_sbic_wait(host, ASR_CIP, 0, 1000, "issuing command"))
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return -1;
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sbic_arm_write(host->scsi.io_port, SBIC_CMND, command);
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sbic_arm_write(host, SBIC_CMND, command);
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return 0;
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}
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@ -353,12 +350,12 @@ void acornscsi_resetcard(AS_Host *host)
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printk("scsi%d: timeout while resetting card\n",
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host->host->host_no);
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sbic_arm_read(host->scsi.io_port, SBIC_ASR);
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sbic_arm_read(host->scsi.io_port, SBIC_SSR);
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sbic_arm_read(host, SBIC_ASR);
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sbic_arm_read(host, SBIC_SSR);
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/* setup sbic - WD33C93A */
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sbic_arm_write(host->scsi.io_port, SBIC_OWNID, OWNID_EAF | host->host->this_id);
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sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_RESET);
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sbic_arm_write(host, SBIC_OWNID, OWNID_EAF | host->host->this_id);
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sbic_arm_write(host, SBIC_CMND, CMND_RESET);
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/*
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* Command should cause a reset interrupt
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@ -374,26 +371,26 @@ void acornscsi_resetcard(AS_Host *host)
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printk("scsi%d: timeout while resetting card\n",
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host->host->host_no);
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sbic_arm_read(host->scsi.io_port, SBIC_ASR);
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if (sbic_arm_read(host->scsi.io_port, SBIC_SSR) != 0x01)
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sbic_arm_read(host, SBIC_ASR);
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if (sbic_arm_read(host, SBIC_SSR) != 0x01)
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printk(KERN_CRIT "scsi%d: WD33C93A didn't give enhanced reset interrupt\n",
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host->host->host_no);
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sbic_arm_write(host->scsi.io_port, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI);
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sbic_arm_write(host->scsi.io_port, SBIC_TIMEOUT, TIMEOUT_TIME);
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sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA);
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sbic_arm_write(host->scsi.io_port, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP);
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sbic_arm_write(host, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI);
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sbic_arm_write(host, SBIC_TIMEOUT, TIMEOUT_TIME);
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sbic_arm_write(host, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA);
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sbic_arm_write(host, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP);
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host->card.page_reg = 0x40;
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outb(host->card.page_reg, host->card.io_page);
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/* setup dmac - uPC71071 */
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dmac_write(host->dma.io_port, DMAC_INIT, 0);
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dmac_write(host, DMAC_INIT, 0);
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#ifdef USE_DMAC
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dmac_write(host->dma.io_port, DMAC_INIT, INIT_8BIT);
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dmac_write(host->dma.io_port, DMAC_CHANNEL, CHANNEL_0);
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dmac_write(host->dma.io_port, DMAC_DEVCON0, INIT_DEVCON0);
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dmac_write(host->dma.io_port, DMAC_DEVCON1, INIT_DEVCON1);
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dmac_write(host, DMAC_INIT, INIT_8BIT);
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dmac_write(host, DMAC_CHANNEL, CHANNEL_0);
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dmac_write(host, DMAC_DEVCON0, INIT_DEVCON0);
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dmac_write(host, DMAC_DEVCON1, INIT_DEVCON1);
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#endif
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host->SCpnt = NULL;
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@ -741,9 +738,9 @@ intr_ret_t acornscsi_kick(AS_Host *host)
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* If we have an interrupt pending, then we may have been reselected.
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* In this case, we don't want to write to the registers
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*/
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if (!(sbic_arm_read(host->scsi.io_port, SBIC_ASR) & (ASR_INT|ASR_BSY|ASR_CIP))) {
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sbic_arm_write(host->scsi.io_port, SBIC_DESTID, SCpnt->device->id);
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sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_SELWITHATN);
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if (!(sbic_arm_read(host, SBIC_ASR) & (ASR_INT|ASR_BSY|ASR_CIP))) {
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sbic_arm_write(host, SBIC_DESTID, SCpnt->device->id);
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sbic_arm_write(host, SBIC_CMND, CMND_SELWITHATN);
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}
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/*
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@ -807,7 +804,7 @@ static void acornscsi_done(AS_Host *host, struct scsi_cmnd **SCpntp,
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struct scsi_cmnd *SCpnt = *SCpntp;
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/* clean up */
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sbic_arm_write(host->scsi.io_port, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP);
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sbic_arm_write(host, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP);
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host->stats.fins += 1;
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@ -1008,8 +1005,8 @@ void acornscsi_data_write(AS_Host *host, char *ptr,
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static inline
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void acornscsi_dma_stop(AS_Host *host)
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{
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dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON);
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dmac_clearintr(host->dma.io_intr_clear);
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dmac_write(host, DMAC_MASKREG, MASK_ON);
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dmac_clearintr(host);
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#if (DEBUG & DEBUG_DMA)
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DBG(host->SCpnt, acornscsi_dumpdma(host, "stop"));
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@ -1031,7 +1028,7 @@ void acornscsi_dma_setup(AS_Host *host, dmadir_t direction)
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host->dma.direction = direction;
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dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON);
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dmac_write(host, DMAC_MASKREG, MASK_ON);
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if (direction == DMA_OUT) {
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#if (DEBUG & DEBUG_NO_WRITE)
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@ -1062,13 +1059,13 @@ void acornscsi_dma_setup(AS_Host *host, dmadir_t direction)
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length);
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length -= 1;
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dmac_write(host->dma.io_port, DMAC_TXCNTLO, length);
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dmac_write(host->dma.io_port, DMAC_TXCNTHI, length >> 8);
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dmac_write(host->dma.io_port, DMAC_TXADRLO, address);
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dmac_write(host->dma.io_port, DMAC_TXADRMD, address >> 8);
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dmac_write(host->dma.io_port, DMAC_TXADRHI, 0);
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dmac_write(host->dma.io_port, DMAC_MODECON, mode);
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dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_OFF);
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dmac_write(host, DMAC_TXCNTLO, length);
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dmac_write(host, DMAC_TXCNTHI, length >> 8);
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dmac_write(host, DMAC_TXADRLO, address);
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dmac_write(host, DMAC_TXADRMD, address >> 8);
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dmac_write(host, DMAC_TXADRHI, 0);
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dmac_write(host, DMAC_MODECON, mode);
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dmac_write(host, DMAC_MASKREG, MASK_OFF);
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#if (DEBUG & DEBUG_DMA)
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DBG(host->SCpnt, acornscsi_dumpdma(host, "strt"));
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@ -1088,8 +1085,8 @@ void acornscsi_dma_setup(AS_Host *host, dmadir_t direction)
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static
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void acornscsi_dma_cleanup(AS_Host *host)
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{
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dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON);
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dmac_clearintr(host->dma.io_intr_clear);
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dmac_write(host, DMAC_MASKREG, MASK_ON);
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dmac_clearintr(host);
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/*
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* Check for a pending transfer
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@ -1116,7 +1113,7 @@ void acornscsi_dma_cleanup(AS_Host *host)
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/*
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* Calculate number of bytes transferred from DMA.
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*/
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transferred = dmac_address(host->dma.io_port) - host->dma.start_addr;
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transferred = dmac_address(host) - host->dma.start_addr;
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host->dma.transferred += transferred;
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if (host->dma.direction == DMA_IN)
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@ -1152,13 +1149,13 @@ void acornscsi_dma_intr(AS_Host *host)
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DBG(host->SCpnt, acornscsi_dumpdma(host, "inti"));
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#endif
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dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON);
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dmac_clearintr(host->dma.io_intr_clear);
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dmac_write(host, DMAC_MASKREG, MASK_ON);
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dmac_clearintr(host);
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/*
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* Calculate amount transferred via DMA
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*/
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transferred = dmac_address(host->dma.io_port) - host->dma.start_addr;
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transferred = dmac_address(host) - host->dma.start_addr;
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host->dma.transferred += transferred;
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/*
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@ -1190,12 +1187,12 @@ void acornscsi_dma_intr(AS_Host *host)
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length);
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length -= 1;
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dmac_write(host->dma.io_port, DMAC_TXCNTLO, length);
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dmac_write(host->dma.io_port, DMAC_TXCNTHI, length >> 8);
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dmac_write(host->dma.io_port, DMAC_TXADRLO, address);
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dmac_write(host->dma.io_port, DMAC_TXADRMD, address >> 8);
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dmac_write(host->dma.io_port, DMAC_TXADRHI, 0);
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dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_OFF);
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dmac_write(host, DMAC_TXCNTLO, length);
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dmac_write(host, DMAC_TXCNTHI, length >> 8);
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dmac_write(host, DMAC_TXADRLO, address);
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dmac_write(host, DMAC_TXADRMD, address >> 8);
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dmac_write(host, DMAC_TXADRHI, 0);
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dmac_write(host, DMAC_MASKREG, MASK_OFF);
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#if (DEBUG & DEBUG_DMA)
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DBG(host->SCpnt, acornscsi_dumpdma(host, "into"));
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@ -1209,15 +1206,15 @@ void acornscsi_dma_intr(AS_Host *host)
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* attention condition. We continue giving one byte until
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* the device recognises the attention.
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*/
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if (dmac_read(host->dma.io_port, DMAC_STATUS) & STATUS_RQ0) {
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if (dmac_read(host, DMAC_STATUS) & STATUS_RQ0) {
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acornscsi_abortcmd(host, host->SCpnt->tag);
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dmac_write(host->dma.io_port, DMAC_TXCNTLO, 0);
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dmac_write(host->dma.io_port, DMAC_TXCNTHI, 0);
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dmac_write(host->dma.io_port, DMAC_TXADRLO, 0);
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dmac_write(host->dma.io_port, DMAC_TXADRMD, 0);
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dmac_write(host->dma.io_port, DMAC_TXADRHI, 0);
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dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_OFF);
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dmac_write(host, DMAC_TXCNTLO, 0);
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dmac_write(host, DMAC_TXCNTHI, 0);
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dmac_write(host, DMAC_TXADRLO, 0);
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dmac_write(host, DMAC_TXADRMD, 0);
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dmac_write(host, DMAC_TXADRHI, 0);
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dmac_write(host, DMAC_MASKREG, MASK_OFF);
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}
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#endif
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}
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@ -1271,9 +1268,9 @@ void acornscsi_dma_adjust(AS_Host *host)
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host->dma.xfer_setup = 0;
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else {
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transferred += host->dma.start_addr;
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dmac_write(host->dma.io_port, DMAC_TXADRLO, transferred);
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dmac_write(host->dma.io_port, DMAC_TXADRMD, transferred >> 8);
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dmac_write(host->dma.io_port, DMAC_TXADRHI, transferred >> 16);
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dmac_write(host, DMAC_TXADRLO, transferred);
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dmac_write(host, DMAC_TXADRMD, transferred >> 8);
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dmac_write(host, DMAC_TXADRHI, transferred >> 16);
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#if (DEBUG & (DEBUG_DMA|DEBUG_WRITE))
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DBG(host->SCpnt, acornscsi_dumpdma(host, "adjo"));
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#endif
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@ -1292,12 +1289,12 @@ acornscsi_write_pio(AS_Host *host, char *bytes, int *ptr, int len, unsigned int
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int my_ptr = *ptr;
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while (my_ptr < len) {
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asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR);
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asr = sbic_arm_read(host, SBIC_ASR);
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if (asr & ASR_DBR) {
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timeout = max_timeout;
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sbic_arm_write(host->scsi.io_port, SBIC_DATA, bytes[my_ptr++]);
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sbic_arm_write(host, SBIC_DATA, bytes[my_ptr++]);
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} else if (asr & ASR_INT)
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break;
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else if (--timeout == 0)
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@ -1320,9 +1317,9 @@ acornscsi_sendcommand(AS_Host *host)
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{
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struct scsi_cmnd *SCpnt = host->SCpnt;
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sbic_arm_write(host->scsi.io_port, SBIC_TRANSCNTH, 0);
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sbic_arm_writenext(host->scsi.io_port, 0);
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sbic_arm_writenext(host->scsi.io_port, SCpnt->cmd_len - host->scsi.SCp.sent_command);
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sbic_arm_write(host, SBIC_TRANSCNTH, 0);
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||||
sbic_arm_writenext(host, 0);
|
||||
sbic_arm_writenext(host, SCpnt->cmd_len - host->scsi.SCp.sent_command);
|
||||
|
||||
acornscsi_sbic_issuecmd(host, CMND_XFERINFO);
|
||||
|
||||
@ -1351,7 +1348,7 @@ void acornscsi_sendmessage(AS_Host *host)
|
||||
|
||||
acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "sending message 1");
|
||||
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_DATA, NOP);
|
||||
sbic_arm_write(host, SBIC_DATA, NOP);
|
||||
|
||||
host->scsi.last_message = NOP;
|
||||
#if (DEBUG & DEBUG_MESSAGES)
|
||||
@ -1365,7 +1362,7 @@ void acornscsi_sendmessage(AS_Host *host)
|
||||
|
||||
acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "sending message 2");
|
||||
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_DATA, msg->msg[0]);
|
||||
sbic_arm_write(host, SBIC_DATA, msg->msg[0]);
|
||||
|
||||
host->scsi.last_message = msg->msg[0];
|
||||
#if (DEBUG & DEBUG_MESSAGES)
|
||||
@ -1382,9 +1379,9 @@ void acornscsi_sendmessage(AS_Host *host)
|
||||
* initiator. This provides an interlock so that the
|
||||
* initiator can determine which message byte is rejected.
|
||||
*/
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_TRANSCNTH, 0);
|
||||
sbic_arm_writenext(host->scsi.io_port, 0);
|
||||
sbic_arm_writenext(host->scsi.io_port, message_length);
|
||||
sbic_arm_write(host, SBIC_TRANSCNTH, 0);
|
||||
sbic_arm_writenext(host, 0);
|
||||
sbic_arm_writenext(host, message_length);
|
||||
acornscsi_sbic_issuecmd(host, CMND_XFERINFO);
|
||||
|
||||
msgnr = 0;
|
||||
@ -1421,7 +1418,7 @@ void acornscsi_readstatusbyte(AS_Host *host)
|
||||
{
|
||||
acornscsi_sbic_issuecmd(host, CMND_XFERINFO|CMND_SBT);
|
||||
acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "reading status byte");
|
||||
host->scsi.SCp.Status = sbic_arm_read(host->scsi.io_port, SBIC_DATA);
|
||||
host->scsi.SCp.Status = sbic_arm_read(host, SBIC_DATA);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -1438,12 +1435,12 @@ unsigned char acornscsi_readmessagebyte(AS_Host *host)
|
||||
|
||||
acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "for message byte");
|
||||
|
||||
message = sbic_arm_read(host->scsi.io_port, SBIC_DATA);
|
||||
message = sbic_arm_read(host, SBIC_DATA);
|
||||
|
||||
/* wait for MSGIN-XFER-PAUSED */
|
||||
acornscsi_sbic_wait(host, ASR_INT, ASR_INT, 1000, "for interrupt after message byte");
|
||||
|
||||
sbic_arm_read(host->scsi.io_port, SBIC_SSR);
|
||||
sbic_arm_read(host, SBIC_SSR);
|
||||
|
||||
return message;
|
||||
}
|
||||
@ -1480,7 +1477,7 @@ void acornscsi_message(AS_Host *host)
|
||||
|
||||
/* wait for next msg-in */
|
||||
acornscsi_sbic_wait(host, ASR_INT, ASR_INT, 1000, "for interrupt after negate ack");
|
||||
sbic_arm_read(host->scsi.io_port, SBIC_SSR);
|
||||
sbic_arm_read(host, SBIC_SSR);
|
||||
}
|
||||
} while (msgidx < msglen);
|
||||
|
||||
@ -1602,7 +1599,7 @@ void acornscsi_message(AS_Host *host)
|
||||
host->host->host_no, acornscsi_target(host));
|
||||
host->device[host->SCpnt->device->id].sync_xfer = SYNCHTRANSFER_2DBA;
|
||||
host->device[host->SCpnt->device->id].sync_state = SYNC_ASYNCHRONOUS;
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer);
|
||||
sbic_arm_write(host, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer);
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -1652,7 +1649,7 @@ void acornscsi_message(AS_Host *host)
|
||||
host->device[host->SCpnt->device->id].sync_xfer =
|
||||
calc_sync_xfer(period * 4, length);
|
||||
}
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer);
|
||||
sbic_arm_write(host, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer);
|
||||
break;
|
||||
#else
|
||||
/* We do not accept synchronous transfers. Respond with a
|
||||
@ -1792,10 +1789,10 @@ int acornscsi_starttransfer(AS_Host *host)
|
||||
|
||||
residual = scsi_bufflen(host->SCpnt) - host->scsi.SCp.scsi_xferred;
|
||||
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer);
|
||||
sbic_arm_writenext(host->scsi.io_port, residual >> 16);
|
||||
sbic_arm_writenext(host->scsi.io_port, residual >> 8);
|
||||
sbic_arm_writenext(host->scsi.io_port, residual);
|
||||
sbic_arm_write(host, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer);
|
||||
sbic_arm_writenext(host, residual >> 16);
|
||||
sbic_arm_writenext(host, residual >> 8);
|
||||
sbic_arm_writenext(host, residual);
|
||||
acornscsi_sbic_issuecmd(host, CMND_XFERINFO);
|
||||
return 1;
|
||||
}
|
||||
@ -1816,7 +1813,7 @@ int acornscsi_reconnect(AS_Host *host)
|
||||
{
|
||||
unsigned int target, lun, ok = 0;
|
||||
|
||||
target = sbic_arm_read(host->scsi.io_port, SBIC_SOURCEID);
|
||||
target = sbic_arm_read(host, SBIC_SOURCEID);
|
||||
|
||||
if (!(target & 8))
|
||||
printk(KERN_ERR "scsi%d: invalid source id after reselection "
|
||||
@ -1832,7 +1829,7 @@ int acornscsi_reconnect(AS_Host *host)
|
||||
host->SCpnt = NULL;
|
||||
}
|
||||
|
||||
lun = sbic_arm_read(host->scsi.io_port, SBIC_DATA) & 7;
|
||||
lun = sbic_arm_read(host, SBIC_DATA) & 7;
|
||||
|
||||
host->scsi.reconnected.target = target;
|
||||
host->scsi.reconnected.lun = lun;
|
||||
@ -1952,7 +1949,7 @@ static
|
||||
void acornscsi_abortcmd(AS_Host *host, unsigned char tag)
|
||||
{
|
||||
host->scsi.phase = PHASE_ABORTED;
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_ASSERTATN);
|
||||
sbic_arm_write(host, SBIC_CMND, CMND_ASSERTATN);
|
||||
|
||||
msgqueue_flush(&host->scsi.msgs);
|
||||
#ifdef CONFIG_SCSI_ACORNSCSI_TAGGED_QUEUE
|
||||
@ -1979,11 +1976,11 @@ intr_ret_t acornscsi_sbicintr(AS_Host *host, int in_irq)
|
||||
{
|
||||
unsigned int asr, ssr;
|
||||
|
||||
asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR);
|
||||
asr = sbic_arm_read(host, SBIC_ASR);
|
||||
if (!(asr & ASR_INT))
|
||||
return INTR_IDLE;
|
||||
|
||||
ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR);
|
||||
ssr = sbic_arm_read(host, SBIC_SSR);
|
||||
|
||||
#if (DEBUG & DEBUG_PHASES)
|
||||
print_sbic_status(asr, ssr, host->scsi.phase);
|
||||
@ -1999,15 +1996,15 @@ intr_ret_t acornscsi_sbicintr(AS_Host *host, int in_irq)
|
||||
printk(KERN_ERR "scsi%d: reset in standard mode but wanted advanced mode.\n",
|
||||
host->host->host_no);
|
||||
/* setup sbic - WD33C93A */
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_OWNID, OWNID_EAF | host->host->this_id);
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_RESET);
|
||||
sbic_arm_write(host, SBIC_OWNID, OWNID_EAF | host->host->this_id);
|
||||
sbic_arm_write(host, SBIC_CMND, CMND_RESET);
|
||||
return INTR_IDLE;
|
||||
|
||||
case 0x01: /* reset state - advanced */
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI);
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_TIMEOUT, TIMEOUT_TIME);
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA);
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP);
|
||||
sbic_arm_write(host, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI);
|
||||
sbic_arm_write(host, SBIC_TIMEOUT, TIMEOUT_TIME);
|
||||
sbic_arm_write(host, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA);
|
||||
sbic_arm_write(host, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP);
|
||||
msgqueue_flush(&host->scsi.msgs);
|
||||
return INTR_IDLE;
|
||||
|
||||
@ -2025,10 +2022,10 @@ intr_ret_t acornscsi_sbicintr(AS_Host *host, int in_irq)
|
||||
msgqueue_flush(&host->scsi.msgs);
|
||||
host->dma.transferred = host->scsi.SCp.scsi_xferred;
|
||||
/* 33C93 gives next interrupt indicating bus phase */
|
||||
asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR);
|
||||
asr = sbic_arm_read(host, SBIC_ASR);
|
||||
if (!(asr & ASR_INT))
|
||||
break;
|
||||
ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR);
|
||||
ssr = sbic_arm_read(host, SBIC_SSR);
|
||||
ADD_STATUS(8, ssr, host->scsi.phase, 1);
|
||||
ADD_STATUS(host->SCpnt->device->id, ssr, host->scsi.phase, 1);
|
||||
goto connected;
|
||||
@ -2655,7 +2652,7 @@ static enum res_abort acornscsi_do_abort(AS_Host *host, struct scsi_cmnd *SCpnt)
|
||||
* busylun bit.
|
||||
*/
|
||||
case PHASE_CONNECTED:
|
||||
sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_DISCONNECT);
|
||||
sbic_arm_write(host, SBIC_CMND, CMND_DISCONNECT);
|
||||
host->SCpnt = NULL;
|
||||
res = res_success_clear;
|
||||
break;
|
||||
@ -2699,8 +2696,8 @@ int acornscsi_abort(struct scsi_cmnd *SCpnt)
|
||||
#if (DEBUG & DEBUG_ABORT)
|
||||
{
|
||||
int asr, ssr;
|
||||
asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR);
|
||||
ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR);
|
||||
asr = sbic_arm_read(host, SBIC_ASR);
|
||||
ssr = sbic_arm_read(host, SBIC_SSR);
|
||||
|
||||
printk(KERN_WARNING "acornscsi_abort: ");
|
||||
print_sbic_status(asr, ssr, host->scsi.phase);
|
||||
@ -2780,8 +2777,8 @@ int acornscsi_bus_reset(struct scsi_cmnd *SCpnt)
|
||||
{
|
||||
int asr, ssr;
|
||||
|
||||
asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR);
|
||||
ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR);
|
||||
asr = sbic_arm_read(host, SBIC_ASR);
|
||||
ssr = sbic_arm_read(host, SBIC_SSR);
|
||||
|
||||
printk(KERN_WARNING "acornscsi_reset: ");
|
||||
print_sbic_status(asr, ssr, host->scsi.phase);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user