mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
mt76: mt76x02: fix some checkpatch warnings
This fixes the following checkpatch warnings: ERROR: code indent should use tabs where possible CHECK: Alignment should match open parenthesis CHECK: No space is necessary after a cast CHECK: Please don't use multiple blank lines CHECK: Avoid precedence issues in macro WARNING: Statements should start on a tabstop WARNING: Unnecessary space before function pointer arguments Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
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0dacf9d3ab
commit
ff97c52a3a
@ -230,7 +230,8 @@ mt76x0_phy_set_band(struct mt76x02_dev *dev, enum nl80211_band band)
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}
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}
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static void
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static void
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mt76x0_phy_set_chan_rf_params(struct mt76x02_dev *dev, u8 channel, u16 rf_bw_band)
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mt76x0_phy_set_chan_rf_params(struct mt76x02_dev *dev, u8 channel,
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u16 rf_bw_band)
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{
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{
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const struct mt76x0_freq_item *freq_item;
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const struct mt76x0_freq_item *freq_item;
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u16 rf_band = rf_bw_band & 0xff00;
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u16 rf_band = rf_bw_band & 0xff00;
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@ -252,9 +253,9 @@ mt76x0_phy_set_chan_rf_params(struct mt76x02_dev *dev, u8 channel, u16 rf_bw_ban
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rf_band = mt76x0_frequency_plan[i].band;
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rf_band = mt76x0_frequency_plan[i].band;
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if (b_sdm)
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if (b_sdm)
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freq_item = &(mt76x0_sdm_frequency_plan[i]);
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freq_item = &mt76x0_sdm_frequency_plan[i];
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else
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else
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freq_item = &(mt76x0_frequency_plan[i]);
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freq_item = &mt76x0_frequency_plan[i];
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mt76x0_rf_wr(dev, MT_RF(0, 37), freq_item->pllR37);
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mt76x0_rf_wr(dev, MT_RF(0, 37), freq_item->pllR37);
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mt76x0_rf_wr(dev, MT_RF(0, 36), freq_item->pllR36);
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mt76x0_rf_wr(dev, MT_RF(0, 36), freq_item->pllR36);
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@ -359,10 +360,11 @@ mt76x0_phy_set_chan_rf_params(struct mt76x02_dev *dev, u8 channel, u16 rf_bw_ban
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band = (rf_band & RF_G_BAND) ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
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band = (rf_band & RF_G_BAND) ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
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if (mt76x02_ext_pa_enabled(dev, band)) {
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if (mt76x02_ext_pa_enabled(dev, band)) {
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/*
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/* MT_RF_MISC (offset: 0x0518)
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MT_RF_MISC (offset: 0x0518)
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* [2]1'b1: enable external A band PA
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[2]1'b1: enable external A band PA, 1'b0: disable external A band PA
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* 1'b0: disable external A band PA
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[3]1'b1: enable external G band PA, 1'b0: disable external G band PA
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* [3]1'b1: enable external G band PA
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* 1'b0: disable external G band PA
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*/
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*/
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if (rf_band & RF_A_BAND)
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if (rf_band & RF_A_BAND)
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mt76_set(dev, MT_RF_MISC, BIT(2));
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mt76_set(dev, MT_RF_MISC, BIT(2));
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@ -385,7 +387,9 @@ mt76x0_phy_set_chan_rf_params(struct mt76x02_dev *dev, u8 channel, u16 rf_bw_ban
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mt76_wr(dev, MT_TX_ALC_CFG_1, mac_reg);
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mt76_wr(dev, MT_TX_ALC_CFG_1, mac_reg);
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} else {
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} else {
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mt76_wr(dev, MT_TX0_RF_GAIN_ATTEN, 0x686A7800);
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mt76_wr(dev, MT_TX0_RF_GAIN_ATTEN, 0x686A7800);
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/* Set Atten mode = 0 For Ext A band, Disable Tx Inc dcoc Cal. */
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/* Set Atten mode = 0
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* For Ext A band, Disable Tx Inc dcoc Cal.
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*/
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mac_reg = mt76_rr(dev, MT_TX_ALC_CFG_1);
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mac_reg = mt76_rr(dev, MT_TX_ALC_CFG_1);
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mac_reg &= 0x890400FF;
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mac_reg &= 0x890400FF;
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mt76_wr(dev, MT_TX_ALC_CFG_1, mac_reg);
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mt76_wr(dev, MT_TX_ALC_CFG_1, mac_reg);
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@ -1169,7 +1173,8 @@ static void mt76x0_phy_rf_init(struct mt76x02_dev *dev)
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if (item->bw_band == RF_BW_20)
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if (item->bw_band == RF_BW_20)
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mt76x0_rf_wr(dev, item->rf_bank_reg, item->value);
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mt76x0_rf_wr(dev, item->rf_bank_reg, item->value);
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else if (((RF_G_BAND | RF_BW_20) & item->bw_band) == (RF_G_BAND | RF_BW_20))
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else if (((RF_G_BAND | RF_BW_20) & item->bw_band) ==
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(RF_G_BAND | RF_BW_20))
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mt76x0_rf_wr(dev, item->rf_bank_reg, item->value);
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mt76x0_rf_wr(dev, item->rf_bank_reg, item->value);
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}
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}
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@ -1181,10 +1186,9 @@ static void mt76x0_phy_rf_init(struct mt76x02_dev *dev)
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}
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}
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}
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}
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/*
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/* Frequency calibration
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Frequency calibration
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* E1: B0.R22<6:0>: xo_cxo<6:0>
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E1: B0.R22<6:0>: xo_cxo<6:0>
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* E2: B0.R21<0>: xo_cxo<0>, B0.R22<7:0>: xo_cxo<8:1>
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E2: B0.R21<0>: xo_cxo<0>, B0.R22<7:0>: xo_cxo<8:1>
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*/
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*/
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mt76x0_rf_wr(dev, MT_RF(0, 22),
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mt76x0_rf_wr(dev, MT_RF(0, 22),
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min_t(u8, dev->cal.rx.freq_offset, 0xbf));
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min_t(u8, dev->cal.rx.freq_offset, 0xbf));
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@ -19,8 +19,8 @@
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#define RF_BW_80 8
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#define RF_BW_80 8
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#define MT_RF(bank, reg) ((bank) << 16 | (reg))
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#define MT_RF(bank, reg) ((bank) << 16 | (reg))
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#define MT_RF_BANK(offset) (offset >> 16)
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#define MT_RF_BANK(offset) ((offset) >> 16)
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#define MT_RF_REG(offset) (offset & 0xff)
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#define MT_RF_REG(offset) ((offset) & 0xff)
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#define MT_RF_VCO_BP_CLOSE_LOOP BIT(3)
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#define MT_RF_VCO_BP_CLOSE_LOOP BIT(3)
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#define MT_RF_VCO_BP_CLOSE_LOOP_MASK GENMASK(3, 0)
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#define MT_RF_VCO_BP_CLOSE_LOOP_MASK GENMASK(3, 0)
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@ -33,10 +33,12 @@ static struct usb_device_id mt76x0_device_table[] = {
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{ USB_DEVICE(0x7392, 0xc711) }, /* Devolo Wifi ac Stick */
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{ USB_DEVICE(0x7392, 0xc711) }, /* Devolo Wifi ac Stick */
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{ USB_DEVICE(0x0df6, 0x0079) }, /* Sitecom Europe B.V. ac Stick */
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{ USB_DEVICE(0x0df6, 0x0079) }, /* Sitecom Europe B.V. ac Stick */
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{ USB_DEVICE(0x2357, 0x0123) }, /* TP-LINK T2UHP */
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{ USB_DEVICE(0x2357, 0x0123) }, /* TP-LINK T2UHP */
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{ USB_DEVICE(0x2357, 0x0105),
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/* TP-LINK Archer T1U */
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.driver_info = 1, }, /* TP-LINK Archer T1U */
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{ USB_DEVICE(0x2357, 0x0105), .driver_info = 1, },
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{ USB_DEVICE_AND_INTERFACE_INFO(0x0E8D, 0x7630, 0xff, 0x2, 0xff)}, /* MT7630U */
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/* MT7630U */
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{ USB_DEVICE_AND_INTERFACE_INFO(0x0E8D, 0x7650, 0xff, 0x2, 0xff)}, /* MT7650U */
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{ USB_DEVICE_AND_INTERFACE_INFO(0x0E8D, 0x7630, 0xff, 0x2, 0xff)},
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/* MT7650U */
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{ USB_DEVICE_AND_INTERFACE_INFO(0x0E8D, 0x7650, 0xff, 0x2, 0xff)},
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{ 0, }
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{ 0, }
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};
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};
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@ -237,7 +239,7 @@ static int mt76x0u_probe(struct usb_interface *usb_intf,
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if (ret)
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if (ret)
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goto err;
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goto err;
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/* Disable the HW, otherwise MCU fail to initalize on hot reboot */
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/* Disable the HW, otherwise MCU fail to initialize on hot reboot */
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mt76x0_chip_onoff(dev, false, false);
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mt76x0_chip_onoff(dev, false, false);
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if (!mt76x02_wait_for_mac(mdev)) {
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if (!mt76x02_wait_for_mac(mdev)) {
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@ -275,9 +277,9 @@ static int mt76x0u_probe(struct usb_interface *usb_intf,
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static void mt76x0_disconnect(struct usb_interface *usb_intf)
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static void mt76x0_disconnect(struct usb_interface *usb_intf)
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{
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{
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struct mt76x02_dev *dev = usb_get_intfdata(usb_intf);
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struct mt76x02_dev *dev = usb_get_intfdata(usb_intf);
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bool initalized = test_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
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bool initialized = test_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
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if (!initalized)
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if (!initialized)
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return;
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return;
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ieee80211_unregister_hw(dev->mt76.hw);
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ieee80211_unregister_hw(dev->mt76.hw);
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@ -71,8 +71,8 @@ struct mt76x02_calibration {
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struct mt76x02_beacon_ops {
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struct mt76x02_beacon_ops {
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unsigned int nslots;
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unsigned int nslots;
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unsigned int slot_size;
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unsigned int slot_size;
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void (*pre_tbtt_enable) (struct mt76x02_dev *, bool);
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void (*pre_tbtt_enable)(struct mt76x02_dev *dev, bool en);
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void (*beacon_enable) (struct mt76x02_dev *, bool);
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void (*beacon_enable)(struct mt76x02_dev *dev, bool en);
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};
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};
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struct mt76x02_dev {
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struct mt76x02_dev {
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@ -197,6 +197,7 @@ struct beacon_bc_data {
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struct sk_buff_head q;
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struct sk_buff_head q;
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struct sk_buff *tail[8];
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struct sk_buff *tail[8];
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};
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};
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void mt76x02_init_beacon_config(struct mt76x02_dev *dev);
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void mt76x02_init_beacon_config(struct mt76x02_dev *dev);
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void mt76x02e_init_beacon_config(struct mt76x02_dev *dev);
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void mt76x02e_init_beacon_config(struct mt76x02_dev *dev);
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void mt76x02_resync_beacon_timer(struct mt76x02_dev *dev);
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void mt76x02_resync_beacon_timer(struct mt76x02_dev *dev);
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@ -237,7 +237,8 @@ mt76x02_add_buffered_bc(void *priv, u8 *mac, struct ieee80211_vif *vif)
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}
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}
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void
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void
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mt76x02_enqueue_buffered_bc(struct mt76x02_dev *dev, struct beacon_bc_data *data,
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mt76x02_enqueue_buffered_bc(struct mt76x02_dev *dev,
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struct beacon_bc_data *data,
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int max_nframes)
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int max_nframes)
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{
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{
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int i, nframes;
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int i, nframes;
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@ -281,4 +282,3 @@ void mt76x02_init_beacon_config(struct mt76x02_dev *dev)
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}
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}
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EXPORT_SYMBOL_GPL(mt76x02_init_beacon_config);
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EXPORT_SYMBOL_GPL(mt76x02_init_beacon_config);
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@ -92,7 +92,6 @@ void mt76x02_mac_wcid_sync_pn(struct mt76x02_dev *dev, u8 idx,
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atomic64_set(&key->tx_pn, pn);
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atomic64_set(&key->tx_pn, pn);
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}
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}
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int mt76x02_mac_wcid_set_key(struct mt76x02_dev *dev, u8 idx,
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int mt76x02_mac_wcid_set_key(struct mt76x02_dev *dev, u8 idx,
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struct ieee80211_key_conf *key)
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struct ieee80211_key_conf *key)
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{
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{
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@ -353,6 +352,7 @@ void mt76x02_mac_write_txwi(struct mt76x02_dev *dev, struct mt76x02_txwi *txwi,
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if (wcid && wcid->sw_iv && key) {
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if (wcid && wcid->sw_iv && key) {
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u64 pn = atomic64_inc_return(&key->tx_pn);
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u64 pn = atomic64_inc_return(&key->tx_pn);
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ccmp_pn[0] = pn;
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ccmp_pn[0] = pn;
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ccmp_pn[1] = pn >> 8;
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ccmp_pn[1] = pn >> 8;
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ccmp_pn[2] = 0;
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ccmp_pn[2] = 0;
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@ -111,7 +111,8 @@ int mt76x02_mcu_set_radio_state(struct mt76x02_dev *dev, bool on)
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.level = cpu_to_le32(0),
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.level = cpu_to_le32(0),
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};
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};
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return mt76_mcu_send_msg(dev, CMD_POWER_SAVING_OP, &msg, sizeof(msg), false);
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return mt76_mcu_send_msg(dev, CMD_POWER_SAVING_OP, &msg, sizeof(msg),
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false);
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}
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}
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EXPORT_SYMBOL_GPL(mt76x02_mcu_set_radio_state);
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EXPORT_SYMBOL_GPL(mt76x02_mcu_set_radio_state);
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@ -97,7 +97,8 @@ void mt76x02e_init_beacon_config(struct mt76x02_dev *dev)
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dev->beacon_ops = &beacon_ops;
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dev->beacon_ops = &beacon_ops;
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/* Fire a pre-TBTT interrupt 8 ms before TBTT */
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/* Fire a pre-TBTT interrupt 8 ms before TBTT */
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mt76_rmw_field(dev, MT_INT_TIMER_CFG, MT_INT_TIMER_CFG_PRE_TBTT, 8 << 4);
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mt76_rmw_field(dev, MT_INT_TIMER_CFG, MT_INT_TIMER_CFG_PRE_TBTT,
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8 << 4);
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mt76_rmw_field(dev, MT_INT_TIMER_CFG, MT_INT_TIMER_CFG_GP_TIMER,
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mt76_rmw_field(dev, MT_INT_TIMER_CFG, MT_INT_TIMER_CFG_GP_TIMER,
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MT_DFS_GP_INTERVAL);
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MT_DFS_GP_INTERVAL);
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mt76_wr(dev, MT_INT_TIMER_EN, 0);
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mt76_wr(dev, MT_INT_TIMER_EN, 0);
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@ -183,7 +183,8 @@ bool mt76x02_phy_adjust_vga_gain(struct mt76x02_dev *dev)
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bool ret = false;
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bool ret = false;
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u32 false_cca;
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u32 false_cca;
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false_cca = FIELD_GET(MT_RX_STAT_1_CCA_ERRORS, mt76_rr(dev, MT_RX_STAT_1));
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false_cca = FIELD_GET(MT_RX_STAT_1_CCA_ERRORS,
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mt76_rr(dev, MT_RX_STAT_1));
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dev->cal.false_cca = false_cca;
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dev->cal.false_cca = false_cca;
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if (false_cca > 800 && dev->cal.agc_gain_adjust < limit) {
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if (false_cca > 800 && dev->cal.agc_gain_adjust < limit) {
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dev->cal.agc_gain_adjust += 2;
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dev->cal.agc_gain_adjust += 2;
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@ -120,7 +120,7 @@
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#define MT_INT_RX_DONE(_n) BIT(_n)
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#define MT_INT_RX_DONE(_n) BIT(_n)
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#define MT_INT_RX_DONE_ALL GENMASK(1, 0)
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#define MT_INT_RX_DONE_ALL GENMASK(1, 0)
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#define MT_INT_TX_DONE_ALL GENMASK(13, 4)
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#define MT_INT_TX_DONE_ALL GENMASK(13, 4)
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#define MT_INT_TX_DONE(_n) BIT(_n + 4)
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#define MT_INT_TX_DONE(_n) BIT((_n) + 4)
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#define MT_INT_RX_COHERENT BIT(16)
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#define MT_INT_RX_COHERENT BIT(16)
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#define MT_INT_TX_COHERENT BIT(17)
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#define MT_INT_TX_COHERENT BIT(17)
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#define MT_INT_ANY_COHERENT BIT(18)
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#define MT_INT_ANY_COHERENT BIT(18)
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@ -163,7 +163,7 @@
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#define MT_WMM_TXOP_BASE 0x0220
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#define MT_WMM_TXOP_BASE 0x0220
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#define MT_WMM_TXOP(_n) (MT_WMM_TXOP_BASE + (((_n) / 2) << 2))
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#define MT_WMM_TXOP(_n) (MT_WMM_TXOP_BASE + (((_n) / 2) << 2))
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#define MT_WMM_TXOP_SHIFT(_n) ((_n & 1) * 16)
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#define MT_WMM_TXOP_SHIFT(_n) (((_n) & 1) * 16)
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#define MT_WMM_TXOP_MASK GENMASK(15, 0)
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#define MT_WMM_TXOP_MASK GENMASK(15, 0)
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#define MT_WMM_CTRL 0x0230 /* MT76x0 */
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#define MT_WMM_CTRL 0x0230 /* MT76x0 */
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@ -607,7 +607,7 @@
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#define MT_TX_AGG_CNT(_id) ((_id) < 8 ? \
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#define MT_TX_AGG_CNT(_id) ((_id) < 8 ? \
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MT_TX_AGG_CNT_BASE0 + ((_id) << 2) : \
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MT_TX_AGG_CNT_BASE0 + ((_id) << 2) : \
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MT_TX_AGG_CNT_BASE1 + ((_id - 8) << 2))
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MT_TX_AGG_CNT_BASE1 + (((_id) - 8) << 2))
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#define MT_TX_STAT_FIFO_EXT 0x1798
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#define MT_TX_STAT_FIFO_EXT 0x1798
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#define MT_TX_STAT_FIFO_EXT_RETRY GENMASK(7, 0)
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#define MT_TX_STAT_FIFO_EXT_RETRY GENMASK(7, 0)
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@ -680,17 +680,17 @@
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#define MT_SKEY_BASE_0 0xac00
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#define MT_SKEY_BASE_0 0xac00
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#define MT_SKEY_BASE_1 0xb400
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#define MT_SKEY_BASE_1 0xb400
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#define MT_SKEY_0(_bss, _idx) (MT_SKEY_BASE_0 + (4 * (_bss) + _idx) * 32)
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#define MT_SKEY_0(_bss, _idx) (MT_SKEY_BASE_0 + (4 * (_bss) + (_idx)) * 32)
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#define MT_SKEY_1(_bss, _idx) (MT_SKEY_BASE_1 + (4 * ((_bss) & 7) + _idx) * 32)
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#define MT_SKEY_1(_bss, _idx) (MT_SKEY_BASE_1 + (4 * ((_bss) & 7) + (_idx)) * 32)
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||||||
#define MT_SKEY(_bss, _idx) ((_bss & 8) ? MT_SKEY_1(_bss, _idx) : MT_SKEY_0(_bss, _idx))
|
#define MT_SKEY(_bss, _idx) (((_bss) & 8) ? MT_SKEY_1(_bss, _idx) : MT_SKEY_0(_bss, _idx))
|
||||||
|
|
||||||
#define MT_SKEY_MODE_BASE_0 0xb000
|
#define MT_SKEY_MODE_BASE_0 0xb000
|
||||||
#define MT_SKEY_MODE_BASE_1 0xb3f0
|
#define MT_SKEY_MODE_BASE_1 0xb3f0
|
||||||
#define MT_SKEY_MODE_0(_bss) (MT_SKEY_MODE_BASE_0 + ((_bss / 2) << 2))
|
#define MT_SKEY_MODE_0(_bss) (MT_SKEY_MODE_BASE_0 + (((_bss) / 2) << 2))
|
||||||
#define MT_SKEY_MODE_1(_bss) (MT_SKEY_MODE_BASE_1 + ((((_bss) & 7) / 2) << 2))
|
#define MT_SKEY_MODE_1(_bss) (MT_SKEY_MODE_BASE_1 + ((((_bss) & 7) / 2) << 2))
|
||||||
#define MT_SKEY_MODE(_bss) ((_bss & 8) ? MT_SKEY_MODE_1(_bss) : MT_SKEY_MODE_0(_bss))
|
#define MT_SKEY_MODE(_bss) (((_bss) & 8) ? MT_SKEY_MODE_1(_bss) : MT_SKEY_MODE_0(_bss))
|
||||||
#define MT_SKEY_MODE_MASK GENMASK(3, 0)
|
#define MT_SKEY_MODE_MASK GENMASK(3, 0)
|
||||||
#define MT_SKEY_MODE_SHIFT(_bss, _idx) (4 * ((_idx) + 4 * (_bss & 1)))
|
#define MT_SKEY_MODE_SHIFT(_bss, _idx) (4 * ((_idx) + 4 * ((_bss) & 1)))
|
||||||
|
|
||||||
#define MT_BEACON_BASE 0xc000
|
#define MT_BEACON_BASE 0xc000
|
||||||
|
|
||||||
|
@ -25,7 +25,8 @@
|
|||||||
|
|
||||||
#define MAXNAME 32
|
#define MAXNAME 32
|
||||||
#define DEV_ENTRY __array(char, wiphy_name, 32)
|
#define DEV_ENTRY __array(char, wiphy_name, 32)
|
||||||
#define DEV_ASSIGN strlcpy(__entry->wiphy_name, wiphy_name(mt76_hw(dev)->wiphy), MAXNAME)
|
#define DEV_ASSIGN strlcpy(__entry->wiphy_name, \
|
||||||
|
wiphy_name(mt76_hw(dev)->wiphy), MAXNAME)
|
||||||
#define DEV_PR_FMT "%s"
|
#define DEV_PR_FMT "%s"
|
||||||
#define DEV_PR_ARG __entry->wiphy_name
|
#define DEV_PR_ARG __entry->wiphy_name
|
||||||
|
|
||||||
|
@ -21,14 +21,14 @@
|
|||||||
#define CCK_RATE(_idx, _rate) { \
|
#define CCK_RATE(_idx, _rate) { \
|
||||||
.bitrate = _rate, \
|
.bitrate = _rate, \
|
||||||
.flags = IEEE80211_RATE_SHORT_PREAMBLE, \
|
.flags = IEEE80211_RATE_SHORT_PREAMBLE, \
|
||||||
.hw_value = (MT_PHY_TYPE_CCK << 8) | _idx, \
|
.hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \
|
||||||
.hw_value_short = (MT_PHY_TYPE_CCK << 8) | (8 + _idx), \
|
.hw_value_short = (MT_PHY_TYPE_CCK << 8) | (8 + (_idx)), \
|
||||||
}
|
}
|
||||||
|
|
||||||
#define OFDM_RATE(_idx, _rate) { \
|
#define OFDM_RATE(_idx, _rate) { \
|
||||||
.bitrate = _rate, \
|
.bitrate = _rate, \
|
||||||
.hw_value = (MT_PHY_TYPE_OFDM << 8) | _idx, \
|
.hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
|
||||||
.hw_value_short = (MT_PHY_TYPE_OFDM << 8) | _idx, \
|
.hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
|
||||||
}
|
}
|
||||||
|
|
||||||
struct ieee80211_rate mt76x02_rates[] = {
|
struct ieee80211_rate mt76x02_rates[] = {
|
||||||
|
@ -372,7 +372,8 @@ mt76x2_get_power_info_2g(struct mt76x02_dev *dev,
|
|||||||
t->chain[chain].tssi_slope = data[0];
|
t->chain[chain].tssi_slope = data[0];
|
||||||
t->chain[chain].tssi_offset = data[1];
|
t->chain[chain].tssi_offset = data[1];
|
||||||
t->chain[chain].target_power = data[2];
|
t->chain[chain].target_power = data[2];
|
||||||
t->chain[chain].delta = mt76x02_sign_extend_optional(data[delta_idx], 7);
|
t->chain[chain].delta =
|
||||||
|
mt76x02_sign_extend_optional(data[delta_idx], 7);
|
||||||
|
|
||||||
val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_TSSI_OFF_TXPOWER);
|
val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_TSSI_OFF_TXPOWER);
|
||||||
t->target_power = val >> 8;
|
t->target_power = val >> 8;
|
||||||
@ -423,7 +424,8 @@ mt76x2_get_power_info_5g(struct mt76x02_dev *dev,
|
|||||||
t->chain[chain].tssi_slope = data[0];
|
t->chain[chain].tssi_slope = data[0];
|
||||||
t->chain[chain].tssi_offset = data[1];
|
t->chain[chain].tssi_offset = data[1];
|
||||||
t->chain[chain].target_power = data[2];
|
t->chain[chain].target_power = data[2];
|
||||||
t->chain[chain].delta = mt76x02_sign_extend_optional(data[delta_idx], 7);
|
t->chain[chain].delta =
|
||||||
|
mt76x02_sign_extend_optional(data[delta_idx], 7);
|
||||||
|
|
||||||
val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_RX_HIGH_GAIN);
|
val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_RX_HIGH_GAIN);
|
||||||
t->target_power = val & 0xff;
|
t->target_power = val & 0xff;
|
||||||
|
@ -71,7 +71,8 @@ struct mt76x2_tssi_comp {
|
|||||||
u8 offset1;
|
u8 offset1;
|
||||||
} __packed __aligned(4);
|
} __packed __aligned(4);
|
||||||
|
|
||||||
int mt76x2_mcu_tssi_comp(struct mt76x02_dev *dev, struct mt76x2_tssi_comp *tssi_data);
|
int mt76x2_mcu_tssi_comp(struct mt76x02_dev *dev,
|
||||||
|
struct mt76x2_tssi_comp *tssi_data);
|
||||||
int mt76x2_mcu_init_gain(struct mt76x02_dev *dev, u8 channel, u32 gain,
|
int mt76x2_mcu_init_gain(struct mt76x02_dev *dev, u8 channel, u32 gain,
|
||||||
bool force);
|
bool force);
|
||||||
|
|
||||||
|
@ -336,4 +336,3 @@ int mt76x2_register_device(struct mt76x02_dev *dev)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -25,7 +25,8 @@ mt76x2_adjust_high_lna_gain(struct mt76x02_dev *dev, int reg, s8 offset)
|
|||||||
{
|
{
|
||||||
s8 gain;
|
s8 gain;
|
||||||
|
|
||||||
gain = FIELD_GET(MT_BBP_AGC_LNA_HIGH_GAIN, mt76_rr(dev, MT_BBP(AGC, reg)));
|
gain = FIELD_GET(MT_BBP_AGC_LNA_HIGH_GAIN,
|
||||||
|
mt76_rr(dev, MT_BBP(AGC, reg)));
|
||||||
gain -= offset / 2;
|
gain -= offset / 2;
|
||||||
mt76_rmw_field(dev, MT_BBP(AGC, reg), MT_BBP_AGC_LNA_HIGH_GAIN, gain);
|
mt76_rmw_field(dev, MT_BBP(AGC, reg), MT_BBP_AGC_LNA_HIGH_GAIN, gain);
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user