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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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Second batch of DT changes for 4.7:
- three low priority fixes: - sama5d2: one pin definition and dependency with the slow clock for watchdog - sama5d4: definition of watchdog IRQ property - addition of the new shutdown controller to sama5d2 & sama5d2 Xplained -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJXINyNAAoJEAf03oE53VmQZtIH/1Ielv9yYUfQtFg8NHrjkLhM nk0WWRjaWvwoPnmfGYF8SAv/tb9OM96uF4o+zv7rK8vWQVf2fi67R7MJ5bllGtaN vgULv+jNixh/ocQb+SHZwRxhUQJbycIIfS5A8nDbUMUxpjIqC1iknpfytm2VyoPb WWcuLoJ4LZ4HiZwRDeKvN/0pMDHbo7XzfgOCHC/QdW3lDEzGBEKSi+3cGIsaQOnS LL11M/Ul4IBH6h2sct5w3SXlLu6vnc/DRYAP4SmwdQ+9gLfEkDCH9Vifbb7p9+tx WbNIf+kZGkQHvTlI6tqUZwga4q+0KZwDyo7s0hRoZlH5BYIRXkrfh3bhVOW3tTo= =Q/Ob -----END PGP SIGNATURE----- Merge tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt Merge "Second batch of DT changes for 4.7" from Nicolas Ferre: - three low priority fixes: - sama5d2: one pin definition and dependency with the slow clock for watchdog - sama5d4: definition of watchdog IRQ property - addition of the new shutdown controller to sama5d2 & sama5d2 Xplained * tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: ARM: dts: at91: sama5d2: add slow clock to watchdog node ARM: dts: at91: sama5d2: add shutdown controller node ARM: dts: at91: sama5d4: add watchdog interrupt property ARM: dts: at91: fix typo in sama5d2 PIN_PD24 description
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commit
ff83b377cb
@ -234,6 +234,15 @@ uart5: serial@200 {
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};
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};
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shdwc@f8048010 {
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atmel,shdwc-debouncer = <976>;
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input@0 {
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reg = <0>;
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atmel,wakeup-type = "low";
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};
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};
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watchdog@f8048040 {
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status = "okay";
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};
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@ -837,8 +837,8 @@
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#define PIN_PD23__ISC_FIELD PINMUX_PIN(PIN_PD23, 6, 4)
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#define PIN_PD24 120
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#define PIN_PD24__GPIO PINMUX_PIN(PIN_PD24, 0, 0)
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#define PIN_PD24__UTXD2 PINMUX_PIN(PIN_PD23, 1, 2)
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#define PIN_PD24__FLEXCOM4_IO3 PINMUX_PIN(PIN_PD23, 3, 3)
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#define PIN_PD24__UTXD2 PINMUX_PIN(PIN_PD24, 1, 2)
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#define PIN_PD24__FLEXCOM4_IO3 PINMUX_PIN(PIN_PD24, 3, 3)
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#define PIN_PD25 121
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#define PIN_PD25__GPIO PINMUX_PIN(PIN_PD25, 0, 0)
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#define PIN_PD25__SPI1_SPCK PINMUX_PIN(PIN_PD25, 1, 3)
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@ -1030,6 +1030,15 @@ rstc@f8048000 {
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clocks = <&clk32k>;
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};
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shdwc@f8048010 {
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compatible = "atmel,sama5d2-shdwc";
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reg = <0xf8048010 0x10>;
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clocks = <&clk32k>;
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#address-cells = <1>;
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#size-cells = <0>;
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atmel,wakeup-rtc-timer;
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};
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pit: timer@f8048030 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xf8048030 0x10>;
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@ -1041,6 +1050,7 @@ watchdog@f8048040 {
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compatible = "atmel,sama5d4-wdt";
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reg = <0xf8048040 0x10>;
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interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&clk32k>;
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status = "disabled";
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};
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@ -1302,6 +1302,7 @@ pit: timer@fc068630 {
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watchdog@fc068640 {
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compatible = "atmel,sama5d4-wdt";
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reg = <0xfc068640 0x10>;
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interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&clk32k>;
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status = "disabled";
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};
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