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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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genirq: Create irq_data
Low level chip functions need access to irq_desc->handler_data, irq_desc->chip_data and irq_desc->msi_desc. We hand down the irq number to the low level functions, so they need to lookup irq_desc. With sparse irq this means a radix tree lookup. We could hand down irq_desc itself, but low level chip functions have no need to fiddle with it directly and we want to restrict access to irq_desc further. Preparatory patch for new chip functions. Note, that the ugly anon union/struct is there to avoid a full tree wide clean up for now. This is not going to last 3 years like __do_IRQ() Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> LKML-Reference: <20100927121841.645542300@linutronix.de> Reviewed-by: H. Peter Anvin <hpa@zytor.com> Reviewed-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Thomas Gleixner
parent
3bb9808e99
commit
ff7dcd44dd
@ -83,6 +83,37 @@ typedef void (*irq_flow_handler_t)(unsigned int irq,
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struct proc_dir_entry;
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struct msi_desc;
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/**
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* struct irq_data - per irq and irq chip data passed down to chip functions
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* @irq: interrupt number
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* @node: node index useful for balancing
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* @chip: low level interrupt hardware access
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* @handler_data: per-IRQ data for the irq_chip methods
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* @chip_data: platform-specific per-chip private data for the chip
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* methods, to allow shared chip implementations
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* @msi_desc: MSI descriptor
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* @affinity: IRQ affinity on SMP
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* @irq_2_iommu: iommu with this irq
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*
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* The fields here need to overlay the ones in irq_desc until we
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* cleaned up the direct references and switched everything over to
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* irq_data.
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*/
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struct irq_data {
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unsigned int irq;
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unsigned int node;
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struct irq_chip *chip;
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void *handler_data;
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void *chip_data;
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struct msi_desc *msi_desc;
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#ifdef CONFIG_SMP
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cpumask_var_t affinity;
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#endif
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#ifdef CONFIG_INTR_REMAP
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struct irq_2_iommu *irq_2_iommu;
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#endif
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};
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/**
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* struct irq_chip - hardware interrupt chip descriptor
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*
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@ -140,16 +171,10 @@ struct timer_rand_state;
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struct irq_2_iommu;
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/**
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* struct irq_desc - interrupt descriptor
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* @irq: interrupt number for this descriptor
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* @irq_data: per irq and chip data passed down to chip functions
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* @timer_rand_state: pointer to timer rand state struct
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* @kstat_irqs: irq stats per cpu
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* @irq_2_iommu: iommu with this irq
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* @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
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* @chip: low level interrupt hardware access
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* @msi_desc: MSI descriptor
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* @handler_data: per-IRQ data for the irq_chip methods
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* @chip_data: platform-specific per-chip private data for the chip
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* methods, to allow shared chip implementations
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* @action: the irq action chain
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* @status: status information
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* @depth: disable-depth, for nested irq_disable() calls
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@ -158,8 +183,6 @@ struct irq_2_iommu;
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* @last_unhandled: aging timer for unhandled count
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* @irqs_unhandled: stats field for spurious unhandled interrupts
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* @lock: locking for SMP
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* @affinity: IRQ affinity on SMP
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* @node: node index useful for balancing
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* @pending_mask: pending rebalanced interrupts
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* @threads_active: number of irqaction threads currently running
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* @wait_for_threads: wait queue for sync_irq to wait for threaded handlers
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@ -167,17 +190,32 @@ struct irq_2_iommu;
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* @name: flow handler name for /proc/interrupts output
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*/
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struct irq_desc {
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unsigned int irq;
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/*
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* This union will go away, once we fixed the direct access to
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* irq_desc all over the place. The direct fields are a 1:1
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* overlay of irq_data.
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*/
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union {
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struct irq_data irq_data;
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struct {
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unsigned int irq;
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unsigned int node;
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struct irq_chip *chip;
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void *handler_data;
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void *chip_data;
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struct msi_desc *msi_desc;
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#ifdef CONFIG_SMP
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cpumask_var_t affinity;
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#endif
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#ifdef CONFIG_INTR_REMAP
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struct irq_2_iommu *irq_2_iommu;
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#endif
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};
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};
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struct timer_rand_state *timer_rand_state;
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unsigned int *kstat_irqs;
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#ifdef CONFIG_INTR_REMAP
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struct irq_2_iommu *irq_2_iommu;
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#endif
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irq_flow_handler_t handle_irq;
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struct irq_chip *chip;
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struct msi_desc *msi_desc;
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void *handler_data;
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void *chip_data;
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struct irqaction *action; /* IRQ action list */
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unsigned int status; /* IRQ status */
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@ -188,9 +226,7 @@ struct irq_desc {
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unsigned int irqs_unhandled;
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raw_spinlock_t lock;
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#ifdef CONFIG_SMP
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cpumask_var_t affinity;
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const struct cpumask *affinity_hint;
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unsigned int node;
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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cpumask_var_t pending_mask;
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#endif
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@ -406,15 +442,15 @@ extern int set_irq_chip_data(unsigned int irq, void *data);
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extern int set_irq_type(unsigned int irq, unsigned int type);
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extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
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#define get_irq_chip(irq) (irq_to_desc(irq)->chip)
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#define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data)
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#define get_irq_data(irq) (irq_to_desc(irq)->handler_data)
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#define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc)
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#define get_irq_chip(irq) (irq_to_desc(irq)->irq_data.chip)
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#define get_irq_chip_data(irq) (irq_to_desc(irq)->irq_data.chip_data)
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#define get_irq_data(irq) (irq_to_desc(irq)->irq_data.handler_data)
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#define get_irq_msi(irq) (irq_to_desc(irq)->irq_data.msi_desc)
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#define get_irq_desc_chip(desc) ((desc)->chip)
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#define get_irq_desc_chip_data(desc) ((desc)->chip_data)
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#define get_irq_desc_data(desc) ((desc)->handler_data)
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#define get_irq_desc_msi(desc) ((desc)->msi_desc)
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#define get_irq_desc_chip(desc) ((desc)->irq_data.chip)
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#define get_irq_desc_chip_data(desc) ((desc)->irq_data.chip_data)
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#define get_irq_desc_data(desc) ((desc)->irq_data.handler_data)
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#define get_irq_desc_msi(desc) ((desc)->irq_data.msi_desc)
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#endif /* CONFIG_GENERIC_HARDIRQS */
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@ -75,12 +75,10 @@ EXPORT_SYMBOL_GPL(nr_irqs);
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#ifdef CONFIG_SPARSE_IRQ
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static struct irq_desc irq_desc_init = {
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.irq = -1,
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.status = IRQ_DISABLED,
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.chip = &no_irq_chip,
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.handle_irq = handle_bad_irq,
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.depth = 1,
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.lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
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.status = IRQ_DISABLED,
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.handle_irq = handle_bad_irq,
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.depth = 1,
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.lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
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};
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void __ref init_kstat_irqs(struct irq_desc *desc, int node, int nr)
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@ -105,7 +103,7 @@ static void init_one_irq_desc(int irq, struct irq_desc *desc, int node)
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memcpy(desc, &irq_desc_init, sizeof(struct irq_desc));
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raw_spin_lock_init(&desc->lock);
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desc->irq = irq;
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desc->irq_data.irq = irq;
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#ifdef CONFIG_SMP
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desc->node = node;
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#endif
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@ -151,12 +149,10 @@ void replace_irq_desc(unsigned int irq, struct irq_desc *desc)
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static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = {
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[0 ... NR_IRQS_LEGACY-1] = {
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.irq = -1,
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.status = IRQ_DISABLED,
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.chip = &no_irq_chip,
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.handle_irq = handle_bad_irq,
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.depth = 1,
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.lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
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.status = IRQ_DISABLED,
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.handle_irq = handle_bad_irq,
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.depth = 1,
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.lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
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}
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};
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@ -183,8 +179,11 @@ int __init early_irq_init(void)
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kstat_irqs_legacy = kzalloc_node(NR_IRQS_LEGACY * nr_cpu_ids *
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sizeof(int), GFP_NOWAIT, node);
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irq_desc_init.irq_data.chip = &no_irq_chip;
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for (i = 0; i < legacy_count; i++) {
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desc[i].irq = i;
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desc[i].irq_data.irq = i;
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desc[i].irq_data.chip = &no_irq_chip;
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#ifdef CONFIG_SMP
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desc[i].node = node;
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#endif
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@ -241,11 +240,10 @@ struct irq_desc * __ref irq_to_desc_alloc_node(unsigned int irq, int node)
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struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
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[0 ... NR_IRQS-1] = {
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.status = IRQ_DISABLED,
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.chip = &no_irq_chip,
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.handle_irq = handle_bad_irq,
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.depth = 1,
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.lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
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.status = IRQ_DISABLED,
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.handle_irq = handle_bad_irq,
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.depth = 1,
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.lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
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}
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};
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@ -264,7 +262,8 @@ int __init early_irq_init(void)
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count = ARRAY_SIZE(irq_desc);
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for (i = 0; i < count; i++) {
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desc[i].irq = i;
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desc[i].irq_data.irq = i;
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desc[i].irq_data.chip = &no_irq_chip;
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alloc_desc_masks(&desc[i], 0, true);
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init_desc_masks(&desc[i]);
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desc[i].kstat_irqs = kstat_irqs_all[i];
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