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drm/i915/gt: Tidy repetition in declaring gen8+ interrupts
We use the same interrupt mask for each engine, so define it once in a local and reuse. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200127231540.3302516-3-chris@chris-wilson.co.uk
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@ -344,25 +344,15 @@ void gen8_gt_irq_reset(struct intel_gt *gt)
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void gen8_gt_irq_postinstall(struct intel_gt *gt)
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{
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struct intel_uncore *uncore = gt->uncore;
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/* These are interrupts we'll toggle with the ring mask register */
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u32 gt_interrupts[] = {
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(GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
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GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
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GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT |
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GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT),
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(GT_RENDER_USER_INTERRUPT << GEN8_VCS0_IRQ_SHIFT |
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GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS0_IRQ_SHIFT |
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GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT |
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GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS1_IRQ_SHIFT),
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const u32 irqs = GT_RENDER_USER_INTERRUPT | GT_CONTEXT_SWITCH_INTERRUPT;
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const u32 gt_interrupts[] = {
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irqs << GEN8_RCS_IRQ_SHIFT | irqs << GEN8_BCS_IRQ_SHIFT,
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irqs << GEN8_VCS0_IRQ_SHIFT | irqs << GEN8_VCS1_IRQ_SHIFT,
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0,
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(GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT |
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GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT)
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irqs << GEN8_VECS_IRQ_SHIFT,
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};
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struct intel_uncore *uncore = gt->uncore;
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gt->pm_ier = 0x0;
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gt->pm_imr = ~gt->pm_ier;
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