From fe79ea577be81e1e71642826ab00e676dc59c194 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= Date: Mon, 20 Apr 2020 15:00:21 +0200 Subject: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for Pine H64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enable CPU and GPU opp tables for Pine H64. This needs to change the CPU regulator max voltage to fit the OPP table. Also add the ramp-delay information to avoid any out of spec running as the regulator is slower at reaching the voltage requested compare to the PLL reaching the frequency. There is no such information for AXP805 but similar PMIC (AXP813) has a DVM (Dynamic Voltage scaling Management) ramp rate equal to 2500uV/us. Signed-off-by: Clément Péron Signed-off-by: Maxime Ripard --- arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts index 63a785b534e1..af85b2074867 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts @@ -4,6 +4,7 @@ /dts-v1/; #include "sun50i-h6.dtsi" +#include "sun50i-h6-cpu-opp.dtsi" #include @@ -80,6 +81,10 @@ reg_usb_vbus: vbus { }; }; +&cpu0 { + cpu-supply = <®_dcdca>; +}; + &de { status = "okay"; }; @@ -238,7 +243,8 @@ reg_cldo3: cldo3 { reg_dcdca: dcdca { regulator-always-on; regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; + regulator-max-microvolt = <1160000>; + regulator-ramp-delay = <2500>; regulator-name = "vdd-cpu"; }; @@ -246,6 +252,7 @@ reg_dcdcc: dcdcc { regulator-enable-ramp-delay = <32000>; regulator-min-microvolt = <810000>; regulator-max-microvolt = <1080000>; + regulator-ramp-delay = <2500>; regulator-name = "vdd-gpu"; };