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r8169: Update PHY settings of RTL8111G

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Add the new settings and correct the wrong settings.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
hayeswang 2013-04-01 22:23:37 +00:00 committed by David S. Miller
parent 41f44d1389
commit fe7524c097
1 changed files with 22 additions and 2 deletions
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24
drivers/net/ethernet/realtek/r8169.c
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@ -3376,14 +3376,23 @@ static void rtl8168g_1_hw_phy_config(struct rtl8169_private *tp)
rtl_writephy(tp, 0x1f, 0x0c41);
rtl_w1w0_phy(tp, 0x15, 0x0002, 0x0000);
} else {
rtl_writephy(tp, 0x1f, 0x0bcc);
rtl_w1w0_phy(tp, 0x12, 0x0000, 0x0002);
rtl_writephy(tp, 0x1f, 0x0c41);
rtl_w1w0_phy(tp, 0x15, 0x0000, 0x0002);
}
/* Enable PHY auto speed down */
rtl_writephy(tp, 0x1f, 0x0a44);
rtl_w1w0_phy(tp, 0x11, 0x000c, 0x0000);
rtl_writephy(tp, 0x1f, 0x0bcc);
rtl_w1w0_phy(tp, 0x14, 0x0100, 0x0000);
rtl_writephy(tp, 0x1f, 0x0a44);
rtl_w1w0_phy(tp, 0x11, 0x00c0, 0x0000);
rtl_writephy(tp, 0x1f, 0x0a43);
rtl_writephy(tp, 0x13, 0x8084);
rtl_w1w0_phy(tp, 0x14, 0x0000, 0x6000);
rtl_w1w0_phy(tp, 0x10, 0x1003, 0x0000);
/* EEE auto-fallback function */
rtl_writephy(tp, 0x1f, 0x0a4b);
rtl_w1w0_phy(tp, 0x11, 0x0004, 0x0000);
@ -3396,6 +3405,17 @@ static void rtl8168g_1_hw_phy_config(struct rtl8169_private *tp)
rtl_writephy(tp, 0x1f, 0x0c42);
rtl_w1w0_phy(tp, 0x11, 0x4000, 0x2000);
/* Improve SWR Efficiency */
rtl_writephy(tp, 0x1f, 0x0bcd);
rtl_writephy(tp, 0x14, 0x5065);
rtl_writephy(tp, 0x14, 0xd065);
rtl_writephy(tp, 0x1f, 0x0bc8);
rtl_writephy(tp, 0x11, 0x5655);
rtl_writephy(tp, 0x1f, 0x0bcd);
rtl_writephy(tp, 0x14, 0x1065);
rtl_writephy(tp, 0x14, 0x9065);
rtl_writephy(tp, 0x14, 0x1065);
rtl_writephy(tp, 0x1f, 0x0000);
}