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KVM: MMU: Simpify accessed/dirty/present/nx bit handling
Always set the accessed and dirty bit (since having them cleared causes a read-modify-write cycle), always set the present bit, and copy the nx bit from the guest. Signed-off-by: Avi Kivity <avi@qumranet.com>
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@ -91,11 +91,6 @@ static int dbg = 1;
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#define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
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#define PT32_PTE_COPY_MASK \
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(PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
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#define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
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#define PT_FIRST_AVAIL_BITS_SHIFT 9
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#define PT64_SECOND_AVAIL_BITS_SHIFT 52
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@ -31,7 +31,6 @@
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#define PT_INDEX(addr, level) PT64_INDEX(addr, level)
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#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
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#define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
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#define PT_PTE_COPY_MASK PT64_PTE_COPY_MASK
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#ifdef CONFIG_X86_64
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#define PT_MAX_FULL_LEVELS 4
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#else
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@ -46,7 +45,6 @@
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#define PT_INDEX(addr, level) PT32_INDEX(addr, level)
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#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
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#define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
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#define PT_PTE_COPY_MASK PT32_PTE_COPY_MASK
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#define PT_MAX_FULL_LEVELS 2
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#else
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#error Invalid PTTYPE value
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@ -219,7 +217,8 @@ static void FNAME(set_pte_common)(struct kvm_vcpu *vcpu,
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FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
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}
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spte |= *gpte & PT_PTE_COPY_MASK;
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spte |= PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK;
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spte |= *gpte & PT64_NX_MASK;
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spte |= access_bits << PT_SHADOW_BITS_OFFSET;
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if (!dirty)
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access_bits &= ~PT_WRITABLE_MASK;
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@ -495,7 +494,5 @@ static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
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#undef PT_INDEX
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#undef SHADOW_PT_INDEX
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#undef PT_LEVEL_MASK
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#undef PT_PTE_COPY_MASK
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#undef PT_NON_PTE_COPY_MASK
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#undef PT_DIR_BASE_ADDR_MASK
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#undef PT_MAX_FULL_LEVELS
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