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sfc: Use rmb() to ensure reads occur in order

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Enabling write-combining may also enable read reordering.  The BIU is
only guaranteed to read from a 128-bit CSR or 64-bit SRAM word when
the host reads from its lowest address; otherwise the BIU may use the
latched value.  Therefore we need to reinstate the read memory
barriers after the first read operation for each CSR or SRAM word.

Signed-off-by; Ben Hutchings <bhutchings@solarflare.com>
This commit is contained in:
Neil Turton 2011-04-11 11:42:43 +01:00 committed by Ben Hutchings
parent d4fabcc8e8
commit fcfa060468
1 changed files with 2 additions and 0 deletions
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2
drivers/net/sfc/io.h
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@ -152,6 +152,7 @@ static inline void efx_reado(struct efx_nic *efx, efx_oword_t *value,
spin_lock_irqsave(&efx->biu_lock, flags); spin_lock_irqsave(&efx->biu_lock, flags);
value->u32[0] = _efx_readd(efx, reg + 0); value->u32[0] = _efx_readd(efx, reg + 0);
rmb();
value->u32[1] = _efx_readd(efx, reg + 4); value->u32[1] = _efx_readd(efx, reg + 4);
value->u32[2] = _efx_readd(efx, reg + 8); value->u32[2] = _efx_readd(efx, reg + 8);
value->u32[3] = _efx_readd(efx, reg + 12); value->u32[3] = _efx_readd(efx, reg + 12);
@ -174,6 +175,7 @@ static inline void efx_sram_readq(struct efx_nic *efx, void __iomem *membase,
value->u64[0] = (__force __le64)__raw_readq(membase + addr); value->u64[0] = (__force __le64)__raw_readq(membase + addr);
#else #else
value->u32[0] = (__force __le32)__raw_readl(membase + addr); value->u32[0] = (__force __le32)__raw_readl(membase + addr);
rmb();
value->u32[1] = (__force __le32)__raw_readl(membase + addr + 4); value->u32[1] = (__force __le32)__raw_readl(membase + addr + 4);
#endif #endif
spin_unlock_irqrestore(&efx->biu_lock, flags); spin_unlock_irqrestore(&efx->biu_lock, flags);