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drm/amd/display: add nv14 cases to amdgpu_dm
Mostly shared with navi10. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2359,6 +2359,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
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case CHIP_RAVEN:
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#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
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case CHIP_NAVI10:
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case CHIP_NAVI14:
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#endif
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if (dcn10_register_irq_handlers(dm->adev)) {
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DRM_ERROR("DM: Failed to initialize IRQ\n");
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@ -2519,6 +2520,11 @@ static int dm_early_init(void *handle)
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adev->mode_info.num_hpd = 6;
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adev->mode_info.num_dig = 6;
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break;
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case CHIP_NAVI14:
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adev->mode_info.num_crtc = 5;
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adev->mode_info.num_hpd = 5;
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adev->mode_info.num_dig = 5;
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break;
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#endif
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default:
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DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type);
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@ -2814,6 +2820,7 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev,
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adev->asic_type == CHIP_VEGA20 ||
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#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
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adev->asic_type == CHIP_NAVI10 ||
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adev->asic_type == CHIP_NAVI14 ||
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#endif
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adev->asic_type == CHIP_RAVEN) {
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/* Fill GFX9 params */
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