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usb: dwc2: host: enable descriptor dma for fs devices
As descriptor dma mode does not support split transfers, it can't be enabled for high speed devices. Add a core parameter to enable it for full speed devices. Ensure frame list and descriptor list are correctly freed during disconnect. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by: Gregory Herrero <gregory.herrero@intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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@ -2485,6 +2485,29 @@ void dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val)
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hsotg->core_params->dma_desc_enable = val;
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}
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void dwc2_set_param_dma_desc_fs_enable(struct dwc2_hsotg *hsotg, int val)
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{
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int valid = 1;
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if (val > 0 && (hsotg->core_params->dma_enable <= 0 ||
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!hsotg->hw_params.dma_desc_enable))
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valid = 0;
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if (val < 0)
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valid = 0;
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if (!valid) {
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if (val >= 0)
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dev_err(hsotg->dev,
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"%d invalid for dma_desc_fs_enable parameter. Check HW configuration.\n",
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val);
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val = (hsotg->core_params->dma_enable > 0 &&
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hsotg->hw_params.dma_desc_enable);
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}
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hsotg->core_params->dma_desc_fs_enable = val;
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dev_dbg(hsotg->dev, "Setting dma_desc_fs_enable to %d\n", val);
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}
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void dwc2_set_param_host_support_fs_ls_low_power(struct dwc2_hsotg *hsotg,
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int val)
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{
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@ -3016,6 +3039,7 @@ void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
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dwc2_set_param_otg_cap(hsotg, params->otg_cap);
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dwc2_set_param_dma_enable(hsotg, params->dma_enable);
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dwc2_set_param_dma_desc_enable(hsotg, params->dma_desc_enable);
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dwc2_set_param_dma_desc_fs_enable(hsotg, params->dma_desc_fs_enable);
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dwc2_set_param_host_support_fs_ls_low_power(hsotg,
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params->host_support_fs_ls_low_power);
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dwc2_set_param_enable_dynamic_fifo(hsotg,
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@ -246,6 +246,13 @@ enum dwc2_ep0_state {
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* value for this if none is specified.
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* 0 - Address DMA
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* 1 - Descriptor DMA (default, if available)
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* @dma_desc_fs_enable: When DMA mode is enabled, specifies whether to use
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* address DMA mode or descriptor DMA mode for accessing
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* the data FIFOs in Full Speed mode only. The driver
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* will automatically detect the value for this if none is
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* specified.
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* 0 - Address DMA
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* 1 - Descriptor DMA in FS (default, if available)
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* @speed: Specifies the maximum speed of operation in host and
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* device mode. The actual speed depends on the speed of
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* the attached device and the value of phy_type.
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@ -375,6 +382,7 @@ struct dwc2_core_params {
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int otg_ver;
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int dma_enable;
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int dma_desc_enable;
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int dma_desc_fs_enable;
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int speed;
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int enable_dynamic_fifo;
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int en_multiple_tx_fifo;
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@ -456,6 +464,7 @@ struct dwc2_hw_params {
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unsigned op_mode:3;
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unsigned arch:2;
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unsigned dma_desc_enable:1;
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unsigned dma_desc_fs_enable:1;
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unsigned enable_dynamic_fifo:1;
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unsigned en_multiple_tx_fifo:1;
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unsigned host_rx_fifo_size:16;
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@ -770,6 +779,7 @@ struct dwc2_hsotg {
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u16 frame_number;
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u16 periodic_qh_count;
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bool bus_suspended;
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bool new_connection;
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#ifdef CONFIG_USB_DWC2_TRACK_MISSED_SOFS
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#define FRAME_NUM_ARRAY_SIZE 1000
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@ -941,6 +951,16 @@ extern void dwc2_set_param_dma_enable(struct dwc2_hsotg *hsotg, int val);
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*/
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extern void dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val);
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/*
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* When DMA mode is enabled specifies whether to use
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* address DMA or DMA Descritor mode with full speed devices
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* for accessing the data FIFOs in host mode.
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* 0 - address DMA
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* 1 - FS DMA Descriptor(default, if available)
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*/
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extern void dwc2_set_param_dma_desc_fs_enable(struct dwc2_hsotg *hsotg,
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int val);
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/*
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* Specifies the maximum speed of operation in host and device mode.
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* The actual speed depends on the speed of the attached device and
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@ -1734,6 +1734,28 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
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port_status |= USB_PORT_STAT_TEST;
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/* USB_PORT_FEAT_INDICATOR unsupported always 0 */
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if (hsotg->core_params->dma_desc_fs_enable) {
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/*
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* Enable descriptor DMA only if a full speed
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* device is connected.
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*/
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if (hsotg->new_connection &&
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((port_status &
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(USB_PORT_STAT_CONNECTION |
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USB_PORT_STAT_HIGH_SPEED |
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USB_PORT_STAT_LOW_SPEED)) ==
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USB_PORT_STAT_CONNECTION)) {
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u32 hcfg;
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dev_info(hsotg->dev, "Enabling descriptor DMA mode\n");
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hsotg->core_params->dma_desc_enable = 1;
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hcfg = dwc2_readl(hsotg->regs + HCFG);
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hcfg |= HCFG_DESCDMA;
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dwc2_writel(hcfg, hsotg->regs + HCFG);
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hsotg->new_connection = false;
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}
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}
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dev_vdbg(hsotg->dev, "port_status=%08x\n", port_status);
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*(__le32 *)buf = cpu_to_le32(port_status);
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break;
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@ -372,10 +372,21 @@ static void dwc2_port_intr(struct dwc2_hsotg *hsotg)
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" --Port Interrupt HPRT0=0x%08x Port Enable Changed (now %d)--\n",
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hprt0, !!(hprt0 & HPRT0_ENA));
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hprt0_modify |= HPRT0_ENACHG;
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if (hprt0 & HPRT0_ENA)
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if (hprt0 & HPRT0_ENA) {
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hsotg->new_connection = true;
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dwc2_hprt0_enable(hsotg, hprt0, &hprt0_modify);
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else
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} else {
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hsotg->flags.b.port_enable_change = 1;
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if (hsotg->core_params->dma_desc_fs_enable) {
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u32 hcfg;
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hsotg->core_params->dma_desc_enable = 0;
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hsotg->new_connection = false;
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hcfg = dwc2_readl(hsotg->regs + HCFG);
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hcfg &= ~HCFG_DESCDMA;
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dwc2_writel(hcfg, hsotg->regs + HCFG);
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}
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}
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}
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/* Overcurrent Change Interrupt */
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@ -232,7 +232,7 @@ struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg,
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*/
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void dwc2_hcd_qh_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
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{
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if (hsotg->core_params->dma_desc_enable > 0) {
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if (qh->desc_list) {
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dwc2_hcd_qh_free_ddma(hsotg, qh);
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} else {
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/* kfree(NULL) is safe */
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@ -59,6 +59,7 @@ static const struct dwc2_core_params params_bcm2835 = {
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.otg_ver = 0, /* 1.3 */
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.dma_enable = 1,
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.dma_desc_enable = 0,
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.dma_desc_fs_enable = 0,
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.speed = 0, /* High Speed */
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.enable_dynamic_fifo = 1,
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.en_multiple_tx_fifo = 1,
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@ -89,6 +90,7 @@ static const struct dwc2_core_params params_rk3066 = {
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.otg_ver = -1,
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.dma_enable = -1,
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.dma_desc_enable = 0,
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.dma_desc_fs_enable = 0,
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.speed = -1,
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.enable_dynamic_fifo = 1,
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.en_multiple_tx_fifo = -1,
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@ -348,8 +350,10 @@ static int dwc2_driver_probe(struct platform_device *dev)
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/*
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* Disable descriptor dma mode by default as the HW can support
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* it, but does not support it for SPLIT transactions.
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* Disable it for FS devices as well.
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*/
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defparams.dma_desc_enable = 0;
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defparams.dma_desc_fs_enable = 0;
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}
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hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
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