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irqchip/gic: Add helper function for chip initialisation
For GICs that require runtime power-management it is necessary to populate the 'parent_device' member of the irqchip structure. In preparation for supporting such GICs, move the code that initialises the irqchip structure for a GIC into its own function called gic_init_chip() where the parent device pointer is also set. Instead of calling gic_init_chip() from within gic_init_bases(), move the calls to outside of this function, so that in the future we can avoid having to pass additional parameters to gic_init_bases() in order set the parent device pointer or set the name to a specific string. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -1032,29 +1032,31 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
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.unmap = gic_irq_domain_unmap,
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.unmap = gic_irq_domain_unmap,
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};
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};
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static int gic_init_bases(struct gic_chip_data *gic, int irq_start,
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static void gic_init_chip(struct gic_chip_data *gic, struct device *dev,
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struct fwnode_handle *handle)
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const char *name, bool use_eoimode1)
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{
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{
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irq_hw_number_t hwirq_base;
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int gic_irqs, irq_base, ret;
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/* Initialize irq_chip */
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/* Initialize irq_chip */
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gic->chip = gic_chip;
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gic->chip = gic_chip;
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gic->chip.name = name;
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gic->chip.parent_device = dev;
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if (static_key_true(&supports_deactivate) && gic == &gic_data[0]) {
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if (use_eoimode1) {
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gic->chip.irq_mask = gic_eoimode1_mask_irq;
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gic->chip.irq_mask = gic_eoimode1_mask_irq;
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gic->chip.irq_eoi = gic_eoimode1_eoi_irq;
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gic->chip.irq_eoi = gic_eoimode1_eoi_irq;
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gic->chip.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity;
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gic->chip.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity;
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gic->chip.name = kasprintf(GFP_KERNEL, "GICv2");
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} else {
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gic->chip.name = kasprintf(GFP_KERNEL, "GIC-%d",
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(int)(gic - &gic_data[0]));
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}
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}
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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if (gic == &gic_data[0])
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if (gic == &gic_data[0])
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gic->chip.irq_set_affinity = gic_set_affinity;
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gic->chip.irq_set_affinity = gic_set_affinity;
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#endif
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#endif
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}
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static int gic_init_bases(struct gic_chip_data *gic, int irq_start,
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struct fwnode_handle *handle)
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{
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irq_hw_number_t hwirq_base;
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int gic_irqs, irq_base, ret;
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if (IS_ENABLED(CONFIG_GIC_NON_BANKED) && gic->percpu_offset) {
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if (IS_ENABLED(CONFIG_GIC_NON_BANKED) && gic->percpu_offset) {
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/* Frankein-GIC without banked registers... */
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/* Frankein-GIC without banked registers... */
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@ -1152,8 +1154,6 @@ static int gic_init_bases(struct gic_chip_data *gic, int irq_start,
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free_percpu(gic->cpu_base.percpu_base);
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free_percpu(gic->cpu_base.percpu_base);
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}
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}
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kfree(gic->chip.name);
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return ret;
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return ret;
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}
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}
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@ -1161,7 +1161,8 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
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int irq_start,
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int irq_start,
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struct fwnode_handle *handle)
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struct fwnode_handle *handle)
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{
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{
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int i;
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char *name;
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int i, ret;
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if (WARN_ON(!gic || gic->domain))
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if (WARN_ON(!gic || gic->domain))
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return -EINVAL;
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return -EINVAL;
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@ -1183,7 +1184,19 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
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pr_info("GIC: Using split EOI/Deactivate mode\n");
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pr_info("GIC: Using split EOI/Deactivate mode\n");
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}
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}
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return gic_init_bases(gic, irq_start, handle);
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if (static_key_true(&supports_deactivate) && gic == &gic_data[0]) {
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name = kasprintf(GFP_KERNEL, "GICv2");
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gic_init_chip(gic, NULL, name, true);
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} else {
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name = kasprintf(GFP_KERNEL, "GIC-%d", (int)(gic-&gic_data[0]));
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gic_init_chip(gic, NULL, name, false);
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}
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ret = gic_init_bases(gic, irq_start, handle);
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if (ret)
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kfree(name);
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return ret;
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}
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}
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void __init gic_init(unsigned int gic_nr, int irq_start,
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void __init gic_init(unsigned int gic_nr, int irq_start,
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