mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-23 22:50:49 +07:00
Yet two more places which invoke tracing from RCU disabled regions in the
idle path. Similar to the entry path the low level idle functions have to be non-instrumentable. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAl/DpAUTHHRnbHhAbGlu dXRyb25peC5kZQAKCRCmGPVMDXSYoXSLD/9klc0YimnEnROW6Q5Svb2IcyIutmXF bOIY1bYYoKILOBj3wyvDUhmdMuq5zh7H9yG11hO8MaVVWVQcLcOMLdHTYm9dcdmF xQk33+xqjuhRShB+nEmC9ayYtWogtH6W6uZ6WDtF9ZltMKU85n5ddGJ/Fvo+HoCb NbOdHGJdJ3/3ZCeHnxOnxM+5/GwjkBuccTV/tXmb3yXrfU9DBySyQ4/UchcpF43w LcEb0kiQbpZsBTByKJOQV8+RR654S0sILlvRwVXpmj94vrgGwhlVk1/9rz7tkOhF ksoo1mTVu75LMt22G/hXxE63787yRvFdHjapf0+kCOAuhl992NK+xlGDH8o9DXcu 9y73D4bI0HnDFs20w6vs20iLvxECJiYHJqlgR5ZwFUToceaNgtiYr8kzuD7Zbae1 KG2E7BuNSwHWMtf97fGn44GZknPEOaKdDn4Wv6/bvKHxLm77qe11RKF70Stcz2AI am13KmQzzsHGF5qNWwpElRUxSdxfJMR66RnOdTQULGrRedaZTFol/y2pnVzTSe3k SZnlpL5kE7y92UYDogPb5wWA7b+YkJN0OdSkRFy1FH26ZG8E4M7ZJ2tql5Sw7pGM lsTjXpAUphnK5rz7QcYE8KAZWj//fIAcElIrvdklVcBnS3IqjfksYW27B64133vx cT1B/lA1PHXj6Q== =raED -----END PGP SIGNATURE----- Merge tag 'locking-urgent-2020-11-29' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull locking fixes from Thomas Gleixner: "Two more places which invoke tracing from RCU disabled regions in the idle path. Similar to the entry path the low level idle functions have to be non-instrumentable" * tag 'locking-urgent-2020-11-29' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: intel_idle: Fix intel_idle() vs tracing sched/idle: Fix arch_cpu_idle() vs tracing
This commit is contained in:
commit
f91a3aa6bc
@ -57,7 +57,7 @@ EXPORT_SYMBOL(pm_power_off);
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void arch_cpu_idle(void)
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{
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wtint(0);
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local_irq_enable();
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raw_local_irq_enable();
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}
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void arch_cpu_idle_dead(void)
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@ -71,7 +71,7 @@ void arch_cpu_idle(void)
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arm_pm_idle();
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else
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cpu_do_idle();
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local_irq_enable();
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raw_local_irq_enable();
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}
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void arch_cpu_idle_prepare(void)
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@ -126,7 +126,7 @@ void arch_cpu_idle(void)
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* tricks
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*/
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cpu_do_idle();
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local_irq_enable();
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raw_local_irq_enable();
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}
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#ifdef CONFIG_HOTPLUG_CPU
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@ -102,6 +102,6 @@ void arch_cpu_idle(void)
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#ifdef CONFIG_CPU_PM_STOP
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asm volatile("stop\n");
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#endif
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local_irq_enable();
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raw_local_irq_enable();
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}
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#endif
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@ -57,7 +57,7 @@ asmlinkage void ret_from_kernel_thread(void);
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*/
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void arch_cpu_idle(void)
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{
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local_irq_enable();
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raw_local_irq_enable();
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__asm__("sleep");
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}
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@ -44,7 +44,7 @@ void arch_cpu_idle(void)
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{
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__vmwait();
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/* interrupts wake us up, but irqs are still disabled */
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local_irq_enable();
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raw_local_irq_enable();
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}
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/*
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@ -239,7 +239,7 @@ void arch_cpu_idle(void)
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if (mark_idle)
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(*mark_idle)(1);
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safe_halt();
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raw_safe_halt();
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if (mark_idle)
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(*mark_idle)(0);
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@ -149,5 +149,5 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
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void arch_cpu_idle(void)
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{
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local_irq_enable();
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raw_local_irq_enable();
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}
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@ -33,19 +33,19 @@ static void __cpuidle r3081_wait(void)
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{
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unsigned long cfg = read_c0_conf();
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write_c0_conf(cfg | R30XX_CONF_HALT);
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local_irq_enable();
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raw_local_irq_enable();
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}
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static void __cpuidle r39xx_wait(void)
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{
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if (!need_resched())
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write_c0_conf(read_c0_conf() | TX39_CONF_HALT);
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local_irq_enable();
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raw_local_irq_enable();
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}
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void __cpuidle r4k_wait(void)
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{
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local_irq_enable();
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raw_local_irq_enable();
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__r4k_wait();
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}
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@ -64,7 +64,7 @@ void __cpuidle r4k_wait_irqoff(void)
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" .set arch=r4000 \n"
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" wait \n"
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" .set pop \n");
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local_irq_enable();
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raw_local_irq_enable();
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}
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/*
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@ -84,7 +84,7 @@ static void __cpuidle rm7k_wait_irqoff(void)
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" wait \n"
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" mtc0 $1, $12 # stalls until W stage \n"
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" .set pop \n");
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local_irq_enable();
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raw_local_irq_enable();
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}
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/*
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@ -257,7 +257,7 @@ void arch_cpu_idle(void)
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if (cpu_wait)
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cpu_wait();
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else
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local_irq_enable();
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raw_local_irq_enable();
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}
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#ifdef CONFIG_CPU_IDLE
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@ -33,7 +33,7 @@ EXPORT_SYMBOL(pm_power_off);
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void arch_cpu_idle(void)
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{
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local_irq_enable();
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raw_local_irq_enable();
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}
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/*
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@ -79,7 +79,7 @@ void machine_power_off(void)
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*/
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void arch_cpu_idle(void)
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{
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local_irq_enable();
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raw_local_irq_enable();
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if (mfspr(SPR_UPR) & SPR_UPR_PMP)
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mtspr(SPR_PMR, mfspr(SPR_PMR) | SPR_PMR_DME);
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}
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@ -169,7 +169,7 @@ void __cpuidle arch_cpu_idle_dead(void)
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void __cpuidle arch_cpu_idle(void)
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{
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local_irq_enable();
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raw_local_irq_enable();
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/* nop on real hardware, qemu will idle sleep. */
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asm volatile("or %%r10,%%r10,%%r10\n":::);
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@ -52,9 +52,9 @@ void arch_cpu_idle(void)
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* interrupts enabled, some don't.
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*/
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if (irqs_disabled())
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local_irq_enable();
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raw_local_irq_enable();
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} else {
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local_irq_enable();
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raw_local_irq_enable();
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/*
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* Go into low thread priority and possibly
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* low power mode.
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@ -36,7 +36,7 @@ extern asmlinkage void ret_from_kernel_thread(void);
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void arch_cpu_idle(void)
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{
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wait_for_interrupt();
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local_irq_enable();
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raw_local_irq_enable();
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}
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void show_regs(struct pt_regs *regs)
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@ -33,10 +33,10 @@ void enabled_wait(void)
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PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK;
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clear_cpu_flag(CIF_NOHZ_DELAY);
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local_irq_save(flags);
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raw_local_irq_save(flags);
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/* Call the assembler magic in entry.S */
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psw_idle(idle, psw_mask);
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local_irq_restore(flags);
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raw_local_irq_restore(flags);
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/* Account time spent with enabled wait psw loaded as idle time. */
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raw_write_seqcount_begin(&idle->seqcount);
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@ -123,7 +123,7 @@ void arch_cpu_idle_enter(void)
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void arch_cpu_idle(void)
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{
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enabled_wait();
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local_irq_enable();
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raw_local_irq_enable();
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}
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void arch_cpu_idle_exit(void)
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@ -22,7 +22,7 @@ static void (*sh_idle)(void);
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void default_idle(void)
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{
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set_bl_bit();
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local_irq_enable();
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raw_local_irq_enable();
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/* Isn't this racy ? */
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cpu_sleep();
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clear_bl_bit();
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@ -50,7 +50,7 @@ static void pmc_leon_idle_fixup(void)
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register unsigned int address = (unsigned int)leon3_irqctrl_regs;
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/* Interrupts need to be enabled to not hang the CPU */
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local_irq_enable();
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raw_local_irq_enable();
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__asm__ __volatile__ (
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"wr %%g0, %%asr19\n"
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@ -66,7 +66,7 @@ static void pmc_leon_idle_fixup(void)
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static void pmc_leon_idle(void)
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{
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/* Interrupts need to be enabled to not hang the CPU */
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local_irq_enable();
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raw_local_irq_enable();
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/* For systems without power-down, this will be no-op */
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__asm__ __volatile__ ("wr %g0, %asr19\n\t");
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@ -74,7 +74,7 @@ void arch_cpu_idle(void)
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{
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if (sparc_idle)
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(*sparc_idle)();
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local_irq_enable();
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raw_local_irq_enable();
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}
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/* XXX cli/sti -> local_irq_xxx here, check this works once SMP is fixed. */
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@ -62,11 +62,11 @@ void arch_cpu_idle(void)
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{
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if (tlb_type != hypervisor) {
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touch_nmi_watchdog();
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local_irq_enable();
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raw_local_irq_enable();
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} else {
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unsigned long pstate;
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local_irq_enable();
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raw_local_irq_enable();
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/* The sun4v sleeping code requires that we have PSTATE.IE cleared over
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* the cpu sleep hypervisor call.
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@ -217,7 +217,7 @@ void arch_cpu_idle(void)
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{
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cpu_tasks[current_thread_info()->cpu].pid = os_getpid();
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um_idle_sleep();
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local_irq_enable();
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raw_local_irq_enable();
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}
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int __cant_sleep(void) {
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@ -88,8 +88,6 @@ static inline void __mwaitx(unsigned long eax, unsigned long ebx,
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static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
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{
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trace_hardirqs_on();
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mds_idle_clear_cpu_buffers();
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/* "mwait %eax, %ecx;" */
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asm volatile("sti; .byte 0x0f, 0x01, 0xc9;"
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@ -685,7 +685,7 @@ void arch_cpu_idle(void)
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*/
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void __cpuidle default_idle(void)
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{
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safe_halt();
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raw_safe_halt();
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}
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#if defined(CONFIG_APM_MODULE) || defined(CONFIG_HALTPOLL_CPUIDLE_MODULE)
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EXPORT_SYMBOL(default_idle);
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@ -736,6 +736,8 @@ void stop_this_cpu(void *dummy)
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/*
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* AMD Erratum 400 aware idle routine. We handle it the same way as C3 power
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* states (local apic timer and TSC stop).
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*
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* XXX this function is completely buggered vs RCU and tracing.
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*/
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static void amd_e400_idle(void)
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{
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@ -757,9 +759,9 @@ static void amd_e400_idle(void)
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* The switch back from broadcast mode needs to be called with
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* interrupts disabled.
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*/
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local_irq_disable();
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raw_local_irq_disable();
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tick_broadcast_exit();
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local_irq_enable();
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raw_local_irq_enable();
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}
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/*
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@ -801,9 +803,9 @@ static __cpuidle void mwait_idle(void)
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if (!need_resched())
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__sti_mwait(0, 0);
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else
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local_irq_enable();
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raw_local_irq_enable();
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} else {
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local_irq_enable();
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raw_local_irq_enable();
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}
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__current_clr_polling();
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}
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@ -126,26 +126,9 @@ static __cpuidle int intel_idle(struct cpuidle_device *dev,
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struct cpuidle_state *state = &drv->states[index];
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unsigned long eax = flg2MWAIT(state->flags);
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unsigned long ecx = 1; /* break on interrupt flag */
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bool tick;
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if (!static_cpu_has(X86_FEATURE_ARAT)) {
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/*
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* Switch over to one-shot tick broadcast if the target C-state
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* is deeper than C1.
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*/
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if ((eax >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) {
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tick = true;
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tick_broadcast_enter();
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} else {
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tick = false;
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}
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}
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mwait_idle_with_hints(eax, ecx);
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if (!static_cpu_has(X86_FEATURE_ARAT) && tick)
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tick_broadcast_exit();
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return index;
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}
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@ -1227,6 +1210,20 @@ static bool __init intel_idle_acpi_cst_extract(void)
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return false;
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}
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static bool __init intel_idle_state_needs_timer_stop(struct cpuidle_state *state)
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{
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unsigned long eax = flg2MWAIT(state->flags);
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if (boot_cpu_has(X86_FEATURE_ARAT))
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return false;
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/*
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* Switch over to one-shot tick broadcast if the target C-state
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* is deeper than C1.
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*/
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return !!((eax >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK);
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}
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static void __init intel_idle_init_cstates_acpi(struct cpuidle_driver *drv)
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{
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int cstate, limit = min_t(int, CPUIDLE_STATE_MAX, acpi_state_table.count);
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@ -1269,6 +1266,9 @@ static void __init intel_idle_init_cstates_acpi(struct cpuidle_driver *drv)
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if (disabled_states_mask & BIT(cstate))
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state->flags |= CPUIDLE_FLAG_OFF;
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if (intel_idle_state_needs_timer_stop(state))
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state->flags |= CPUIDLE_FLAG_TIMER_STOP;
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state->enter = intel_idle;
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state->enter_s2idle = intel_idle_s2idle;
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}
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@ -1507,6 +1507,9 @@ static void __init intel_idle_init_cstates_icpu(struct cpuidle_driver *drv)
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!(cpuidle_state_table[cstate].flags & CPUIDLE_FLAG_ALWAYS_ENABLE)))
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drv->states[drv->state_count].flags |= CPUIDLE_FLAG_OFF;
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if (intel_idle_state_needs_timer_stop(&drv->states[drv->state_count]))
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drv->states[drv->state_count].flags |= CPUIDLE_FLAG_TIMER_STOP;
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drv->state_count++;
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}
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|
@ -78,7 +78,7 @@ void __weak arch_cpu_idle_dead(void) { }
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void __weak arch_cpu_idle(void)
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{
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cpu_idle_force_poll = 1;
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local_irq_enable();
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raw_local_irq_enable();
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}
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/**
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@ -94,9 +94,35 @@ void __cpuidle default_idle_call(void)
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trace_cpu_idle(1, smp_processor_id());
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stop_critical_timings();
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/*
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* arch_cpu_idle() is supposed to enable IRQs, however
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* we can't do that because of RCU and tracing.
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*
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* Trace IRQs enable here, then switch off RCU, and have
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* arch_cpu_idle() use raw_local_irq_enable(). Note that
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* rcu_idle_enter() relies on lockdep IRQ state, so switch that
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* last -- this is very similar to the entry code.
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*/
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trace_hardirqs_on_prepare();
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lockdep_hardirqs_on_prepare(_THIS_IP_);
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rcu_idle_enter();
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lockdep_hardirqs_on(_THIS_IP_);
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arch_cpu_idle();
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/*
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* OK, so IRQs are enabled here, but RCU needs them disabled to
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* turn itself back on.. funny thing is that disabling IRQs
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* will cause tracing, which needs RCU. Jump through hoops to
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* make it 'work'.
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*/
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raw_local_irq_disable();
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lockdep_hardirqs_off(_THIS_IP_);
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rcu_idle_exit();
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lockdep_hardirqs_on(_THIS_IP_);
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raw_local_irq_enable();
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start_critical_timings();
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trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
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}
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|
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