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drm/amdgpu/gmc9: use amdgpu_ring_emit_reg_write_reg_wait in gpu tlb flush
Use amdgpu_ring_emit_reg_write_reg_wait. On engines that support it, it provides a write and wait in a single packet which avoids a missed ack if a world switch happens between the request and waiting for the ack. Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -385,11 +385,9 @@ static uint64_t gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
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amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + (2 * vmid),
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upper_32_bits(pd_addr));
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amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_req + eng, req);
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/* wait for the invalidate to complete */
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amdgpu_ring_emit_reg_wait(ring, hub->vm_inv_eng0_ack + eng,
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1 << vmid, 1 << vmid);
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amdgpu_ring_emit_reg_write_reg_wait(ring, hub->vm_inv_eng0_req + eng,
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hub->vm_inv_eng0_ack + eng,
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req, 1 << vmid);
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return pd_addr;
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}
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