mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 12:40:53 +07:00
Merge branch 'pm-cpufreq'
* pm-cpufreq: cpufreq: intel_pstate: Fix intel_pstate_get_hwp_max() for turbo disabled cpufreq: intel_pstate: Free memory only when turning off cpufreq: intel_pstate: Add ->offline and ->online callbacks cpufreq: intel_pstate: Tweak the EPP sysfs interface cpufreq: intel_pstate: Update cached EPP in the active mode cpufreq: intel_pstate: Refuse to turn off with HWP enabled
This commit is contained in:
commit
f7ce2c3afc
@ -123,7 +123,9 @@ Energy-Performance Bias (EPB) knob (otherwise), which means that the processor's
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internal P-state selection logic is expected to focus entirely on performance.
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This will override the EPP/EPB setting coming from the ``sysfs`` interface
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(see `Energy vs Performance Hints`_ below).
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(see `Energy vs Performance Hints`_ below). Moreover, any attempts to change
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the EPP/EPB to a value different from 0 ("performance") via ``sysfs`` in this
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configuration will be rejected.
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Also, in this configuration the range of P-states available to the processor's
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internal P-state selection logic is always restricted to the upper boundary
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@ -219,14 +219,13 @@ struct global_params {
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* @epp_policy: Last saved policy used to set EPP/EPB
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* @epp_default: Power on default HWP energy performance
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* preference/bias
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* @epp_saved: Saved EPP/EPB during system suspend or CPU offline
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* operation
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* @epp_cached Cached HWP energy-performance preference value
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* @hwp_req_cached: Cached value of the last HWP Request MSR
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* @hwp_cap_cached: Cached value of the last HWP Capabilities MSR
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* @last_io_update: Last time when IO wake flag was set
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* @sched_flags: Store scheduler flags for possible cross CPU update
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* @hwp_boost_min: Last HWP boosted min performance
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* @suspended: Whether or not the driver has been suspended.
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*
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* This structure stores per CPU instance data for all CPUs.
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*/
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@ -258,13 +257,13 @@ struct cpudata {
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s16 epp_powersave;
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s16 epp_policy;
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s16 epp_default;
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s16 epp_saved;
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s16 epp_cached;
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u64 hwp_req_cached;
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u64 hwp_cap_cached;
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u64 last_io_update;
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unsigned int sched_flags;
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u32 hwp_boost_min;
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bool suspended;
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};
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static struct cpudata **all_cpu_data;
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@ -644,6 +643,8 @@ static int intel_pstate_get_energy_pref_index(struct cpudata *cpu_data, int *raw
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static int intel_pstate_set_epp(struct cpudata *cpu, u32 epp)
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{
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int ret;
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/*
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* Use the cached HWP Request MSR value, because in the active mode the
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* register itself may be updated by intel_pstate_hwp_boost_up() or
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@ -659,7 +660,11 @@ static int intel_pstate_set_epp(struct cpudata *cpu, u32 epp)
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* function, so it cannot run in parallel with the update below.
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*/
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WRITE_ONCE(cpu->hwp_req_cached, value);
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return wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, value);
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ret = wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, value);
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if (!ret)
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cpu->epp_cached = epp;
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return ret;
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}
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static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data,
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@ -678,6 +683,14 @@ static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data,
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else if (epp == -EINVAL)
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epp = epp_values[pref_index - 1];
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/*
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* To avoid confusion, refuse to set EPP to any values different
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* from 0 (performance) if the current policy is "performance",
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* because those values would be overridden.
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*/
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if (epp > 0 && cpu_data->policy == CPUFREQ_POLICY_PERFORMANCE)
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return -EBUSY;
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ret = intel_pstate_set_epp(cpu_data, epp);
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} else {
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if (epp == -EINVAL)
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@ -762,10 +775,8 @@ static ssize_t store_energy_performance_preference(
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cpufreq_stop_governor(policy);
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ret = intel_pstate_set_epp(cpu, epp);
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err = cpufreq_start_governor(policy);
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if (!ret) {
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cpu->epp_cached = epp;
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if (!ret)
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ret = err;
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}
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}
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}
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@ -825,7 +836,7 @@ static void intel_pstate_get_hwp_max(unsigned int cpu, int *phy_max,
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rdmsrl_on_cpu(cpu, MSR_HWP_CAPABILITIES, &cap);
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WRITE_ONCE(all_cpu_data[cpu]->hwp_cap_cached, cap);
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if (global.no_turbo)
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if (global.no_turbo || global.turbo_disabled)
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*current_max = HWP_GUARANTEED_PERF(cap);
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else
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*current_max = HWP_HIGHEST_PERF(cap);
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@ -859,12 +870,6 @@ static void intel_pstate_hwp_set(unsigned int cpu)
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cpu_data->epp_policy = cpu_data->policy;
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if (cpu_data->epp_saved >= 0) {
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epp = cpu_data->epp_saved;
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cpu_data->epp_saved = -EINVAL;
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goto update_epp;
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}
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if (cpu_data->policy == CPUFREQ_POLICY_PERFORMANCE) {
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epp = intel_pstate_get_epp(cpu_data, value);
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cpu_data->epp_powersave = epp;
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@ -891,7 +896,6 @@ static void intel_pstate_hwp_set(unsigned int cpu)
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epp = cpu_data->epp_powersave;
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}
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update_epp:
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if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
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value &= ~GENMASK_ULL(31, 24);
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value |= (u64)epp << 24;
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@ -903,14 +907,24 @@ static void intel_pstate_hwp_set(unsigned int cpu)
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wrmsrl_on_cpu(cpu, MSR_HWP_REQUEST, value);
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}
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static void intel_pstate_hwp_force_min_perf(int cpu)
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static void intel_pstate_hwp_offline(struct cpudata *cpu)
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{
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u64 value;
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u64 value = READ_ONCE(cpu->hwp_req_cached);
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int min_perf;
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value = all_cpu_data[cpu]->hwp_req_cached;
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if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
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/*
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* In case the EPP has been set to "performance" by the
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* active mode "performance" scaling algorithm, replace that
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* temporary value with the cached EPP one.
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*/
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value &= ~GENMASK_ULL(31, 24);
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value |= HWP_ENERGY_PERF_PREFERENCE(cpu->epp_cached);
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WRITE_ONCE(cpu->hwp_req_cached, value);
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}
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value &= ~GENMASK_ULL(31, 0);
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min_perf = HWP_LOWEST_PERF(all_cpu_data[cpu]->hwp_cap_cached);
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min_perf = HWP_LOWEST_PERF(cpu->hwp_cap_cached);
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/* Set hwp_max = hwp_min */
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value |= HWP_MAX_PERF(min_perf);
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@ -920,19 +934,7 @@ static void intel_pstate_hwp_force_min_perf(int cpu)
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if (boot_cpu_has(X86_FEATURE_HWP_EPP))
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value |= HWP_ENERGY_PERF_PREFERENCE(HWP_EPP_POWERSAVE);
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wrmsrl_on_cpu(cpu, MSR_HWP_REQUEST, value);
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}
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static int intel_pstate_hwp_save_state(struct cpufreq_policy *policy)
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{
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struct cpudata *cpu_data = all_cpu_data[policy->cpu];
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if (!hwp_active)
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return 0;
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cpu_data->epp_saved = intel_pstate_get_epp(cpu_data, 0);
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return 0;
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wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, value);
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}
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#define POWER_CTL_EE_ENABLE 1
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@ -959,8 +961,28 @@ static void set_power_ctl_ee_state(bool input)
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static void intel_pstate_hwp_enable(struct cpudata *cpudata);
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static void intel_pstate_hwp_reenable(struct cpudata *cpu)
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{
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intel_pstate_hwp_enable(cpu);
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wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, READ_ONCE(cpu->hwp_req_cached));
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}
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static int intel_pstate_suspend(struct cpufreq_policy *policy)
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{
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struct cpudata *cpu = all_cpu_data[policy->cpu];
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pr_debug("CPU %d suspending\n", cpu->cpu);
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cpu->suspended = true;
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return 0;
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}
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static int intel_pstate_resume(struct cpufreq_policy *policy)
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{
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struct cpudata *cpu = all_cpu_data[policy->cpu];
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pr_debug("CPU %d resuming\n", cpu->cpu);
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/* Only restore if the system default is changed */
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if (power_ctl_ee_state == POWER_CTL_EE_ENABLE)
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@ -968,18 +990,16 @@ static int intel_pstate_resume(struct cpufreq_policy *policy)
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else if (power_ctl_ee_state == POWER_CTL_EE_DISABLE)
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set_power_ctl_ee_state(false);
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if (!hwp_active)
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return 0;
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if (cpu->suspended && hwp_active) {
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mutex_lock(&intel_pstate_limits_lock);
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mutex_lock(&intel_pstate_limits_lock);
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/* Re-enable HWP, because "online" has not done that. */
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intel_pstate_hwp_reenable(cpu);
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if (policy->cpu == 0)
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intel_pstate_hwp_enable(all_cpu_data[policy->cpu]);
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mutex_unlock(&intel_pstate_limits_lock);
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}
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all_cpu_data[policy->cpu]->epp_policy = 0;
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intel_pstate_hwp_set(policy->cpu);
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mutex_unlock(&intel_pstate_limits_lock);
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cpu->suspended = false;
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return 0;
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}
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@ -1428,7 +1448,6 @@ static void intel_pstate_hwp_enable(struct cpudata *cpudata)
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wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, 0x00);
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wrmsrl_on_cpu(cpudata->cpu, MSR_PM_ENABLE, 0x1);
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cpudata->epp_policy = 0;
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if (cpudata->epp_default == -EINVAL)
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cpudata->epp_default = intel_pstate_get_epp(cpudata, 0);
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}
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@ -2097,24 +2116,30 @@ static int intel_pstate_init_cpu(unsigned int cpunum)
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all_cpu_data[cpunum] = cpu;
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cpu->cpu = cpunum;
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cpu->epp_default = -EINVAL;
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cpu->epp_powersave = -EINVAL;
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cpu->epp_saved = -EINVAL;
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if (hwp_active) {
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const struct x86_cpu_id *id;
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intel_pstate_hwp_enable(cpu);
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id = x86_match_cpu(intel_pstate_hwp_boost_ids);
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if (id && intel_pstate_acpi_pm_profile_server())
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hwp_boost = true;
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}
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} else if (hwp_active) {
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/*
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* Re-enable HWP in case this happens after a resume from ACPI
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* S3 if the CPU was offline during the whole system/resume
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* cycle.
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*/
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intel_pstate_hwp_reenable(cpu);
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}
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cpu = all_cpu_data[cpunum];
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cpu->cpu = cpunum;
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if (hwp_active) {
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const struct x86_cpu_id *id;
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intel_pstate_hwp_enable(cpu);
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id = x86_match_cpu(intel_pstate_hwp_boost_ids);
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if (id && intel_pstate_acpi_pm_profile_server())
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hwp_boost = true;
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}
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cpu->epp_powersave = -EINVAL;
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cpu->epp_policy = 0;
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intel_pstate_get_cpu_pstates(cpu);
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@ -2296,28 +2321,61 @@ static int intel_pstate_verify_policy(struct cpufreq_policy_data *policy)
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return 0;
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}
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static void intel_cpufreq_stop_cpu(struct cpufreq_policy *policy)
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static int intel_pstate_cpu_offline(struct cpufreq_policy *policy)
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{
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struct cpudata *cpu = all_cpu_data[policy->cpu];
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pr_debug("CPU %d going offline\n", cpu->cpu);
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if (cpu->suspended)
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return 0;
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/*
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* If the CPU is an SMT thread and it goes offline with the performance
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* settings different from the minimum, it will prevent its sibling
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* from getting to lower performance levels, so force the minimum
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* performance on CPU offline to prevent that from happening.
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*/
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if (hwp_active)
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intel_pstate_hwp_force_min_perf(policy->cpu);
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intel_pstate_hwp_offline(cpu);
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else
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intel_pstate_set_min_pstate(all_cpu_data[policy->cpu]);
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intel_pstate_set_min_pstate(cpu);
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intel_pstate_exit_perf_limits(policy);
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return 0;
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}
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static int intel_pstate_cpu_online(struct cpufreq_policy *policy)
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{
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struct cpudata *cpu = all_cpu_data[policy->cpu];
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pr_debug("CPU %d going online\n", cpu->cpu);
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intel_pstate_init_acpi_perf_limits(policy);
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if (hwp_active) {
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/*
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* Re-enable HWP and clear the "suspended" flag to let "resume"
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* know that it need not do that.
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*/
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intel_pstate_hwp_reenable(cpu);
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cpu->suspended = false;
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}
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return 0;
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}
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static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
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{
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pr_debug("CPU %d exiting\n", policy->cpu);
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pr_debug("CPU %d stopping\n", policy->cpu);
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intel_pstate_clear_update_util_hook(policy->cpu);
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if (hwp_active)
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intel_pstate_hwp_save_state(policy);
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intel_cpufreq_stop_cpu(policy);
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}
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static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
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{
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intel_pstate_exit_perf_limits(policy);
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pr_debug("CPU %d exiting\n", policy->cpu);
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policy->fast_switch_possible = false;
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@ -2378,6 +2436,12 @@ static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
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*/
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policy->policy = CPUFREQ_POLICY_POWERSAVE;
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if (hwp_active) {
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struct cpudata *cpu = all_cpu_data[policy->cpu];
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cpu->epp_cached = intel_pstate_get_epp(cpu, 0);
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}
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return 0;
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}
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@ -2385,11 +2449,13 @@ static struct cpufreq_driver intel_pstate = {
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.flags = CPUFREQ_CONST_LOOPS,
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.verify = intel_pstate_verify_policy,
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.setpolicy = intel_pstate_set_policy,
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.suspend = intel_pstate_hwp_save_state,
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.suspend = intel_pstate_suspend,
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.resume = intel_pstate_resume,
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.init = intel_pstate_cpu_init,
|
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.exit = intel_pstate_cpu_exit,
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.stop_cpu = intel_pstate_stop_cpu,
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.offline = intel_pstate_cpu_offline,
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.online = intel_pstate_cpu_online,
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.update_limits = intel_pstate_update_limits,
|
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.name = "intel_pstate",
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};
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@ -2585,7 +2651,7 @@ static int intel_cpufreq_cpu_init(struct cpufreq_policy *policy)
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policy->transition_delay_us = INTEL_CPUFREQ_TRANSITION_DELAY_HWP;
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rdmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, &value);
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WRITE_ONCE(cpu->hwp_req_cached, value);
|
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cpu->epp_cached = (value & GENMASK_ULL(31, 24)) >> 24;
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cpu->epp_cached = intel_pstate_get_epp(cpu, value);
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} else {
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turbo_max = cpu->pstate.turbo_pstate;
|
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policy->transition_delay_us = INTEL_CPUFREQ_TRANSITION_DELAY;
|
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@ -2644,7 +2710,10 @@ static struct cpufreq_driver intel_cpufreq = {
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.fast_switch = intel_cpufreq_fast_switch,
|
||||
.init = intel_cpufreq_cpu_init,
|
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.exit = intel_cpufreq_cpu_exit,
|
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.stop_cpu = intel_cpufreq_stop_cpu,
|
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.offline = intel_pstate_cpu_offline,
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.online = intel_pstate_cpu_online,
|
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.suspend = intel_pstate_suspend,
|
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.resume = intel_pstate_resume,
|
||||
.update_limits = intel_pstate_update_limits,
|
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.name = "intel_cpufreq",
|
||||
};
|
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@ -2667,9 +2736,6 @@ static void intel_pstate_driver_cleanup(void)
|
||||
}
|
||||
put_online_cpus();
|
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|
||||
if (intel_pstate_driver == &intel_pstate)
|
||||
intel_pstate_sysfs_hide_hwp_dynamic_boost();
|
||||
|
||||
intel_pstate_driver = NULL;
|
||||
}
|
||||
|
||||
@ -2695,14 +2761,6 @@ static int intel_pstate_register_driver(struct cpufreq_driver *driver)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int intel_pstate_unregister_driver(void)
|
||||
{
|
||||
cpufreq_unregister_driver(intel_pstate_driver);
|
||||
intel_pstate_driver_cleanup();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static ssize_t intel_pstate_show_status(char *buf)
|
||||
{
|
||||
if (!intel_pstate_driver)
|
||||
@ -2714,20 +2772,23 @@ static ssize_t intel_pstate_show_status(char *buf)
|
||||
|
||||
static int intel_pstate_update_status(const char *buf, size_t size)
|
||||
{
|
||||
int ret;
|
||||
if (size == 3 && !strncmp(buf, "off", size)) {
|
||||
if (!intel_pstate_driver)
|
||||
return -EINVAL;
|
||||
|
||||
if (size == 3 && !strncmp(buf, "off", size))
|
||||
return intel_pstate_driver ?
|
||||
intel_pstate_unregister_driver() : -EINVAL;
|
||||
if (hwp_active)
|
||||
return -EBUSY;
|
||||
|
||||
cpufreq_unregister_driver(intel_pstate_driver);
|
||||
intel_pstate_driver_cleanup();
|
||||
}
|
||||
|
||||
if (size == 6 && !strncmp(buf, "active", size)) {
|
||||
if (intel_pstate_driver) {
|
||||
if (intel_pstate_driver == &intel_pstate)
|
||||
return 0;
|
||||
|
||||
ret = intel_pstate_unregister_driver();
|
||||
if (ret)
|
||||
return ret;
|
||||
cpufreq_unregister_driver(intel_pstate_driver);
|
||||
}
|
||||
|
||||
return intel_pstate_register_driver(&intel_pstate);
|
||||
@ -2738,9 +2799,8 @@ static int intel_pstate_update_status(const char *buf, size_t size)
|
||||
if (intel_pstate_driver == &intel_cpufreq)
|
||||
return 0;
|
||||
|
||||
ret = intel_pstate_unregister_driver();
|
||||
if (ret)
|
||||
return ret;
|
||||
cpufreq_unregister_driver(intel_pstate_driver);
|
||||
intel_pstate_sysfs_hide_hwp_dynamic_boost();
|
||||
}
|
||||
|
||||
return intel_pstate_register_driver(&intel_cpufreq);
|
||||
|
Loading…
Reference in New Issue
Block a user