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drm/amd/display: Implement DAL3 GPU Integer Scaling

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[WHY]
Users want to not have filtering when scaling by integer
multiples to native timing.

[HOW]
If timing is a multiple integer of view, we set number of taps
to 1 (effectivly closest neighbour).

Signed-off-by: Reza Amini <Reza.Amini@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Reza Amini 2019-06-10 16:45:50 -04:00 committed by Alex Deucher
parent f1cdc98fd9
commit f7938bc0f0
2 changed files with 17 additions and 0 deletions
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16
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
View File

@ -940,7 +940,14 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx)
data->inits.v_c_bot = dc_fixpt_add(data->inits.v_c, data->ratios.vert_c);
}
static bool are_rect_integer_multiples(struct rect src, struct rect dest)
{
if (dest.width >= src.width && dest.width % src.width == 0 &&
dest.height >= src.height && dest.height % src.height == 0)
return true;
return false;
}
bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
{
const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
@ -983,6 +990,15 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
if (pipe_ctx->plane_res.dpp != NULL)
res = pipe_ctx->plane_res.dpp->funcs->dpp_get_optimal_number_of_taps(
pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality);
if (res &&
plane_state->scaling_quality.integer_scaling &&
are_rect_integer_multiples(pipe_ctx->plane_res.scl_data.viewport,
pipe_ctx->plane_res.scl_data.recout)) {
pipe_ctx->plane_res.scl_data.taps.v_taps = 1;
pipe_ctx->plane_res.scl_data.taps.h_taps = 1;
}
if (!res) {
/* Try 24 bpp linebuffer */
pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_24BPP;

1
drivers/gpu/drm/amd/display/dc/dc_hw_types.h
View File

@ -614,6 +614,7 @@ struct scaling_taps {
uint32_t h_taps;
uint32_t v_taps_c;
uint32_t h_taps_c;
bool integer_scaling;
};
enum dc_timing_standard {