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OMAP4: hwmod: add I2C hwmods for OMAP4430
Add hwmod structures for I2C controllers on OMAP4430. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Benoit Cousson
Kevin Hilman
parent
4fe20e97c8
commit
f776471f62
@ -382,6 +382,238 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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/*
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* 'i2c' class
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* multimaster high-speed i2c controller
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*/
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static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = {
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.sysc_offs = 0x0010,
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.syss_offs = 0x0090,
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.sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SOFTRESET |
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SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap44xx_i2c_hwmod_class = {
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.name = "i2c",
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.sysc = &omap44xx_i2c_sysc,
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};
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/* i2c1 */
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static struct omap_hwmod omap44xx_i2c1_hwmod;
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static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = {
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{ .irq = 56 + OMAP44XX_IRQ_GIC_START },
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};
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static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = {
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{ .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START },
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{ .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START },
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};
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static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = {
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{
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.pa_start = 0x48070000,
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.pa_end = 0x480700ff,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_per -> i2c1 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_i2c1_hwmod,
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.clk = "l4_div_ck",
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.addr = omap44xx_i2c1_addrs,
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.addr_cnt = ARRAY_SIZE(omap44xx_i2c1_addrs),
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* i2c1 slave ports */
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static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = {
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&omap44xx_l4_per__i2c1,
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};
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static struct omap_hwmod omap44xx_i2c1_hwmod = {
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.name = "i2c1",
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.class = &omap44xx_i2c_hwmod_class,
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.flags = HWMOD_INIT_NO_RESET,
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.mpu_irqs = omap44xx_i2c1_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs),
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.sdma_reqs = omap44xx_i2c1_sdma_reqs,
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.sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs),
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.main_clk = "i2c1_fck",
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.prcm = {
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.omap4 = {
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.clkctrl_reg = OMAP4430_CM_L4PER_I2C1_CLKCTRL,
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},
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},
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.slaves = omap44xx_i2c1_slaves,
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.slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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/* i2c2 */
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static struct omap_hwmod omap44xx_i2c2_hwmod;
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static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = {
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{ .irq = 57 + OMAP44XX_IRQ_GIC_START },
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};
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static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = {
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{ .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START },
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{ .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START },
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};
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static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = {
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{
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.pa_start = 0x48072000,
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.pa_end = 0x480720ff,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_per -> i2c2 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_i2c2_hwmod,
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.clk = "l4_div_ck",
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.addr = omap44xx_i2c2_addrs,
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.addr_cnt = ARRAY_SIZE(omap44xx_i2c2_addrs),
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* i2c2 slave ports */
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static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = {
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&omap44xx_l4_per__i2c2,
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};
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static struct omap_hwmod omap44xx_i2c2_hwmod = {
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.name = "i2c2",
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.class = &omap44xx_i2c_hwmod_class,
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.flags = HWMOD_INIT_NO_RESET,
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.mpu_irqs = omap44xx_i2c2_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs),
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.sdma_reqs = omap44xx_i2c2_sdma_reqs,
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.sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs),
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.main_clk = "i2c2_fck",
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.prcm = {
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.omap4 = {
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.clkctrl_reg = OMAP4430_CM_L4PER_I2C2_CLKCTRL,
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},
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},
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.slaves = omap44xx_i2c2_slaves,
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.slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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/* i2c3 */
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static struct omap_hwmod omap44xx_i2c3_hwmod;
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static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = {
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{ .irq = 61 + OMAP44XX_IRQ_GIC_START },
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};
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static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = {
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{ .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START },
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{ .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START },
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};
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static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = {
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{
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.pa_start = 0x48060000,
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.pa_end = 0x480600ff,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_per -> i2c3 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_i2c3_hwmod,
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.clk = "l4_div_ck",
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.addr = omap44xx_i2c3_addrs,
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.addr_cnt = ARRAY_SIZE(omap44xx_i2c3_addrs),
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* i2c3 slave ports */
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static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = {
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&omap44xx_l4_per__i2c3,
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};
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static struct omap_hwmod omap44xx_i2c3_hwmod = {
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.name = "i2c3",
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.class = &omap44xx_i2c_hwmod_class,
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.flags = HWMOD_INIT_NO_RESET,
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.mpu_irqs = omap44xx_i2c3_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs),
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.sdma_reqs = omap44xx_i2c3_sdma_reqs,
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.sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs),
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.main_clk = "i2c3_fck",
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.prcm = {
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.omap4 = {
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.clkctrl_reg = OMAP4430_CM_L4PER_I2C3_CLKCTRL,
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},
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},
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.slaves = omap44xx_i2c3_slaves,
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.slaves_cnt = ARRAY_SIZE(omap44xx_i2c3_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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/* i2c4 */
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static struct omap_hwmod omap44xx_i2c4_hwmod;
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static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = {
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{ .irq = 62 + OMAP44XX_IRQ_GIC_START },
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};
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static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = {
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{ .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START },
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{ .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START },
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};
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static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = {
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{
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.pa_start = 0x48350000,
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.pa_end = 0x483500ff,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_per -> i2c4 */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = {
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.master = &omap44xx_l4_per_hwmod,
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.slave = &omap44xx_i2c4_hwmod,
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.clk = "l4_div_ck",
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.addr = omap44xx_i2c4_addrs,
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.addr_cnt = ARRAY_SIZE(omap44xx_i2c4_addrs),
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* i2c4 slave ports */
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static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = {
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&omap44xx_l4_per__i2c4,
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};
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static struct omap_hwmod omap44xx_i2c4_hwmod = {
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.name = "i2c4",
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.class = &omap44xx_i2c_hwmod_class,
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.flags = HWMOD_INIT_NO_RESET,
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.mpu_irqs = omap44xx_i2c4_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs),
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.sdma_reqs = omap44xx_i2c4_sdma_reqs,
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.sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs),
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.main_clk = "i2c4_fck",
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.prcm = {
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.omap4 = {
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.clkctrl_reg = OMAP4430_CM_L4PER_I2C4_CLKCTRL,
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},
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},
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.slaves = omap44xx_i2c4_slaves,
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.slaves_cnt = ARRAY_SIZE(omap44xx_i2c4_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
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};
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/*
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* 'mpu_bus' class
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* instance(s): mpu_private
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@ -826,6 +1058,11 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
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&omap44xx_l4_cfg_hwmod,
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&omap44xx_l4_per_hwmod,
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&omap44xx_l4_wkup_hwmod,
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/* i2c class */
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&omap44xx_i2c1_hwmod,
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&omap44xx_i2c2_hwmod,
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&omap44xx_i2c3_hwmod,
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&omap44xx_i2c4_hwmod,
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/* mpu_bus class */
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&omap44xx_mpu_private_hwmod,
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