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drm/amd/display: Change comments to bring in line with internal tree
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1439,13 +1439,11 @@ static uint32_t get_max_pixel_clock_for_all_paths(
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return max_pix_clk;
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return max_pix_clk;
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}
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}
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/* Find clock state based on clock requested. if clock value is 0, simply
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/*
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* Find clock state based on clock requested. if clock value is 0, simply
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* set clock state as requested without finding clock state by clock value
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* set clock state as requested without finding clock state by clock value
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*TODO: when dce120_hw_sequencer.c is created, override apply_min_clock.
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*
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* TODOFPGA remove TODO after implement dal_display_clock_get_cur_clocks_value
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* etc support for dcn1.0
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*/
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*/
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static void apply_min_clocks(
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static void apply_min_clocks(
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struct dc *dc,
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struct dc *dc,
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struct dc_state *context,
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struct dc_state *context,
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@ -372,7 +372,7 @@ static enum aux_channel_operation_result get_channel_status(
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10, aux110->timeout_period/10);
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10, aux110->timeout_period/10);
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/* Note that the following bits are set in 'status.bits'
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/* Note that the following bits are set in 'status.bits'
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* during CTS 4.2.1.2:
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* during CTS 4.2.1.2 (FW 3.3.1):
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* AUX_SW_RX_MIN_COUNT_VIOL, AUX_SW_RX_INVALID_STOP,
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* AUX_SW_RX_MIN_COUNT_VIOL, AUX_SW_RX_INVALID_STOP,
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* AUX_SW_RX_RECV_NO_DET, AUX_SW_RX_RECV_INVALID_H.
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* AUX_SW_RX_RECV_NO_DET, AUX_SW_RX_RECV_INVALID_H.
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*
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*
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