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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-19 02:16:48 +07:00
RDMA/qedr: Add iWARP support in existing verbs
Make slight modifications to common RoCE/iWARP code. Add additional doorbell for iWARP post_send. iWARP QP pbl is allocated in qed and not in qedr. Signed-off-by: Michal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: Ram Amrani <Ram.Amrani@cavium.com> Signed-off-by: Ariel Elior <Ariel.Elior@cavium.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -319,6 +319,9 @@ struct qedr_qp_hwq_info {
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/* DB */
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void __iomem *db;
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union db_prod32 db_data;
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void __iomem *iwarp_db2;
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union db_prod32 iwarp_db2_data;
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};
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#define QEDR_INC_SW_IDX(p_info, index) \
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@ -277,8 +277,13 @@ int qedr_query_port(struct ib_device *ibdev, u8 port, struct ib_port_attr *attr)
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attr->sm_lid = 0;
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attr->sm_sl = 0;
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attr->port_cap_flags = IB_PORT_IP_BASED_GIDS;
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attr->gid_tbl_len = QEDR_MAX_SGID;
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attr->pkey_tbl_len = QEDR_ROCE_PKEY_TABLE_LEN;
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if (rdma_protocol_iwarp(&dev->ibdev, 1)) {
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attr->gid_tbl_len = 1;
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attr->pkey_tbl_len = 1;
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} else {
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attr->gid_tbl_len = QEDR_MAX_SGID;
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attr->pkey_tbl_len = QEDR_ROCE_PKEY_TABLE_LEN;
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}
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attr->bad_pkey_cntr = rdma_port->pkey_bad_counter;
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attr->qkey_viol_cntr = 0;
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get_link_speed_and_width(rdma_port->link_speed,
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@ -1430,6 +1435,21 @@ static int qedr_create_user_qp(struct qedr_dev *dev,
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return rc;
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}
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static void qedr_set_iwarp_db_info(struct qedr_dev *dev, struct qedr_qp *qp)
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{
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qp->sq.db = dev->db_addr +
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DB_ADDR_SHIFT(DQ_PWM_OFFSET_XCM_RDMA_SQ_PROD);
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qp->sq.db_data.data.icid = qp->icid;
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qp->rq.db = dev->db_addr +
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DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_IWARP_RQ_PROD);
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qp->rq.db_data.data.icid = qp->icid;
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qp->rq.iwarp_db2 = dev->db_addr +
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DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_FLAGS);
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qp->rq.iwarp_db2_data.data.icid = qp->icid;
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qp->rq.iwarp_db2_data.data.value = DQ_TCM_IWARP_POST_RQ_CF_CMD;
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}
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static int
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qedr_roce_create_kernel_qp(struct qedr_dev *dev,
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struct qedr_qp *qp,
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@ -1476,8 +1496,71 @@ qedr_roce_create_kernel_qp(struct qedr_dev *dev,
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qp->icid = out_params.icid;
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qedr_set_roce_db_info(dev, qp);
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return rc;
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}
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return 0;
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static int
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qedr_iwarp_create_kernel_qp(struct qedr_dev *dev,
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struct qedr_qp *qp,
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struct qed_rdma_create_qp_in_params *in_params,
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u32 n_sq_elems, u32 n_rq_elems)
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{
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struct qed_rdma_create_qp_out_params out_params;
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struct qed_chain_ext_pbl ext_pbl;
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int rc;
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in_params->sq_num_pages = QED_CHAIN_PAGE_CNT(n_sq_elems,
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QEDR_SQE_ELEMENT_SIZE,
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QED_CHAIN_MODE_PBL);
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in_params->rq_num_pages = QED_CHAIN_PAGE_CNT(n_rq_elems,
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QEDR_RQE_ELEMENT_SIZE,
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QED_CHAIN_MODE_PBL);
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qp->qed_qp = dev->ops->rdma_create_qp(dev->rdma_ctx,
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in_params, &out_params);
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if (!qp->qed_qp)
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return -EINVAL;
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/* Now we allocate the chain */
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ext_pbl.p_pbl_virt = out_params.sq_pbl_virt;
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ext_pbl.p_pbl_phys = out_params.sq_pbl_phys;
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rc = dev->ops->common->chain_alloc(dev->cdev,
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QED_CHAIN_USE_TO_PRODUCE,
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QED_CHAIN_MODE_PBL,
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QED_CHAIN_CNT_TYPE_U32,
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n_sq_elems,
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QEDR_SQE_ELEMENT_SIZE,
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&qp->sq.pbl, &ext_pbl);
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if (rc)
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goto err;
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ext_pbl.p_pbl_virt = out_params.rq_pbl_virt;
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ext_pbl.p_pbl_phys = out_params.rq_pbl_phys;
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rc = dev->ops->common->chain_alloc(dev->cdev,
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QED_CHAIN_USE_TO_CONSUME_PRODUCE,
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QED_CHAIN_MODE_PBL,
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QED_CHAIN_CNT_TYPE_U32,
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n_rq_elems,
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QEDR_RQE_ELEMENT_SIZE,
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&qp->rq.pbl, &ext_pbl);
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if (rc)
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goto err;
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qp->qp_id = out_params.qp_id;
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qp->icid = out_params.icid;
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qedr_set_iwarp_db_info(dev, qp);
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return rc;
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err:
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dev->ops->rdma_destroy_qp(dev->rdma_ctx, qp->qed_qp);
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return rc;
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}
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static void qedr_cleanup_kernel(struct qedr_dev *dev, struct qedr_qp *qp)
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@ -1552,8 +1635,12 @@ static int qedr_create_kernel_qp(struct qedr_dev *dev,
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n_rq_elems = qp->rq.max_wr * QEDR_MAX_RQE_ELEMENTS_PER_RQE;
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rc = qedr_roce_create_kernel_qp(dev, qp, &in_params,
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n_sq_elems, n_rq_elems);
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if (rdma_protocol_iwarp(&dev->ibdev, 1))
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rc = qedr_iwarp_create_kernel_qp(dev, qp, &in_params,
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n_sq_elems, n_rq_elems);
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else
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rc = qedr_roce_create_kernel_qp(dev, qp, &in_params,
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n_sq_elems, n_rq_elems);
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if (rc)
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qedr_cleanup_kernel(dev, qp);
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@ -1700,10 +1787,13 @@ static int qedr_update_qp_state(struct qedr_dev *dev,
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/* Update doorbell (in case post_recv was
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* done before move to RTR)
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*/
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wmb();
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writel(qp->rq.db_data.raw, qp->rq.db);
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/* Make sure write takes effect */
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mmiowb();
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if (rdma_protocol_roce(&dev->ibdev, 1)) {
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wmb();
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writel(qp->rq.db_data.raw, qp->rq.db);
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/* Make sure write takes effect */
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mmiowb();
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}
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break;
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case QED_ROCE_QP_STATE_ERR:
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break;
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@ -1797,16 +1887,18 @@ int qedr_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
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else
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new_qp_state = old_qp_state;
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if (!ib_modify_qp_is_ok
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(old_qp_state, new_qp_state, ibqp->qp_type, attr_mask,
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IB_LINK_LAYER_ETHERNET)) {
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DP_ERR(dev,
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"modify qp: invalid attribute mask=0x%x specified for\n"
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"qpn=0x%x of type=0x%x old_qp_state=0x%x, new_qp_state=0x%x\n",
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attr_mask, qp->qp_id, ibqp->qp_type, old_qp_state,
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new_qp_state);
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rc = -EINVAL;
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goto err;
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if (rdma_protocol_roce(&dev->ibdev, 1)) {
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if (!ib_modify_qp_is_ok(old_qp_state, new_qp_state,
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ibqp->qp_type, attr_mask,
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IB_LINK_LAYER_ETHERNET)) {
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DP_ERR(dev,
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"modify qp: invalid attribute mask=0x%x specified for\n"
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"qpn=0x%x of type=0x%x old_qp_state=0x%x, new_qp_state=0x%x\n",
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attr_mask, qp->qp_id, ibqp->qp_type,
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old_qp_state, new_qp_state);
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rc = -EINVAL;
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goto err;
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}
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}
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/* Translate the masks... */
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@ -2122,15 +2214,17 @@ int qedr_destroy_qp(struct ib_qp *ibqp)
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DP_DEBUG(dev, QEDR_MSG_QP, "destroy qp: destroying %p, qp type=%d\n",
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qp, qp->qp_type);
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if ((qp->state != QED_ROCE_QP_STATE_RESET) &&
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(qp->state != QED_ROCE_QP_STATE_ERR) &&
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(qp->state != QED_ROCE_QP_STATE_INIT)) {
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if (rdma_protocol_roce(&dev->ibdev, 1)) {
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if ((qp->state != QED_ROCE_QP_STATE_RESET) &&
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(qp->state != QED_ROCE_QP_STATE_ERR) &&
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(qp->state != QED_ROCE_QP_STATE_INIT)) {
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attr.qp_state = IB_QPS_ERR;
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attr_mask |= IB_QP_STATE;
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attr.qp_state = IB_QPS_ERR;
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attr_mask |= IB_QP_STATE;
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/* Change the QP state to ERROR */
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qedr_modify_qp(ibqp, &attr, attr_mask, NULL);
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/* Change the QP state to ERROR */
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qedr_modify_qp(ibqp, &attr, attr_mask, NULL);
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}
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}
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if (qp->qp_type == IB_QPT_GSI)
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@ -3025,15 +3119,17 @@ int qedr_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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spin_lock_irqsave(&qp->q_lock, flags);
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if ((qp->state != QED_ROCE_QP_STATE_RTS) &&
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(qp->state != QED_ROCE_QP_STATE_ERR) &&
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(qp->state != QED_ROCE_QP_STATE_SQD)) {
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spin_unlock_irqrestore(&qp->q_lock, flags);
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*bad_wr = wr;
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DP_DEBUG(dev, QEDR_MSG_CQ,
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"QP in wrong state! QP icid=0x%x state %d\n",
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qp->icid, qp->state);
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return -EINVAL;
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if (rdma_protocol_roce(&dev->ibdev, 1)) {
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if ((qp->state != QED_ROCE_QP_STATE_RTS) &&
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(qp->state != QED_ROCE_QP_STATE_ERR) &&
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(qp->state != QED_ROCE_QP_STATE_SQD)) {
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spin_unlock_irqrestore(&qp->q_lock, flags);
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*bad_wr = wr;
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DP_DEBUG(dev, QEDR_MSG_CQ,
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"QP in wrong state! QP icid=0x%x state %d\n",
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qp->icid, qp->state);
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return -EINVAL;
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}
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}
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while (wr) {
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@ -3153,6 +3249,11 @@ int qedr_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
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/* Make sure write sticks */
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mmiowb();
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if (rdma_protocol_iwarp(&dev->ibdev, 1)) {
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writel(qp->rq.iwarp_db2_data.raw, qp->rq.iwarp_db2);
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mmiowb(); /* for second doorbell */
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}
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wr = wr->next;
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}
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