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staging: comedi: ni_tio: export and fix ni_tio_set_bits()
Move the inline function from the header and export it instead. Fix the checkpatch.pl issue: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' The 'unsigned' vars can safely be changed to 'unsigned int'. This allows moving ni_tio_set_bits_transient() into the driver and making it static. Fix the checkpatch.pl issue: CHECK: Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON() The BUG_ON() is overkill. All the drivers that call this function pass 'register_index' values that are valid. Just check the 'register_index' before updating the software copy and writing the register. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -228,6 +228,43 @@ static uint64_t ni_tio_clock_period_ps(const struct ni_gpct *counter,
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return clock_period_ps;
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}
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static void ni_tio_set_bits_transient(struct ni_gpct *counter,
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enum ni_gpct_register reg,
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unsigned int mask, unsigned int value,
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unsigned int transient)
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{
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struct ni_gpct_device *counter_dev = counter->counter_dev;
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unsigned long flags;
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if (reg < NITIO_NUM_REGS) {
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spin_lock_irqsave(&counter_dev->regs_lock, flags);
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counter_dev->regs[reg] &= ~mask;
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counter_dev->regs[reg] |= (value & mask);
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write_register(counter, counter_dev->regs[reg] | transient,
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reg);
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mmiowb();
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spin_unlock_irqrestore(&counter_dev->regs_lock, flags);
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}
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}
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/**
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* ni_tio_set_bits() - Safely write a counter register.
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* @counter: struct ni_gpct counter.
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* @reg: the register to write.
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* @mask: the bits to change.
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* @value: the new bits value.
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*
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* Used to write to, and update the software copy, a register whose bits may
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* be twiddled in interrupt context, or whose software copy may be read in
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* interrupt context.
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*/
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void ni_tio_set_bits(struct ni_gpct *counter, enum ni_gpct_register reg,
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unsigned int mask, unsigned int value)
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{
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ni_tio_set_bits_transient(counter, reg, mask, value, 0x0);
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}
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EXPORT_SYMBOL_GPL(ni_tio_set_bits);
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/**
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* ni_tio_get_soft_copy() - Safely read the software copy of a counter register.
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* @counter: struct ni_gpct counter.
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@ -191,39 +191,8 @@ static inline int ni_tio_counting_mode_registers_present(const struct
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return 0;
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}
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static inline void ni_tio_set_bits_transient(struct ni_gpct *counter,
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enum ni_gpct_register
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register_index, unsigned bit_mask,
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unsigned bit_values,
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unsigned transient_bit_values)
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{
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struct ni_gpct_device *counter_dev = counter->counter_dev;
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unsigned long flags;
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BUG_ON(register_index >= NITIO_NUM_REGS);
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spin_lock_irqsave(&counter_dev->regs_lock, flags);
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counter_dev->regs[register_index] &= ~bit_mask;
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counter_dev->regs[register_index] |= (bit_values & bit_mask);
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write_register(counter,
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counter_dev->regs[register_index] | transient_bit_values,
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register_index);
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mmiowb();
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spin_unlock_irqrestore(&counter_dev->regs_lock, flags);
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}
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/*
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* ni_tio_set_bits( ) is for safely writing to registers whose bits may be
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* twiddled in interrupt context, or whose software copy may be read in
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* interrupt context.
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*/
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static inline void ni_tio_set_bits(struct ni_gpct *counter,
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enum ni_gpct_register register_index,
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unsigned bit_mask, unsigned bit_values)
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{
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ni_tio_set_bits_transient(counter, register_index, bit_mask, bit_values,
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0x0);
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}
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void ni_tio_set_bits(struct ni_gpct *, enum ni_gpct_register reg,
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unsigned int mask, unsigned int value);
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unsigned int ni_tio_get_soft_copy(const struct ni_gpct *,
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enum ni_gpct_register reg);
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