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MIPS: SEAD3: Enable LL/SC.
All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are MIPS32 or MIPS64 CPUs that have ll/sc. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -28,7 +28,7 @@
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/* #define cpu_has_prefetch ? */
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#define cpu_has_mcheck 1
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/* #define cpu_has_ejtag ? */
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#define cpu_has_llsc 0
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#define cpu_has_llsc 1
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/* #define cpu_has_vtag_icache ? */
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/* #define cpu_has_dc_aliases ? */
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/* #define cpu_has_ic_fills_f_dc ? */
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