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mt76x0: correct RF reg pairs write for PCIe

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We have to use RF CSR method for PCIe.

Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Stanislaw Gruszka 2018-10-04 12:04:54 +02:00 committed by Felix Fietkau
parent c50479fa7a
commit f2761e53d6
1 changed files with 16 additions and 3 deletions
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19
drivers/net/wireless/mediatek/mt76/mt76x0/phy.c
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@ -173,9 +173,22 @@ rf_clear(struct mt76x02_dev *dev, u32 offset, u8 mask)
}
#endif
#define RF_RANDOM_WRITE(dev, tab) \
mt76_wr_rp(dev, MT_MCU_MEMMAP_RF, \
tab, ARRAY_SIZE(tab))
static void
mt76x0_rf_csr_wr_rp(struct mt76x02_dev *dev, const struct mt76_reg_pair *data,
int n)
{
while (n-- > 0) {
mt76x0_rf_csr_wr(dev, data->reg, data->value);
data++;
}
}
#define RF_RANDOM_WRITE(dev, tab) do { \
if (mt76_is_mmio(dev)) \
mt76x0_rf_csr_wr_rp(dev, tab, ARRAY_SIZE(tab)); \
else \
mt76_wr_rp(dev, MT_MCU_MEMMAP_RF, tab, ARRAY_SIZE(tab));\
} while (0)
int mt76x0_wait_bbp_ready(struct mt76x02_dev *dev)
{