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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-04 02:26:56 +07:00
[libata] trim trailing whitespace
Most of these contributed by that mysterious figger known as A.C. Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
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155d2916d9
commit
f20b16ff7c
@ -632,7 +632,7 @@ static int piix_pata_prereset(struct ata_port *ap)
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if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->port_no]))
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return -ENOENT;
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ap->cbl = ATA_CBL_PATA40;
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return ata_std_prereset(ap);
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}
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@ -5770,7 +5770,7 @@ int ata_device_add(const struct ata_probe_ent *ent)
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int rc;
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DPRINTK("ENTER\n");
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if (ent->irq == 0) {
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dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
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return 0;
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@ -504,7 +504,7 @@ static struct ata_port_operations ali_c5_port_ops = {
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* Perform the setup on the device that must be done both at boot
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* and at resume time.
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*/
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static void ali_init_chipset(struct pci_dev *pdev)
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{
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u8 rev, tmp;
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@ -655,7 +655,7 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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port_info[0] = port_info[1] = &info_c5;
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ali_init_chipset(pdev);
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isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
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if (isa_bridge && rev >= 0x20 && rev < 0xC2) {
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/* Are we paired with a UDMA capable chip */
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@ -305,7 +305,7 @@ static void __devexit cs5520_remove_one(struct pci_dev *pdev)
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* Do any reconfiguration work needed by a resume from RAM. We need
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* to restore DMA mode support on BIOSen which disabled it
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*/
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static int cs5520_reinit_one(struct pci_dev *pdev)
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{
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u8 pcicfg;
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@ -247,7 +247,7 @@ static int cs5530_is_palmax(void)
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* Perform the chip initialisation work that is shared between both
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* setup and resume paths
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*/
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static int cs5530_init_chip(void)
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{
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struct pci_dev *master_0 = NULL, *cs5530_0 = NULL, *dev = NULL;
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@ -357,11 +357,11 @@ static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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.port_ops = &cs5530_port_ops
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};
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static struct ata_port_info *port_info[2] = { &info, &info };
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/* Chip initialisation */
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if (cs5530_init_chip())
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return -ENODEV;
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if (cs5530_is_palmax())
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port_info[1] = &info_palmax_secondary;
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@ -376,7 +376,7 @@ static int cs5530_reinit_one(struct pci_dev *pdev)
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BUG();
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return ata_pci_device_resume(pdev);
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}
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static const struct pci_device_id cs5530[] = {
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{ PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_IDE), },
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@ -232,7 +232,7 @@ static int hpt36x_pre_reset(struct ata_port *ap)
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if (!pci_test_config_bits(pdev, &hpt36x_enable_bits[ap->port_no]))
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return -ENOENT;
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pci_read_config_byte(pdev, 0x5A, &ata66);
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if (ata66 & (1 << ap->port_no))
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ap->cbl = ATA_CBL_PATA40;
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@ -459,7 +459,7 @@ static int hpt37x_pre_reset(struct ata_port *ap)
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};
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if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no]))
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return -ENOENT;
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pci_read_config_byte(pdev, 0x5B, &scr2);
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pci_write_config_byte(pdev, 0x5B, scr2 & ~0x01);
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/* Cable register now active */
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@ -504,7 +504,7 @@ static int hpt374_pre_reset(struct ata_port *ap)
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if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no]))
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return -ENOENT;
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/* Do the extra channel work */
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pci_read_config_word(pdev, 0x52, &mcr3);
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pci_read_config_word(pdev, 0x56, &mcr6);
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@ -164,7 +164,7 @@ static struct ata_port_operations hpt3x3_port_ops = {
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*
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* Perform the setup required at boot and on resume.
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*/
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static void hpt3x3_init_chipset(struct pci_dev *dev)
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{
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u16 cmd;
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@ -221,7 +221,7 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i
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static int jmicron_reinit_one(struct pci_dev *pdev)
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{
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u32 reg;
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switch(pdev->device) {
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case PCI_DEVICE_ID_JMICRON_JMB368:
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break;
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@ -45,10 +45,10 @@ static int marvell_pre_reset(struct ata_port *ap)
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for(i = 0; i <= 0x0F; i++)
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printk("%02X:%02X ", i, readb(barp + i));
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printk("\n");
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devices = readl(barp + 0x0C);
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pci_iounmap(pdev, barp);
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if ((pdev->device == 0x6145) && (ap->port_no == 0) &&
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(!(devices & 0x10))) /* PATA enable ? */
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return -ENOENT;
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@ -559,7 +559,7 @@ static int serverworks_reinit_one(struct pci_dev *pdev)
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{
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/* Force master latency timer to 64 PCI clocks */
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pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
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switch (pdev->device)
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{
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case PCI_DEVICE_ID_SERVERWORKS_OSB4IDE:
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@ -270,7 +270,7 @@ static struct ata_port_operations sil680_port_ops = {
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* is powered up on boot and when we resume in case we resumed from RAM.
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* Returns the final clock settings.
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*/
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static u8 sil680_init_chip(struct pci_dev *pdev)
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{
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u32 class_rev = 0;
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@ -847,7 +847,7 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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struct sis_chipset *chipset = NULL;
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static struct sis_chipset sis_chipsets[] = {
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{ 0x0968, &sis_info133 },
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{ 0x0966, &sis_info133 },
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{ 0x0965, &sis_info133 },
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@ -391,11 +391,11 @@ static struct ata_port_operations via_port_ops_noirq = {
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static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
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{
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u8 enable;
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/* 0x40 low bits indicate enabled channels */
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pci_read_config_byte(pdev, 0x40 , &enable);
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enable &= 3;
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if (flags & VIA_SET_FIFO) {
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static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
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u8 fifo;
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@ -516,7 +516,7 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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/* Initialise the FIFO for the enabled channels. */
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via_config_fifo(pdev, config->flags);
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/* Clock set up */
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switch(config->flags & VIA_UDMA) {
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case VIA_UDMA_NONE:
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@ -575,7 +575,7 @@ static int via_reinit_one(struct pci_dev *pdev)
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u32 timing;
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struct ata_host *host = dev_get_drvdata(&pdev->dev);
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const struct via_isa_bridge *config = host->private_data;
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via_config_fifo(pdev, config->flags);
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if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
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@ -590,7 +590,7 @@ static int via_reinit_one(struct pci_dev *pdev)
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timing &= ~0x80008;
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pci_write_config_dword(pdev, 0x50, timing);
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}
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return ata_pci_device_resume(pdev);
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return ata_pci_device_resume(pdev);
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}
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static const struct pci_device_id via[] = {
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@ -5,7 +5,7 @@
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* Support for the Winbond 83759A when operating in advanced mode.
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* Multichip mode is not currently supported.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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@ -69,7 +69,7 @@ static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev)
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int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);
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reg = winbond_readcfg(winbond->config, 0x81);
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/* Get the timing data in cycles */
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if (reg & 0x40) /* Fast VLB bus, assume 50MHz */
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ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
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@ -80,9 +80,9 @@ static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev)
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recovery = (FIT(t.recover, 1, 15) + 1) & 0x0F;
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timing = (active << 4) | recovery;
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winbond_writecfg(winbond->config, timing, reg);
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/* Load the setup timing */
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reg = 0x35;
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if (adev->class != ATA_DEV_ATA)
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reg |= 0x08; /* FIFO off */
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@ -194,13 +194,13 @@ static __init int winbond_init_one(unsigned long port)
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winbond_writecfg(port, 0x85, reg);
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reg = winbond_readcfg(port, 0x81);
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if (!(reg & 0x03)) /* Disabled */
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return 0;
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for (i = 0; i < 2 ; i ++) {
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if (reg & (1 << i)) {
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if (reg & (1 << i)) {
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/*
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* Fill in a probe structure first of all
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*/
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@ -217,7 +217,7 @@ static __init int winbond_init_one(unsigned long port)
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ae.pio_mask = 0x1F;
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ae.sht = &winbond_sht;
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ae.n_ports = 1;
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ae.irq = 14 + i;
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ae.irq_flags = 0;
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@ -257,7 +257,7 @@ static __init int winbond_init(void)
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int ct = 0;
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int i;
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if (probe_winbond == 0)
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return -ENODEV;
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@ -528,7 +528,7 @@ static void nv_adma_mode(struct ata_port *ap)
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if (!(pp->flags & NV_ADMA_PORT_REGISTER_MODE))
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return;
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WARN_ON(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE);
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tmp = readw(mmio + NV_ADMA_CTL);
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@ -568,7 +568,7 @@ static int nv_adma_slave_config(struct scsi_device *sdev)
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/* Subtract 1 since an extra entry may be needed for padding, see
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libata-scsi.c */
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sg_tablesize = LIBATA_MAX_PRD - 1;
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/* Since the legacy DMA engine is in use, we need to disable ADMA
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on the port. */
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adma_enable = 0;
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@ -580,7 +580,7 @@ static int nv_adma_slave_config(struct scsi_device *sdev)
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sg_tablesize = NV_ADMA_SGTBL_TOTAL_LEN;
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adma_enable = 1;
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}
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pci_read_config_dword(pdev, NV_MCP_SATA_CFG_20, ¤t_reg);
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if(ap->port_no == 1)
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@ -589,7 +589,7 @@ static int nv_adma_slave_config(struct scsi_device *sdev)
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else
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config_mask = NV_MCP_SATA_CFG_20_PORT0_EN |
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NV_MCP_SATA_CFG_20_PORT0_PWB_EN;
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if(adma_enable) {
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new_reg = current_reg | config_mask;
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pp->flags &= ~NV_ADMA_ATAPI_SETUP_COMPLETE;
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@ -598,10 +598,10 @@ static int nv_adma_slave_config(struct scsi_device *sdev)
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new_reg = current_reg & ~config_mask;
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pp->flags |= NV_ADMA_ATAPI_SETUP_COMPLETE;
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}
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if(current_reg != new_reg)
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pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, new_reg);
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blk_queue_bounce_limit(sdev->request_queue, bounce_limit);
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blk_queue_segment_boundary(sdev->request_queue, segment_boundary);
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blk_queue_max_hw_segments(sdev->request_queue, sg_tablesize);
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@ -812,13 +812,13 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance)
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handled++; /* irq handled if we got here */
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}
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}
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if(notifier_clears[0] || notifier_clears[1]) {
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/* Note: Both notifier clear registers must be written
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if either is set, even if one is zero, according to NVIDIA. */
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writel(notifier_clears[0],
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writel(notifier_clears[0],
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nv_adma_notifier_clear_block(host->ports[0]));
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writel(notifier_clears[1],
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writel(notifier_clears[1],
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nv_adma_notifier_clear_block(host->ports[1]));
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}
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@ -311,7 +311,7 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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pi.flags |= ATA_FLAG_SLAVE_POSS;
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}
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break;
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case 0x0182:
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case 0x0183:
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pci_read_config_dword ( pdev, 0x6C, &val);
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@ -330,7 +330,7 @@ static struct ata_probe_ent *vt6420_init_probe_ent(struct pci_dev *pdev)
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{
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struct ata_probe_ent *probe_ent;
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struct ata_port_info *ppi[2];
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ppi[0] = ppi[1] = &vt6420_port_info;
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probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
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if (!probe_ent)
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@ -308,7 +308,7 @@ enum {
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* most devices.
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*/
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ATA_SPINUP_WAIT = 8000,
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/* Horkage types. May be set by libata or controller on drives
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(some horkage may be drive/controller pair dependant */
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