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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 00:10:10 +07:00
r8169: add basic phylib support
Add basic phylib support to r8169. All now unneeded old PHY handling code will be removed in subsequent patches. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Heiner Kallweit
David S. Miller
parent
fcaccc8293
commit
f1e911d5d0
@ -99,6 +99,7 @@ config R8169
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depends on PCI
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select FW_LOADER
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select CRC32
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select PHYLIB
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select MII
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---help---
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Say Y here if you have a Realtek 8169 PCI Gigabit Ethernet adapter.
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@ -16,6 +16,7 @@
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#include <linux/delay.h>
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#include <linux/ethtool.h>
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#include <linux/mii.h>
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#include <linux/phy.h>
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#include <linux/if_vlan.h>
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#include <linux/crc32.h>
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#include <linux/in.h>
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@ -754,6 +755,7 @@ struct rtl8169_private {
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} wk;
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struct mii_if_info mii;
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struct mii_bus *mii_bus;
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dma_addr_t counters_phys_addr;
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struct rtl8169_counters *counters;
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struct rtl8169_tc_offsets tc_offset;
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@ -1444,11 +1446,6 @@ static unsigned int rtl8169_xmii_reset_pending(struct rtl8169_private *tp)
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return rtl_readphy(tp, MII_BMCR) & BMCR_RESET;
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}
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static unsigned int rtl8169_xmii_link_ok(struct rtl8169_private *tp)
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{
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return RTL_R8(tp, PHYstatus) & LinkStatus;
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}
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static void rtl8169_xmii_reset_enable(struct rtl8169_private *tp)
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{
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unsigned int val;
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@ -1513,25 +1510,6 @@ static void rtl_link_chg_patch(struct rtl8169_private *tp)
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}
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}
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static void rtl8169_check_link_status(struct net_device *dev,
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struct rtl8169_private *tp)
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{
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struct device *d = tp_to_dev(tp);
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if (rtl8169_xmii_link_ok(tp)) {
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rtl_link_chg_patch(tp);
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/* This is to cancel a scheduled suspend if there's one. */
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pm_request_resume(d);
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netif_carrier_on(dev);
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if (net_ratelimit())
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netif_info(tp, ifup, dev, "link up\n");
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} else {
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netif_carrier_off(dev);
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netif_info(tp, ifdown, dev, "link down\n");
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pm_runtime_idle(d);
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}
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}
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#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
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static u32 __rtl8169_get_wol(struct rtl8169_private *tp)
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@ -6221,7 +6199,6 @@ static void rtl_reset_work(struct rtl8169_private *tp)
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napi_enable(&tp->napi);
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rtl_hw_start(tp);
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netif_wake_queue(dev);
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rtl8169_check_link_status(dev, tp);
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}
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static void rtl8169_tx_timeout(struct net_device *dev)
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@ -6838,7 +6815,7 @@ static void rtl_slow_event_work(struct rtl8169_private *tp)
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rtl8169_pcierr_interrupt(dev);
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if (status & LinkChg)
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rtl8169_check_link_status(dev, tp);
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phy_mac_interrupt(dev->phydev);
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rtl_irq_enable_all(tp);
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}
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@ -6920,10 +6897,52 @@ static void rtl8169_rx_missed(struct net_device *dev)
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RTL_W32(tp, RxMissed, 0);
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}
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static void r8169_phylink_handler(struct net_device *ndev)
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{
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struct rtl8169_private *tp = netdev_priv(ndev);
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if (netif_carrier_ok(ndev)) {
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rtl_link_chg_patch(tp);
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pm_request_resume(&tp->pci_dev->dev);
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} else {
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pm_runtime_idle(&tp->pci_dev->dev);
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}
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if (net_ratelimit())
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phy_print_status(ndev->phydev);
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}
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static int r8169_phy_connect(struct rtl8169_private *tp)
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{
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struct phy_device *phydev = mdiobus_get_phy(tp->mii_bus, 0);
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phy_interface_t phy_mode;
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int ret;
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phy_mode = tp->mii.supports_gmii ? PHY_INTERFACE_MODE_GMII :
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PHY_INTERFACE_MODE_MII;
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ret = phy_connect_direct(tp->dev, phydev, r8169_phylink_handler,
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phy_mode);
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if (ret)
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return ret;
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if (!tp->mii.supports_gmii)
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phy_set_max_speed(phydev, SPEED_100);
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/* Ensure to advertise everything, incl. pause */
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phydev->advertising = phydev->supported;
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phy_attached_info(phydev);
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return 0;
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}
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static void rtl8169_down(struct net_device *dev)
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{
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struct rtl8169_private *tp = netdev_priv(dev);
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phy_stop(dev->phydev);
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napi_disable(&tp->napi);
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netif_stop_queue(dev);
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@ -6963,6 +6982,8 @@ static int rtl8169_close(struct net_device *dev)
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cancel_work_sync(&tp->wk.work);
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phy_disconnect(dev->phydev);
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pci_free_irq(pdev, 0, tp);
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dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray,
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@ -7023,6 +7044,10 @@ static int rtl_open(struct net_device *dev)
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if (retval < 0)
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goto err_release_fw_2;
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retval = r8169_phy_connect(tp);
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if (retval)
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goto err_free_irq;
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rtl_lock_work(tp);
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set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
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@ -7038,16 +7063,17 @@ static int rtl_open(struct net_device *dev)
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if (!rtl8169_init_counter_offsets(tp))
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netif_warn(tp, hw, dev, "counter reset/update failed\n");
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phy_start(dev->phydev);
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netif_start_queue(dev);
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rtl_unlock_work(tp);
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pm_runtime_put_sync(&pdev->dev);
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rtl8169_check_link_status(dev, tp);
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out:
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return retval;
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err_free_irq:
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pci_free_irq(pdev, 0, tp);
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err_release_fw_2:
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rtl_release_firmware(tp);
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rtl8169_rx_clear(tp);
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@ -7126,6 +7152,7 @@ static void rtl8169_net_suspend(struct net_device *dev)
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if (!netif_running(dev))
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return;
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phy_stop(dev->phydev);
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netif_device_detach(dev);
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netif_stop_queue(dev);
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@ -7158,6 +7185,8 @@ static void __rtl8169_resume(struct net_device *dev)
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rtl_pll_power_up(tp);
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rtl8169_init_phy(dev, tp);
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phy_start(tp->dev->phydev);
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rtl_lock_work(tp);
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napi_enable(&tp->napi);
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set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
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@ -7303,6 +7332,7 @@ static void rtl_remove_one(struct pci_dev *pdev)
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netif_napi_del(&tp->napi);
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unregister_netdev(dev);
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mdiobus_unregister(tp->mii_bus);
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rtl_release_firmware(tp);
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@ -7388,6 +7418,65 @@ DECLARE_RTL_COND(rtl_rxtx_empty_cond)
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return (RTL_R8(tp, MCU) & RXTX_EMPTY) == RXTX_EMPTY;
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}
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static int r8169_mdio_read_reg(struct mii_bus *mii_bus, int phyaddr, int phyreg)
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{
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struct rtl8169_private *tp = mii_bus->priv;
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if (phyaddr > 0)
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return -ENODEV;
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return rtl_readphy(tp, phyreg);
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}
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static int r8169_mdio_write_reg(struct mii_bus *mii_bus, int phyaddr,
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int phyreg, u16 val)
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{
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struct rtl8169_private *tp = mii_bus->priv;
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if (phyaddr > 0)
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return -ENODEV;
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rtl_writephy(tp, phyreg, val);
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return 0;
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}
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static int r8169_mdio_register(struct rtl8169_private *tp)
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{
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struct pci_dev *pdev = tp->pci_dev;
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struct phy_device *phydev;
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struct mii_bus *new_bus;
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int ret;
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new_bus = devm_mdiobus_alloc(&pdev->dev);
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if (!new_bus)
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return -ENOMEM;
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new_bus->name = "r8169";
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new_bus->priv = tp;
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new_bus->parent = &pdev->dev;
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new_bus->irq[0] = PHY_IGNORE_INTERRUPT;
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snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x",
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PCI_DEVID(pdev->bus->number, pdev->devfn));
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new_bus->read = r8169_mdio_read_reg;
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new_bus->write = r8169_mdio_write_reg;
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ret = mdiobus_register(new_bus);
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if (ret)
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return ret;
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phydev = mdiobus_get_phy(new_bus, 0);
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if (!phydev) {
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mdiobus_unregister(new_bus);
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return -ENODEV;
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}
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tp->mii_bus = new_bus;
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return 0;
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}
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static void rtl_hw_init_8168g(struct rtl8169_private *tp)
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{
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u32 data;
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@ -7644,10 +7733,14 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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pci_set_drvdata(pdev, dev);
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rc = register_netdev(dev);
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if (rc < 0)
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rc = r8169_mdio_register(tp);
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if (rc)
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return rc;
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rc = register_netdev(dev);
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if (rc)
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goto err_mdio_unregister;
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netif_info(tp, probe, dev, "%s, %pM, XID %08x, IRQ %d\n",
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rtl_chip_infos[chipset].name, dev->dev_addr,
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(u32)(RTL_R32(tp, TxConfig) & 0xfcf0f8ff),
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@ -7662,12 +7755,14 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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if (r8168_check_dash(tp))
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rtl8168_driver_start(tp);
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netif_carrier_off(dev);
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if (pci_dev_run_wake(pdev))
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pm_runtime_put_sync(&pdev->dev);
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return 0;
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err_mdio_unregister:
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mdiobus_unregister(tp->mii_bus);
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return rc;
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}
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static struct pci_driver rtl8169_pci_driver = {
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