AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-11-26 00:40:55 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

MIPS: Loongson: Remove pointless sample_lock from oprofile code.

Browse Source 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2010-02-27 12:53:39 +01:00
parent 36946d7387
commit f1d39e6ed7
1 changed files with 0 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
arch/mips/oprofile/op_model_loongson2.c
View File

@ -47,8 +47,6 @@ static struct loongson2_register_config {
int cnt1_enabled, cnt2_enabled;
} reg;
static DEFINE_SPINLOCK(sample_lock);
static char *oprofid = "LoongsonPerf";
static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
/* Compute all of the registers in preparation for enabling profiling. */
@ -115,7 +113,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
uint64_t counter, counter1, counter2;
struct pt_regs *regs = get_irq_regs();
int enabled;
unsigned long flags;
/*
* LOONGSON2 defines two 32-bit performance counters.
@ -136,8 +133,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
counter1 = counter & 0xffffffff;
counter2 = counter >> 32;
spin_lock_irqsave(&sample_lock, flags);
if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) {
if (reg.cnt1_enabled)
oprofile_add_sample(regs, 0);
@ -149,8 +144,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
counter2 = reg.reset_counter2;
}
spin_unlock_irqrestore(&sample_lock, flags);
write_c0_perfcnt((counter2 << 32) | counter1);
return IRQ_HANDLED;