mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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powerpc/eeh: Make diag-data not endian dependent
It's followup of commit ddf0322a ("powerpc/powernv: Fix endianness
problems in EEH"). The patch helps to get non-endian-dependent
diag-data.
Cc: Guo Chao <yan@linux.vnet.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Gavin Shan
Benjamin Herrenschmidt
parent
0dae27439a
commit
f18440fb7e
@ -513,40 +513,40 @@ enum {
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};
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struct OpalIoP7IOCErrorData {
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uint16_t type;
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__be16 type;
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/* GEM */
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uint64_t gemXfir;
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uint64_t gemRfir;
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uint64_t gemRirqfir;
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uint64_t gemMask;
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uint64_t gemRwof;
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__be64 gemXfir;
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__be64 gemRfir;
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__be64 gemRirqfir;
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__be64 gemMask;
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__be64 gemRwof;
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/* LEM */
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uint64_t lemFir;
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uint64_t lemErrMask;
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uint64_t lemAction0;
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uint64_t lemAction1;
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uint64_t lemWof;
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__be64 lemFir;
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__be64 lemErrMask;
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__be64 lemAction0;
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__be64 lemAction1;
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__be64 lemWof;
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union {
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struct OpalIoP7IOCRgcErrorData {
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uint64_t rgcStatus; /* 3E1C10 */
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uint64_t rgcLdcp; /* 3E1C18 */
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__be64 rgcStatus; /* 3E1C10 */
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__be64 rgcLdcp; /* 3E1C18 */
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}rgc;
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struct OpalIoP7IOCBiErrorData {
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uint64_t biLdcp0; /* 3C0100, 3C0118 */
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uint64_t biLdcp1; /* 3C0108, 3C0120 */
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uint64_t biLdcp2; /* 3C0110, 3C0128 */
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uint64_t biFenceStatus; /* 3C0130, 3C0130 */
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__be64 biLdcp0; /* 3C0100, 3C0118 */
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__be64 biLdcp1; /* 3C0108, 3C0120 */
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__be64 biLdcp2; /* 3C0110, 3C0128 */
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__be64 biFenceStatus; /* 3C0130, 3C0130 */
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uint8_t biDownbound; /* BI Downbound or Upbound */
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u8 biDownbound; /* BI Downbound or Upbound */
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}bi;
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struct OpalIoP7IOCCiErrorData {
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uint64_t ciPortStatus; /* 3Dn008 */
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uint64_t ciPortLdcp; /* 3Dn010 */
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__be64 ciPortStatus; /* 3Dn008 */
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__be64 ciPortLdcp; /* 3Dn010 */
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uint8_t ciPort; /* Index of CI port: 0/1 */
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u8 ciPort; /* Index of CI port: 0/1 */
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}ci;
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};
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};
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@ -578,60 +578,60 @@ struct OpalIoPhbErrorCommon {
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struct OpalIoP7IOCPhbErrorData {
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struct OpalIoPhbErrorCommon common;
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uint32_t brdgCtl;
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__be32 brdgCtl;
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// P7IOC utl regs
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uint32_t portStatusReg;
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uint32_t rootCmplxStatus;
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uint32_t busAgentStatus;
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__be32 portStatusReg;
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__be32 rootCmplxStatus;
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__be32 busAgentStatus;
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// P7IOC cfg regs
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uint32_t deviceStatus;
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uint32_t slotStatus;
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uint32_t linkStatus;
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uint32_t devCmdStatus;
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uint32_t devSecStatus;
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__be32 deviceStatus;
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__be32 slotStatus;
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__be32 linkStatus;
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__be32 devCmdStatus;
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__be32 devSecStatus;
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// cfg AER regs
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uint32_t rootErrorStatus;
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uint32_t uncorrErrorStatus;
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uint32_t corrErrorStatus;
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uint32_t tlpHdr1;
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uint32_t tlpHdr2;
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uint32_t tlpHdr3;
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uint32_t tlpHdr4;
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uint32_t sourceId;
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__be32 rootErrorStatus;
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__be32 uncorrErrorStatus;
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__be32 corrErrorStatus;
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__be32 tlpHdr1;
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__be32 tlpHdr2;
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__be32 tlpHdr3;
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__be32 tlpHdr4;
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__be32 sourceId;
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uint32_t rsv3;
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__be32 rsv3;
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// Record data about the call to allocate a buffer.
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uint64_t errorClass;
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uint64_t correlator;
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__be64 errorClass;
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__be64 correlator;
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//P7IOC MMIO Error Regs
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uint64_t p7iocPlssr; // n120
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uint64_t p7iocCsr; // n110
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uint64_t lemFir; // nC00
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uint64_t lemErrorMask; // nC18
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uint64_t lemWOF; // nC40
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uint64_t phbErrorStatus; // nC80
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uint64_t phbFirstErrorStatus; // nC88
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uint64_t phbErrorLog0; // nCC0
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uint64_t phbErrorLog1; // nCC8
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uint64_t mmioErrorStatus; // nD00
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uint64_t mmioFirstErrorStatus; // nD08
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uint64_t mmioErrorLog0; // nD40
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uint64_t mmioErrorLog1; // nD48
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uint64_t dma0ErrorStatus; // nD80
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uint64_t dma0FirstErrorStatus; // nD88
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uint64_t dma0ErrorLog0; // nDC0
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uint64_t dma0ErrorLog1; // nDC8
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uint64_t dma1ErrorStatus; // nE00
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uint64_t dma1FirstErrorStatus; // nE08
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uint64_t dma1ErrorLog0; // nE40
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uint64_t dma1ErrorLog1; // nE48
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uint64_t pestA[OPAL_P7IOC_NUM_PEST_REGS];
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uint64_t pestB[OPAL_P7IOC_NUM_PEST_REGS];
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__be64 p7iocPlssr; // n120
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__be64 p7iocCsr; // n110
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__be64 lemFir; // nC00
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__be64 lemErrorMask; // nC18
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__be64 lemWOF; // nC40
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__be64 phbErrorStatus; // nC80
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__be64 phbFirstErrorStatus; // nC88
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__be64 phbErrorLog0; // nCC0
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__be64 phbErrorLog1; // nCC8
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__be64 mmioErrorStatus; // nD00
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__be64 mmioFirstErrorStatus; // nD08
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__be64 mmioErrorLog0; // nD40
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__be64 mmioErrorLog1; // nD48
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__be64 dma0ErrorStatus; // nD80
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__be64 dma0FirstErrorStatus; // nD88
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__be64 dma0ErrorLog0; // nDC0
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__be64 dma0ErrorLog1; // nDC8
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__be64 dma1ErrorStatus; // nE00
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__be64 dma1FirstErrorStatus; // nE08
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__be64 dma1ErrorLog0; // nE40
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__be64 dma1ErrorLog1; // nE48
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__be64 pestA[OPAL_P7IOC_NUM_PEST_REGS];
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__be64 pestB[OPAL_P7IOC_NUM_PEST_REGS];
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};
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struct OpalIoPhb3ErrorData {
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@ -605,18 +605,24 @@ static int ioda_eeh_configure_bridge(struct eeh_pe *pe)
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static void ioda_eeh_hub_diag_common(struct OpalIoP7IOCErrorData *data)
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{
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/* GEM */
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pr_info(" GEM XFIR: %016llx\n", data->gemXfir);
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pr_info(" GEM RFIR: %016llx\n", data->gemRfir);
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pr_info(" GEM RIRQFIR: %016llx\n", data->gemRirqfir);
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pr_info(" GEM Mask: %016llx\n", data->gemMask);
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pr_info(" GEM RWOF: %016llx\n", data->gemRwof);
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if (data->gemXfir || data->gemRfir ||
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data->gemRirqfir || data->gemMask || data->gemRwof)
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pr_info(" GEM: %016llx %016llx %016llx %016llx %016llx\n",
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be64_to_cpu(data->gemXfir),
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be64_to_cpu(data->gemRfir),
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be64_to_cpu(data->gemRirqfir),
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be64_to_cpu(data->gemMask),
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be64_to_cpu(data->gemRwof));
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/* LEM */
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pr_info(" LEM FIR: %016llx\n", data->lemFir);
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pr_info(" LEM Error Mask: %016llx\n", data->lemErrMask);
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pr_info(" LEM Action 0: %016llx\n", data->lemAction0);
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pr_info(" LEM Action 1: %016llx\n", data->lemAction1);
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pr_info(" LEM WOF: %016llx\n", data->lemWof);
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if (data->lemFir || data->lemErrMask ||
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data->lemAction0 || data->lemAction1 || data->lemWof)
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pr_info(" LEM: %016llx %016llx %016llx %016llx %016llx\n",
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be64_to_cpu(data->lemFir),
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be64_to_cpu(data->lemErrMask),
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be64_to_cpu(data->lemAction0),
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be64_to_cpu(data->lemAction1),
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be64_to_cpu(data->lemWof));
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}
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static void ioda_eeh_hub_diag(struct pci_controller *hose)
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@ -636,24 +642,31 @@ static void ioda_eeh_hub_diag(struct pci_controller *hose)
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case OPAL_P7IOC_DIAG_TYPE_RGC:
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pr_info("P7IOC diag-data for RGC\n\n");
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ioda_eeh_hub_diag_common(data);
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pr_info(" RGC Status: %016llx\n", data->rgc.rgcStatus);
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pr_info(" RGC LDCP: %016llx\n", data->rgc.rgcLdcp);
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if (data->rgc.rgcStatus || data->rgc.rgcLdcp)
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pr_info(" RGC: %016llx %016llx\n",
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be64_to_cpu(data->rgc.rgcStatus),
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be64_to_cpu(data->rgc.rgcLdcp));
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break;
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case OPAL_P7IOC_DIAG_TYPE_BI:
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pr_info("P7IOC diag-data for BI %s\n\n",
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data->bi.biDownbound ? "Downbound" : "Upbound");
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ioda_eeh_hub_diag_common(data);
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pr_info(" BI LDCP 0: %016llx\n", data->bi.biLdcp0);
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pr_info(" BI LDCP 1: %016llx\n", data->bi.biLdcp1);
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pr_info(" BI LDCP 2: %016llx\n", data->bi.biLdcp2);
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pr_info(" BI Fence Status: %016llx\n", data->bi.biFenceStatus);
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if (data->bi.biLdcp0 || data->bi.biLdcp1 ||
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data->bi.biLdcp2 || data->bi.biFenceStatus)
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pr_info(" BI: %016llx %016llx %016llx %016llx\n",
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be64_to_cpu(data->bi.biLdcp0),
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be64_to_cpu(data->bi.biLdcp1),
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be64_to_cpu(data->bi.biLdcp2),
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be64_to_cpu(data->bi.biFenceStatus));
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break;
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case OPAL_P7IOC_DIAG_TYPE_CI:
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pr_info("P7IOC diag-data for CI Port %d\\nn",
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pr_info("P7IOC diag-data for CI Port %d\n\n",
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data->ci.ciPort);
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ioda_eeh_hub_diag_common(data);
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pr_info(" CI Port Status: %016llx\n", data->ci.ciPortStatus);
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pr_info(" CI Port LDCP: %016llx\n", data->ci.ciPortLdcp);
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if (data->ci.ciPortStatus || data->ci.ciPortLdcp)
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pr_info(" CI: %016llx %016llx\n",
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be64_to_cpu(data->ci.ciPortStatus),
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be64_to_cpu(data->ci.ciPortLdcp));
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break;
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case OPAL_P7IOC_DIAG_TYPE_MISC:
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pr_info("P7IOC diag-data for MISC\n\n");
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@ -132,61 +132,78 @@ static void pnv_pci_dump_p7ioc_diag_data(struct pci_controller *hose,
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data = (struct OpalIoP7IOCPhbErrorData *)common;
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pr_info("P7IOC PHB#%d Diag-data (Version: %d)\n",
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hose->global_number, common->version);
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hose->global_number, be32_to_cpu(common->version));
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if (data->brdgCtl)
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pr_info("brdgCtl: %08x\n",
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data->brdgCtl);
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be32_to_cpu(data->brdgCtl));
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if (data->portStatusReg || data->rootCmplxStatus ||
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data->busAgentStatus)
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pr_info("UtlSts: %08x %08x %08x\n",
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data->portStatusReg, data->rootCmplxStatus,
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data->busAgentStatus);
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be32_to_cpu(data->portStatusReg),
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be32_to_cpu(data->rootCmplxStatus),
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be32_to_cpu(data->busAgentStatus));
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if (data->deviceStatus || data->slotStatus ||
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data->linkStatus || data->devCmdStatus ||
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data->devSecStatus)
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pr_info("RootSts: %08x %08x %08x %08x %08x\n",
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data->deviceStatus, data->slotStatus,
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data->linkStatus, data->devCmdStatus,
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data->devSecStatus);
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be32_to_cpu(data->deviceStatus),
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be32_to_cpu(data->slotStatus),
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be32_to_cpu(data->linkStatus),
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be32_to_cpu(data->devCmdStatus),
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be32_to_cpu(data->devSecStatus));
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if (data->rootErrorStatus || data->uncorrErrorStatus ||
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data->corrErrorStatus)
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pr_info("RootErrSts: %08x %08x %08x\n",
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data->rootErrorStatus, data->uncorrErrorStatus,
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data->corrErrorStatus);
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be32_to_cpu(data->rootErrorStatus),
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be32_to_cpu(data->uncorrErrorStatus),
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be32_to_cpu(data->corrErrorStatus));
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if (data->tlpHdr1 || data->tlpHdr2 ||
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data->tlpHdr3 || data->tlpHdr4)
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pr_info("RootErrLog: %08x %08x %08x %08x\n",
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data->tlpHdr1, data->tlpHdr2,
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data->tlpHdr3, data->tlpHdr4);
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be32_to_cpu(data->tlpHdr1),
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be32_to_cpu(data->tlpHdr2),
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be32_to_cpu(data->tlpHdr3),
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be32_to_cpu(data->tlpHdr4));
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if (data->sourceId || data->errorClass ||
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data->correlator)
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pr_info("RootErrLog1: %08x %016llx %016llx\n",
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data->sourceId, data->errorClass,
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data->correlator);
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be32_to_cpu(data->sourceId),
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be64_to_cpu(data->errorClass),
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be64_to_cpu(data->correlator));
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if (data->p7iocPlssr || data->p7iocCsr)
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pr_info("PhbSts: %016llx %016llx\n",
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data->p7iocPlssr, data->p7iocCsr);
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be64_to_cpu(data->p7iocPlssr),
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be64_to_cpu(data->p7iocCsr));
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if (data->lemFir)
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pr_info("Lem: %016llx %016llx %016llx\n",
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data->lemFir, data->lemErrorMask,
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data->lemWOF);
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be64_to_cpu(data->lemFir),
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be64_to_cpu(data->lemErrorMask),
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be64_to_cpu(data->lemWOF));
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if (data->phbErrorStatus)
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pr_info("PhbErr: %016llx %016llx %016llx %016llx\n",
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data->phbErrorStatus, data->phbFirstErrorStatus,
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data->phbErrorLog0, data->phbErrorLog1);
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be64_to_cpu(data->phbErrorStatus),
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be64_to_cpu(data->phbFirstErrorStatus),
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be64_to_cpu(data->phbErrorLog0),
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be64_to_cpu(data->phbErrorLog1));
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if (data->mmioErrorStatus)
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pr_info("OutErr: %016llx %016llx %016llx %016llx\n",
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data->mmioErrorStatus, data->mmioFirstErrorStatus,
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data->mmioErrorLog0, data->mmioErrorLog1);
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be64_to_cpu(data->mmioErrorStatus),
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be64_to_cpu(data->mmioFirstErrorStatus),
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be64_to_cpu(data->mmioErrorLog0),
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be64_to_cpu(data->mmioErrorLog1));
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if (data->dma0ErrorStatus)
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pr_info("InAErr: %016llx %016llx %016llx %016llx\n",
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data->dma0ErrorStatus, data->dma0FirstErrorStatus,
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data->dma0ErrorLog0, data->dma0ErrorLog1);
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be64_to_cpu(data->dma0ErrorStatus),
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be64_to_cpu(data->dma0FirstErrorStatus),
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be64_to_cpu(data->dma0ErrorLog0),
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be64_to_cpu(data->dma0ErrorLog1));
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if (data->dma1ErrorStatus)
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pr_info("InBErr: %016llx %016llx %016llx %016llx\n",
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data->dma1ErrorStatus, data->dma1FirstErrorStatus,
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data->dma1ErrorLog0, data->dma1ErrorLog1);
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be64_to_cpu(data->dma1ErrorStatus),
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be64_to_cpu(data->dma1FirstErrorStatus),
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be64_to_cpu(data->dma1ErrorLog0),
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be64_to_cpu(data->dma1ErrorLog1));
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for (i = 0; i < OPAL_P7IOC_NUM_PEST_REGS; i++) {
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if ((data->pestA[i] >> 63) == 0 &&
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@ -194,7 +211,8 @@ static void pnv_pci_dump_p7ioc_diag_data(struct pci_controller *hose,
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continue;
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pr_info("PE[%3d] A/B: %016llx %016llx\n",
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i, data->pestA[i], data->pestB[i]);
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i, be64_to_cpu(data->pestA[i]),
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be64_to_cpu(data->pestB[i]));
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}
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}
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