From f1472f82cc4d2dd747dc3e5e9c7e0ae3d3911922 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 5 Jun 2016 23:00:47 -0300 Subject: [PATCH] ARM: dts: imx6qdl-sabresd: Pass the correct PCI reset polarity The PCI reset GPIO is active low, so represent it with the GPIO_ACTIVE_LOW flag. Even though the imx6 PCI driver will not take the polarity into account in this case, it is better to provide a correct description in device-tree. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index 5248e7bd2b06..bea707f0646a 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -533,7 +533,7 @@ lvds0_out: endpoint { &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio7 12 0>; + reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; status = "okay"; };