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stmmac: rework get_hw_feature function
On next GMAC IP generation (4.xx), the way to get hw feature is not the same than on previous 3.xx. As it is hardware dependent, the way to get hw capabilities should be defined in dma ops of each MAC IP. It will avoid also a huge computation of hw capabilities in stmmac_main. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -412,7 +412,8 @@ struct stmmac_dma_ops {
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int (*dma_interrupt) (void __iomem *ioaddr,
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struct stmmac_extra_stats *x);
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/* If supported then get the optional core features */
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unsigned int (*get_hw_feature) (void __iomem *ioaddr);
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void (*get_hw_feature)(void __iomem *ioaddr,
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struct dma_features *dma_cap);
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/* Program the HW RX Watchdog */
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void (*rx_watchdog) (void __iomem *ioaddr, u32 riwt);
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};
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@ -215,9 +215,40 @@ static void dwmac1000_dump_dma_regs(void __iomem *ioaddr)
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}
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}
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static unsigned int dwmac1000_get_hw_feature(void __iomem *ioaddr)
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static void dwmac1000_get_hw_feature(void __iomem *ioaddr,
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struct dma_features *dma_cap)
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{
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return readl(ioaddr + DMA_HW_FEATURE);
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u32 hw_cap = readl(ioaddr + DMA_HW_FEATURE);
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dma_cap->mbps_10_100 = (hw_cap & DMA_HW_FEAT_MIISEL);
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dma_cap->mbps_1000 = (hw_cap & DMA_HW_FEAT_GMIISEL) >> 1;
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dma_cap->half_duplex = (hw_cap & DMA_HW_FEAT_HDSEL) >> 2;
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dma_cap->hash_filter = (hw_cap & DMA_HW_FEAT_HASHSEL) >> 4;
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dma_cap->multi_addr = (hw_cap & DMA_HW_FEAT_ADDMAC) >> 5;
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dma_cap->pcs = (hw_cap & DMA_HW_FEAT_PCSSEL) >> 6;
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dma_cap->sma_mdio = (hw_cap & DMA_HW_FEAT_SMASEL) >> 8;
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dma_cap->pmt_remote_wake_up = (hw_cap & DMA_HW_FEAT_RWKSEL) >> 9;
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dma_cap->pmt_magic_frame = (hw_cap & DMA_HW_FEAT_MGKSEL) >> 10;
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/* MMC */
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dma_cap->rmon = (hw_cap & DMA_HW_FEAT_MMCSEL) >> 11;
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/* IEEE 1588-2002 */
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dma_cap->time_stamp =
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(hw_cap & DMA_HW_FEAT_TSVER1SEL) >> 12;
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/* IEEE 1588-2008 */
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dma_cap->atime_stamp = (hw_cap & DMA_HW_FEAT_TSVER2SEL) >> 13;
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/* 802.3az - Energy-Efficient Ethernet (EEE) */
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dma_cap->eee = (hw_cap & DMA_HW_FEAT_EEESEL) >> 14;
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dma_cap->av = (hw_cap & DMA_HW_FEAT_AVSEL) >> 15;
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/* TX and RX csum */
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dma_cap->tx_coe = (hw_cap & DMA_HW_FEAT_TXCOESEL) >> 16;
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dma_cap->rx_coe_type1 = (hw_cap & DMA_HW_FEAT_RXTYP1COE) >> 17;
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dma_cap->rx_coe_type2 = (hw_cap & DMA_HW_FEAT_RXTYP2COE) >> 18;
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dma_cap->rxfifo_over_2048 = (hw_cap & DMA_HW_FEAT_RXFIFOSIZE) >> 19;
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/* TX and RX number of channels */
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dma_cap->number_rx_channel = (hw_cap & DMA_HW_FEAT_RXCHCNT) >> 20;
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dma_cap->number_tx_channel = (hw_cap & DMA_HW_FEAT_TXCHCNT) >> 22;
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/* Alternate (enhanced) DESC mode */
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dma_cap->enh_desc = (hw_cap & DMA_HW_FEAT_ENHDESSEL) >> 24;
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}
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static void dwmac1000_rx_watchdog(void __iomem *ioaddr, u32 riwt)
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@ -1552,51 +1552,15 @@ static void stmmac_selec_desc_mode(struct stmmac_priv *priv)
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*/
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static int stmmac_get_hw_features(struct stmmac_priv *priv)
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{
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u32 hw_cap = 0;
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u32 ret = 0;
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if (priv->hw->dma->get_hw_feature) {
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hw_cap = priv->hw->dma->get_hw_feature(priv->ioaddr);
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priv->dma_cap.mbps_10_100 = (hw_cap & DMA_HW_FEAT_MIISEL);
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priv->dma_cap.mbps_1000 = (hw_cap & DMA_HW_FEAT_GMIISEL) >> 1;
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priv->dma_cap.half_duplex = (hw_cap & DMA_HW_FEAT_HDSEL) >> 2;
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priv->dma_cap.hash_filter = (hw_cap & DMA_HW_FEAT_HASHSEL) >> 4;
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priv->dma_cap.multi_addr = (hw_cap & DMA_HW_FEAT_ADDMAC) >> 5;
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priv->dma_cap.pcs = (hw_cap & DMA_HW_FEAT_PCSSEL) >> 6;
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priv->dma_cap.sma_mdio = (hw_cap & DMA_HW_FEAT_SMASEL) >> 8;
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priv->dma_cap.pmt_remote_wake_up =
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(hw_cap & DMA_HW_FEAT_RWKSEL) >> 9;
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priv->dma_cap.pmt_magic_frame =
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(hw_cap & DMA_HW_FEAT_MGKSEL) >> 10;
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/* MMC */
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priv->dma_cap.rmon = (hw_cap & DMA_HW_FEAT_MMCSEL) >> 11;
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/* IEEE 1588-2002 */
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priv->dma_cap.time_stamp =
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(hw_cap & DMA_HW_FEAT_TSVER1SEL) >> 12;
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/* IEEE 1588-2008 */
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priv->dma_cap.atime_stamp =
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(hw_cap & DMA_HW_FEAT_TSVER2SEL) >> 13;
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/* 802.3az - Energy-Efficient Ethernet (EEE) */
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priv->dma_cap.eee = (hw_cap & DMA_HW_FEAT_EEESEL) >> 14;
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priv->dma_cap.av = (hw_cap & DMA_HW_FEAT_AVSEL) >> 15;
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/* TX and RX csum */
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priv->dma_cap.tx_coe = (hw_cap & DMA_HW_FEAT_TXCOESEL) >> 16;
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priv->dma_cap.rx_coe_type1 =
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(hw_cap & DMA_HW_FEAT_RXTYP1COE) >> 17;
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priv->dma_cap.rx_coe_type2 =
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(hw_cap & DMA_HW_FEAT_RXTYP2COE) >> 18;
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priv->dma_cap.rxfifo_over_2048 =
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(hw_cap & DMA_HW_FEAT_RXFIFOSIZE) >> 19;
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/* TX and RX number of channels */
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priv->dma_cap.number_rx_channel =
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(hw_cap & DMA_HW_FEAT_RXCHCNT) >> 20;
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priv->dma_cap.number_tx_channel =
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(hw_cap & DMA_HW_FEAT_TXCHCNT) >> 22;
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/* Alternate (enhanced) DESC mode */
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priv->dma_cap.enh_desc = (hw_cap & DMA_HW_FEAT_ENHDESSEL) >> 24;
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priv->hw->dma->get_hw_feature(priv->ioaddr,
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&priv->dma_cap);
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ret = 1;
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}
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return hw_cap;
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return ret;
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}
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/**
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