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MIPS: lantiq: Shorten register names, remove unused macros
The macros LTQ_ICU_IM1_ISR and LTQ_ICU_OFFSET seems to be unused, remove them. Allong with that, remove _IM0 substring from the macro names. The IM (interrupt module) is already defined in IOMEM access and IM0 would be misleading. Signed-off-by: Petr Cvek <petrcvekcz@gmail.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: hauke@hauke-m.de Cc: john@phrozen.org Cc: linux-mips@vger.kernel.org Cc: openwrt-devel@lists.openwrt.org Cc: pakahmar@hotmail.com
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@ -22,13 +22,11 @@
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#include <irq.h>
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/* register definitions - internal irqs */
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#define LTQ_ICU_IM0_ISR 0x0000
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#define LTQ_ICU_IM0_IER 0x0008
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#define LTQ_ICU_IM0_IOSR 0x0010
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#define LTQ_ICU_IM0_IRSR 0x0018
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#define LTQ_ICU_IM0_IMR 0x0020
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#define LTQ_ICU_IM1_ISR 0x0028
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#define LTQ_ICU_OFFSET (LTQ_ICU_IM1_ISR - LTQ_ICU_IM0_ISR)
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#define LTQ_ICU_ISR 0x0000
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#define LTQ_ICU_IER 0x0008
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#define LTQ_ICU_IOSR 0x0010
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#define LTQ_ICU_IRSR 0x0018
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#define LTQ_ICU_IMR 0x0020
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/* register definitions - external irqs */
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#define LTQ_EIU_EXIN_C 0x0000
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@ -77,8 +75,8 @@ void ltq_disable_irq(struct irq_data *d)
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unsigned long im = offset / INT_NUM_IM_OFFSET;
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offset %= INT_NUM_IM_OFFSET;
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ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IM0_IER) & ~BIT(offset),
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LTQ_ICU_IM0_IER);
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ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IER) & ~BIT(offset),
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LTQ_ICU_IER);
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}
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void ltq_mask_and_ack_irq(struct irq_data *d)
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@ -87,9 +85,9 @@ void ltq_mask_and_ack_irq(struct irq_data *d)
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unsigned long im = offset / INT_NUM_IM_OFFSET;
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offset %= INT_NUM_IM_OFFSET;
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ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IM0_IER) & ~BIT(offset),
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LTQ_ICU_IM0_IER);
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ltq_icu_w32(im, BIT(offset), LTQ_ICU_IM0_ISR);
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ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IER) & ~BIT(offset),
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LTQ_ICU_IER);
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ltq_icu_w32(im, BIT(offset), LTQ_ICU_ISR);
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}
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static void ltq_ack_irq(struct irq_data *d)
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@ -98,7 +96,7 @@ static void ltq_ack_irq(struct irq_data *d)
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unsigned long im = offset / INT_NUM_IM_OFFSET;
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offset %= INT_NUM_IM_OFFSET;
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ltq_icu_w32(im, BIT(offset), LTQ_ICU_IM0_ISR);
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ltq_icu_w32(im, BIT(offset), LTQ_ICU_ISR);
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}
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void ltq_enable_irq(struct irq_data *d)
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@ -107,8 +105,8 @@ void ltq_enable_irq(struct irq_data *d)
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unsigned long im = offset / INT_NUM_IM_OFFSET;
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offset %= INT_NUM_IM_OFFSET;
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ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IM0_IER) | BIT(offset),
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LTQ_ICU_IM0_IER);
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ltq_icu_w32(im, ltq_icu_r32(im, LTQ_ICU_IER) | BIT(offset),
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LTQ_ICU_IER);
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}
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static int ltq_eiu_settype(struct irq_data *d, unsigned int type)
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@ -225,7 +223,7 @@ static void ltq_hw_irq_handler(struct irq_desc *desc)
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u32 irq;
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irq_hw_number_t hwirq;
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irq = ltq_icu_r32(module, LTQ_ICU_IM0_IOSR);
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irq = ltq_icu_r32(module, LTQ_ICU_IOSR);
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if (irq == 0)
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return;
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@ -288,9 +286,9 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
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/* turn off all irqs by default */
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for (i = 0; i < MAX_IM; i++) {
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/* make sure all irqs are turned off by default */
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ltq_icu_w32(i, 0, LTQ_ICU_IM0_IER);
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ltq_icu_w32(i, 0, LTQ_ICU_IER);
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/* clear all possibly pending interrupts */
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ltq_icu_w32(i, ~0, LTQ_ICU_IM0_ISR);
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ltq_icu_w32(i, ~0, LTQ_ICU_ISR);
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}
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mips_cpu_irq_init();
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