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iwlwifi: fix 64bit platform firmware loading
This patch fixes loading firmware from memory above 32bit. Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Acked-by: Marcel Holtmann <holtmann@linux.intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -578,14 +578,11 @@ static int iwl5000_load_section(struct iwl_priv *priv,
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FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
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phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
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/* FIME: write the MSB of the phy_addr in CTRL1
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* iwl_write_direct32(priv,
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IWL_FH_TFDIB_CTRL1_REG(IWL_FH_SRVC_CHNL),
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((phy_addr & MSB_MSK)
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<< FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_count);
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*/
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iwl_write_direct32(priv,
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FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL), byte_cnt);
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FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
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(iwl_get_dma_hi_address(phy_addr)
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<< FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
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iwl_write_direct32(priv,
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FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
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1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
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@ -287,6 +287,7 @@
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#define FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE (0x01000000)
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#define FH_MEM_TFDIB_REG1_ADDR_BITSHIFT 28
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/**
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* Transmit DMA Channel Control/Status Registers (TCSR)
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