AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-11-25 17:50:54 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

i2c-bfin-twi: return completion in interrupt for smbus quick transfers

Browse Source 
A smbus quick transfer has no data after the address byte.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Sonic Zhang 2010-03-22 03:23:20 -04:00 committed by Ben Dooks
parent be2f80f0a3
commit f0ac131a21
1 changed files with 7 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/i2c/busses/i2c-bfin-twi.c
View File

@ -159,18 +159,14 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface,
if (mast_stat & BUFWRERR)
dev_dbg(&iface->adap.dev, "Buffer Write Error\n");
/* if both err and complete int stats are set, return proper
* results.
/* If it is a quick transfer, only address without data,
* not an err, return 1.
*/
if (twi_int_status & MCOMP) {
/* If it is a quick transfer, only address without data,
* not an err, return 1.
* If address is acknowledged return 1.
*/
if ((iface->writeNum == 0 && (mast_stat & BUFRDERR))
|| !(mast_stat & ANAK))
iface->result = 1;
}
if (iface->cur_mode == TWI_I2C_MODE_STANDARD &&
iface->transPtr == NULL &&
(twi_int_status & MCOMP) && (mast_stat & DNAK))
iface->result = 1;
complete(&iface->complete);
return;
}