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arm64: dts: apm: Fix timer interrupt polarity for X-Gene 2 SoC
Correct X-Gene 2 timer interrupt polarity as low-level triggered. Signed-off-by: Duc Dang <dhdang@apm.com>
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@ -198,10 +198,10 @@ pmu {
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <1 0 0xff04>, /* Secure Phys IRQ */
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<1 13 0xff04>, /* Non-secure Phys IRQ */
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<1 14 0xff04>, /* Virt IRQ */
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<1 15 0xff04>; /* Hyp IRQ */
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interrupts = <1 0 0xff08>, /* Secure Phys IRQ */
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<1 13 0xff08>, /* Non-secure Phys IRQ */
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<1 14 0xff08>, /* Virt IRQ */
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<1 15 0xff08>; /* Hyp IRQ */
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clock-frequency = <50000000>;
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};
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