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Amlogic 32-bit DT changes for v4.14

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- update clock controler for use as reset controller
 - misc. updates/fixups/improvements
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Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Pull "Amlogic 32-bit DT changes for v4.14" from Kevin Hilman:

- update clock controler for use as reset controller
- misc. updates/fixups/improvements

* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: dts: meson6: use stable UART bindings
  ARM: dts: meson: mark the clock controller also as reset controller
  ARM: dts: meson: add a node which describes the SRAM
  ARM: dts: meson8b: use the existing wdt node to override the compatible
  ARM: dts: meson8: add the PWM controller nodes
  ARM: dts: move the pwm_ab and pwm_cd nodes to meson.dtsi
This commit is contained in:
Arnd Bergmann 2017-08-17 10:58:50 +02:00
commit f042bdd6e6
4 changed files with 83 additions and 24 deletions
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30
arch/arm/boot/dts/meson.dtsi
View File

@ -86,14 +86,14 @@ hwrng: rng@8100 {
};
uart_A: serial@84c0 {
compatible = "amlogic,meson-uart";
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
reg = <0x84c0 0x18>;
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
uart_B: serial@84dc {
compatible = "amlogic,meson-uart";
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
reg = <0x84dc 0x18>;
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
@ -108,6 +108,20 @@ i2c_A: i2c@8500 {
status = "disabled";
};
pwm_ab: pwm@8550 {
compatible = "amlogic,meson-pwm";
reg = <0x8550 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@8650 {
compatible = "amlogic,meson-pwm";
reg = <0x8650 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
saradc: adc@8680 {
compatible = "amlogic,meson-saradc";
reg = <0x8680 0x34>;
@ -117,7 +131,7 @@ saradc: adc@8680 {
};
uart_C: serial@8700 {
compatible = "amlogic,meson-uart";
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
reg = <0x8700 0x18>;
interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
@ -182,7 +196,7 @@ ir_receiver: ir-receiver@480 {
};
uart_AO: serial@4c0 {
compatible = "amlogic,meson-uart";
compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart";
reg = <0x4c0 0x18>;
interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
@ -230,5 +244,13 @@ ethmac: ethernet@c9410000 {
interrupt-names = "macirq";
status = "disabled";
};
ahb_sram: sram@d9000000 {
compatible = "mmio-sram";
reg = <0xd9000000 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xd9000000 0x20000>;
};
};
}; /* end of / */

28
arch/arm/boot/dts/meson6.dtsi
View File

@ -70,9 +70,37 @@ cpu@201 {
};
};
xtal: xtal-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "xtal";
#clock-cells = <0>;
};
clk81: clk@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <200000000>;
};
}; /* end of / */
&uart_AO {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_A {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_B {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};
&uart_C {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";
};

16
arch/arm/boot/dts/meson8.dtsi
View File

@ -168,10 +168,18 @@ mux {
&cbus {
clkc: clock-controller@4000 {
#clock-cells = <1>;
#reset-cells = <1>;
compatible = "amlogic,meson8-clkc";
reg = <0x8000 0x4>, <0x4000 0x460>;
};
pwm_ef: pwm@86c0 {
compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
reg = <0x86c0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pinctrl_cbus: pinctrl@9880 {
compatible = "amlogic,meson8-cbus-pinctrl";
reg = <0x9880 0x10>;
@ -270,6 +278,14 @@ &L2 {
arm,filter-ranges = <0x100000 0xc0000000>;
};
&pwm_ab {
compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
};
&pwm_cd {
compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
};
&saradc {
compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc";
clocks = <&clkc CLKID_XTAL>,

33
arch/arm/boot/dts/meson8b.dtsi
View File

@ -119,6 +119,7 @@ mux {
&cbus {
clkc: clock-controller@4000 {
#clock-cells = <1>;
#reset-cells = <1>;
compatible = "amlogic,meson8b-clkc";
reg = <0x8000 0x4>, <0x4000 0x460>;
};
@ -129,20 +130,6 @@ reset: reset-controller@4404 {
#reset-cells = <1>;
};
pwm_ab: pwm@8550 {
compatible = "amlogic,meson8b-pwm";
reg = <0x8550 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@8650 {
compatible = "amlogic,meson8b-pwm";
reg = <0x8650 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_ef: pwm@86c0 {
compatible = "amlogic,meson8b-pwm";
reg = <0x86c0 0x10>;
@ -150,12 +137,6 @@ pwm_ef: pwm@86c0 {
status = "disabled";
};
wdt: watchdog@9900 {
compatible = "amlogic,meson8b-wdt";
reg = <0x9900 0x8>;
interrupts = <0 0 1>;
};
pinctrl_cbus: pinctrl@9880 {
compatible = "amlogic,meson8b-cbus-pinctrl";
reg = <0x9880 0x10>;
@ -193,6 +174,14 @@ &L2 {
arm,filter-ranges = <0x100000 0xc0000000>;
};
&pwm_ab {
compatible = "amlogic,meson8b-pwm";
};
&pwm_cd {
compatible = "amlogic,meson8b-pwm";
};
&saradc {
compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
clocks = <&clkc CLKID_XTAL>,
@ -242,3 +231,7 @@ &usb1_phy {
clock-names = "usb_general", "usb";
resets = <&reset RESET_USB_OTG>;
};
&wdt {
compatible = "amlogic,meson8b-wdt";
};